array package information. STMicroelectronics STM32F732VE, STM32F733IE, STM32F732IE, STM32F733ZE, STM32F732ZE, STM32F733VE, STM32F732RE
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STM32F732xx STM32F733xx
7.6
Package information
UFBGA176+25, 10 x 10, 0.65 mm ultra thin-pitch ball grid array package information
UFBGA176+25 is a 176+25-ball, 10 × 10 × 0.65 mm ultra thin fine-pitch ball grid array package
C Seating plane
A2 A4
A e b
Figure 93. UFBGA176 outline ddd C
F
A1
A
A1 ball identifier
A1 ball index area
A
F
E
D
R
15
BOTTOM VIEW
e
B
1
Øb (176 + 25 balls)
Ø
Ø eee fff
M
M
C
C
A B
TOP VIEW
A0E7_ME_V6
1. Drawing is not to scale.
Table 121. UFBGA176+25 mechanical data millimeters inches
(1)
Symbol
Min Typ Max Min e
F
D
E
A
A1
A2 b ddd eee fff
0.460
0.050
0.400
0.230
9.950
9.950
-
0.400
-
-
-
0.530
0.080
0.450
0.280
10.000
10.000
0.650
0.450
-
-
-
0.600
0.110
0.500
0.330
10.050
10.050
-
0.500
0.080
0.150
0.080
1. Values in inches are converted from mm and rounded to 4 decimal digits.
0.0181
0.002
0.0157
0.0091
0.3917
0.3917
-
0.0157
-
-
-
Typ
0.0209
0.0031
0.0177
0.0110
0.3937
0.3937
0.0256
0.0177
-
-
-
Max
0.0236
0.0043
0.0197
0.0130
0.3957
0.3957
-
0.0197
0.0031
0.0059
0.0031
DS11854 Rev 5 217/228
224
Package information STM32F732xx STM32F733xx
Figure 94. UFBGA176+25 recommended footprint
Dpad
Dsm
A0E7_FP_V1
Table 122. UFBGA176+25 recommended PCB design rules (0.65 mm pitch BGA)
Dimension Recommended values
Pitch
Dpad
Dsm
Stencil opening
Stencil thickness
Pad trace width
0.65 mm
0.300 mm
0.400 mm typ. (depends on the soldermask registration tolerance)
0.300 mm
Between 0.100 mm and 0.125 mm
0.100 mm
218/228 DS11854 Rev 5
STM32F732xx STM32F733xx Package information
UFBGA176+25 device marking
The following figure gives an example of topside marking orientation versus ball A1 identifier location.
The printed markings may differ depending on the supply chain.
Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below.
Figure 95. UFBGA176 top view example
Product identification
(1)
Ball A1 indentifier
Revision code
R
STM32F732
IEK6
Date code
Y WW
MS44210V1
1. Parts marked as ES or E or accompanied by an engineering sample notification letter are not yet qualified and therefore not approved for use in production. ST is not responsible for any consequences resulting from such use. In no event will ST be liable for the customer using any of these engineering samples in production. ST’s Quality department must be contacted prior to any decision to use these engineering samples to run a qualification activity.
DS11854 Rev 5 219/228
224
Package information
7.7
STM32F732xx STM32F733xx
WLCSP100 - 0.4 mm pitch wafer level chip scale package information
WLCSP100 is a 100-ball, 4.166 x 4.628 mm, 0.4 mm pitch wafer level chip scale package.
Figure 96. WLCSP100 outline
A1 BALL LOCATION
A
DETAIL A
K
BOTTOM VIEW
FRONT VIEW
SIDE VIEW
220/228
A1 ORIENTATION
REFERENCE
(4X) aaa
TOP VIEW
WAFER BACK SIDE
1. Drawing is not to scale.
DETAIL A
ROTATED 90°
WLCSP100L_A01Q_ME_V1
DS11854 Rev 5
STM32F732xx STM32F733xx Package information
Table 123. WLCSP100 mechanical data millimeters inches
(1)
Symbol
Min Typ Max Typ Min e2
F
G
N
E e e1
A
A1
A2
A3
(2)
Ø b
(3)
D aaa bbb ccc ddd eee
0.525
-
-
-
0.22
4.166
4.628
-
-
-
-
-
-
-
-
-
-
-
0.555
0.17
0.38
0.025
0.25
4.201
4.663
0.4
3.6
3.6
0.3005
0.5315
100
0.1
0.1
0.1
0.05
0.05
0.585
4.698
-
-
-
-
-
-
-
-
-
-
-
0.28
4.236
-
-
-
1. Values in inches are converted from mm and rounded to 4 decimal digits.
2. Back side coating.
3. Dimension is measured at the maximum bump diameter parallel to primary datum Z.
-
-
-
-
-
-
-
0.0207
-
-
-
-
-
-
-
-
-
-
0.0219
0.0067
0.0150
0.0010
0.0098
0.1654
0.1836
0.0157
0.1417
0.1417
0.0118
0.0209
3.9370
0.0039
0.0039
0.0039
0.0020
0.0020
Figure 97. WLCSP100 recommended footprint
Max
0.0230
-
-
-
0.0110
0.1668
0.1850
-
-
-
-
-
-
-
-
-
-
-
Dpad
Dsm
DS11854 Rev 5
WLCSP100L_A01Q_FP_V1
221/228
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Package information STM32F732xx STM32F733xx
Table 124. WLCSP100 recommended PCB design rules (0.4 mm pitch)
Dimension Recommended values
Pitch
Dpad
Dsm
Stencil thickness
0.4 mm
0.225 mm
0.290 mm
0.1 mm
222/228 DS11854 Rev 5
STM32F732xx STM32F733xx Package information
WLCSP100 device marking
The following figure gives an example of topside marking orientation versus ball A1 identifier location.
The printed markings may differ depending on the supply chain.
Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below.
Figure 98. WLCSP100 top view example
Ball A1 identifier
Product identification(1)
32F733VEY6
Revision code
Y WW R
MSv44215V1
1. Parts marked as ES or E or accompanied by an engineering sample notification letter are not yet qualified and therefore not approved for use in production. ST is not responsible for any consequences resulting from such use. In no event will ST be liable for the customer using any of these engineering samples in production. ST’s Quality department must be contacted prior to any decision to use these engineering samples to run a qualification activity.
DS11854 Rev 5 223/228
224
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