Description
1 Description
STM1403
The STM1403 family of security supervisors are a low-power family of intrusion (tamper) detection chips targeted at manufacturers of POS terminals and other systems, to enable them to meet physical and/or environmental intrusion monitoring requirements as mandated by various standards, such as Federal Information Processing Standards (FIPS)
Pub 140 entitled “Security Requirements for Cryptographic Modules,” published by the
National Institute of Standards and Technology, U.S. Department of Commerce), EMVCo,
ISO, ZKA, and VISA PED. STM1403 supports target levels 3 and lower.
The STM1403 includes automatic battery switchover, RST output (open drain), manual
(push-button) reset input (MR), power-fail comparator (PFI/PFO), physical and/or environmental tamper detect/security alarm, and battery low voltage detect features.
The STM1403A also offers a V
REF
(1.237 V) as an option on pin 9. On the STM1403B/C, this pin is V
TPU
(internally switched V
CC
or V
BAT
).
1.1 V
OUT
pin modes
The STM1403 is available in three versions, corresponding to three modes of the V
OUT
pin
(supply voltage out), when the SAL (security alarm) is asserted (active-low) upon tamper detection:
1.1.1 STM1403A
V
OUT
stays ON (at V
CC
or V
BAT
) when SAL is driven low (activated).
1.1.2 STM1403B
V
OUT
is set to High-Z when SAL is driven low (activated).
1.1.3 STM1403C
V
OUT
is driven to ground when SAL is activated (may be used when V directly to the V
CC
OUT
is connected
pin of the external SRAM that holds the cryptographic codes).
All variants (see Table 1: Device summary ) are pin-compatible and available in a securityfriendly, low profile, 16-pin QFN package.
Obsolete Product(s) - Obsolete Product(s)
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STM1403 Description
Figure 1.
Logic diagram
BLD
V
REF
(3)
V or
TPU
(1)
V
BAT
V
CC
V
CCSW
(2)
MR
PFI
TP1 (NH)
STM1403
V
OUT
RST
(3)
PFO
(3)
SAL
(3)
TP2
(NL)
TP3
(NH)
TP4
(NL)
V
SS
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1.
V
REF
only for STM1403A; V
TPU
for STM1403B/C.
2.
Normal mode: low when V
OUT battery.
is internally switched to V
CC
and high when V
OUT
is internally switched to
3.
SAL, RST, PFO, and BLD are open drain.
Signal names Table 2.
Vccsw
(1)
MR
PFI
V
CC
switch output
Manual (push-button) reset input
Power-fail Input
TP
1
- TP
4
V
OUT
RST
(2)
PFO
(2)
SAL
(2)
BLD
(2)
V
REF
(3)
V
TPU
(3)
V
BAT
V
CC
V
SS
Independent physical tamper detect pins 1 through 4
Supply voltage output
Active-low reset output
Power-fail output
Security alarm output
Battery low voltage detect
1.237 V reference voltage
Tamper pull-up (V
CC
or V
BAT
)
Backup supply voltage
Supply voltage
Ground
1.
Normal mode: low when V
OUT battery.
is internally switched to V
CC
and high when V
OUT
is internally switched to
Obsolete Product(s) - Obsolete Product(s)
3.
V
REF
only for STM1403A; V
TPU
for STM1403B/C.
Note: See
Section 2: Pin descriptions on page 11 for details.
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Description STM1403
Figure 2.
QFN16 connections
BLD
(2)
PFI V
CCSW
(1)
V
CC
RST
(2)
MR
SAL
(2)
V
SS
1
16 15
2
3
4
5 6
14
7
13
12
11
10
8
9
V
OUT
V
BAT
PFO
(2)
V
REF or
V
TPU
(3)
Note:
TP1
(NH)
TP2
(NL)
TP3
(NH)
TP4
(NL)
AI09683
See
Section 2: Pin descriptions on page 11 for details.
1.
Normal mode: low when V
OUT battery.
is internally switched to V
CC
and high when V
OUT
is internally switched to
2.
SAL, RST, PFO, and BLD are open drain.
3.
V
REF
only for STM1403A; V
TPU
for STM1403B/C
Figure 3.
Block diagram
VCC
BAT54J
(1,2)
VBAT
(1)
VSO COMPARE
VOUT
VCCSW
VINT VRST COMPARE
MR
PFI trec
Generator
VPFI COMPARE
RST
(3)
PFO
(3)
VDET
COMPARE @
POWER-UP
1.237V VREF
Generator
BLD
(3)
VTPU
(4)
VREF
(4)
VHV COMPARE
VLV COMPARE Obsolete Product(s) - Obsolete Product(s)
TP1 (NH)
TP2 (NL)
TP3 (NH)
TP4 (NL)
SAL
(3)
AI09684
1.
BAT54J (from STMicroelectronics) recommended
2.
Required for battery-reverse charging protection
3.
Open drain
4.
V
REF
only for STM1403; V
TPU
for STM1403B/C
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STM1403
Figure 4.
Hardware hookup
Description
Unregulated
Voltage
R1
R2
Regulator
VIN VCC
0.1µF
VCCSW
(1)
VCC VOUT
C
(2)
VCC
VCC
LPSRAM
STM1403
Push-Button
BAT54J
(4)
1.0µF
PFI PFO
(3)
MR RST
(3)
VBAT BLD
(3)
To Microprocessor NMI
To Microprocessor Reset
To Microprocessor
From Actuator Device
(e.g., Switches, Wire Mesh)
TP1
TP2
TP3
TP4
SAL
(3)
VREF
(5) or
VTPU
To ADC
To Physical Tamper Pins TPX
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1.
Normal mode: low when V
OUT battery.
is internally switched to V
CC
and high when V
OUT
is internally switched to
2.
Capacitor (C) is typically
≥
10 µF.
3.
Open drain
4.
Diode is required for battery reverse charge protection.
5.
V
REF
only for STM1403; V
TPU
for STM1403B/C.
Figure 5.
Tamper pin (TP
1
or TP
3
) normally high (NH) external hookup (switch closed)
Switch Normally Closed;
Tamper Detection on Open
R
(1)
TP1 or TP3
1.
R typical is 10 M Ω . Resistors must be protected against conductive materials.
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AI09698
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Description STM1403
Figure 6.
Tamper pin (TP
1
or TP
3
) normally high (NH) external hookup (switch open)
VOUT (STM1403A) or
VTPU (STM1403B/C)
R
(1)
TP1 or TP3
Switch Normally Open
Tamper Detection when Closed
1.
R typical is 10M Ω . Resistors must be protected against conductive materials.
Figure 7.
Tamper pin (TP
2
or TP
4
) normally low (NL) external hookup (switch closed)
AI10461
VOUT (STM1403A) or
VTPU (STM1403B/C)
R
(1)
TP2 or TP4
Switch Normally Closed;
Tamper Detection on Open
AI09699
1.
R typical is 10 M Ω . Resistors must be protected against conductive materials.
Figure 8.
Tamper pin (TP
2
or TP
4
) normally low (NL) external hookup (switch open)
VOUT (STM1403A) or
VTPU (STM1403B/C)
Switch Normally Open;
Tamper Detection when Closed
TP2 or TP4
R
(1)
AI10462
10/34 Doc ID 13232 Rev 6
