STMicroelectronics STM6522 Datasheet
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STM6522
Dual push-button
Smart Reset™ with capacitor-adjustable setup delay
Features
■
■
■
■
■
■
■
■
■
Dual Smart Reset™ push-button inputs with capacitor-adjustable extended reset setup delay (t
SRC
)
No power-on reset
Dual RST output, active-low, open-drain
Fixed Smart Reset™ input logic voltage levels
Broad operating voltage range 1.65 V to 5.5 V, inactive reset output levels valid down to 1.0 V
Low supply current (1.5 µA)
Operating temperature: industrial grade –40 °C to +85 °C
TDFN8 package: 2 mm x 2 mm x 0.75 mm
RoHS compliant
Applications
■
■
■
■
■
■
Mobile phones, smartphones e-books
MP3 players
Games
Portable navigation devices
Any application that requires delayed reset push-button(s) response for improved system stability
TDFN8 (DG)
2 mm x 2 mm
January 2012 Doc ID 17045 Rev 3 1/25 www.st.com
1
Contents
Contents
STM6522
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
SS
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Primary Smart Reset™ input (SR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Secondary Smart Reset™ input (SR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Adjustable delay of Smart Reset™ (SRC pin) . . . . . . . . . . . . . . . . . . . . . 10
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Tape and reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/25 Doc ID 17045 Rev 3
STM6522
List of tables
List of tables
SRC
programmed by an ideal external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
TDFN – 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package mechanical data . . . . . . . . . . . . . 17
Parameters for landing pattern - TDFN – 8-lead 2 x 2 mm package . . . . . . . . . . . . . . . . . 18
Doc ID 17045 Rev 3 3/25
List of figures
List of figures
STM6522
Figure 8.
Supply current (I
CC
) vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 9.
Smart Reset delay (t
SRC
) vs. temperature, C
SRC
= 0.6 µF . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 10.
Reset timeout period (t
REC
) vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4/25 Doc ID 17045 Rev 3
STM6522
1 Description
Description
The Smart Reset™ devices provide a useful feature that ensures that inadvertent short reset push-button closures do not cause system resets as the extended Smart Reset™ delay setup periods are implemented. Once the valid Smart Reset™ input levels and setup delay are met, the device generates an output reset pulse for a fixed timeout period (t
REC
).
The typical application hookup shows that either a single Smart Reset™ input, or both reset inputs can be connected to the applications interrupt and control both the interrupt pin and the hard reset functions. If the push-button is closed for a short time, the processor is only interrupted. If the system still does not respond properly, holding the push-button(s) for the extended setup time (t
SRC
) causes a hard reset of the processor. The Smart Reset™ feature helps significantly increase system stability and eliminates the need for a dedicated reset button.
The STM65xx family of Smart Reset™ devices consists of low-current microprocessor reset circuits targeted at applications such as MP3 players, portable navigation or mobile phones, generally any application that requires delayed reset push-button(s) response for improved system stability. The devices in the STM65xx Smart Reset™ family include various combinations of useful features for the targeted applications.
The STM6522 has two combined Smart Reset™ inputs (SR0 and SR1) with delayed reset setup time (t
SRC
) programmed by an external capacitor on the SRC pin.
Figure 1.
Logic diagram
VCC
SR0
SR1
SRC
STM6522
RST1
RST2
VSS
AM04867v2
Doc ID 17045 Rev 3 5/25
Description STM6522
Table 1.
Symbol
Signal names
Input/ output
Description
RST1 Output Open-drain reset output, active-low, no internal pull-up resistor.
RST2 Output Open-drain reset output, active-low, no internal pull-up resistor.
SR0
SR1
SRC
V
V
CC
SS
NC
Input
Input
Primary push-button Smart Reset™ input, active-low, fixed voltage input logic levels, no internal pull-up.
Secondary push-button Smart Reset™ input - combines with the primary pushbutton reset to provide setup delay time, active-low, fixed voltage input logic levels, no internal pull-up.
Input
Smart Reset™ input delay setup control: connect to an external capacitor to adjust the delay setup time (t
SRC
).
Supply
Supply voltage input. Power supply for the device. A 0.1 µF decoupling ceramic capacitor is recommended to be connected between V
CC
and V
SS
pins.
Supply Supply ground.
No connect (not bonded); should be connected to V
SS
.
Figure 2.
Pin connections
RST2
VSS
SR1
RST1
1
2
3
4
STM6522
8
7
6
5
VCC
SR0
NC
SRC
AM04868v2
Figure 3.
Block diagram
SR1 t
SRC generator t
REC generator
RST1
RST2
SR0
SRC
AM04869v2
6/25 Doc ID 17045 Rev 3
STM6522
Figure 4.
Single-button Smart Reset™ typical hookup
VCC
VCC
RST1
STM6522
SRC
SR1
SR0
VSS
CSRC
RESET
VCC
MCU
INT/
NMI
VSS
PUSH-BUTTON
SWITCH
Description
AM04870v2
Figure 5.
Dual-button Smart Reset™ typical hookup
VCC
VCC
RST1
STM6522
SRC
SR1
CSRC
VSS
SR0
RESET
VCC
MCU
INT/
NMI
VSS
PUSH-BUTTON
SWITCH
PUSH-BUTTON
SWITCH
AM004871v2
Doc ID 17045 Rev 3 7/25
Description
Figure 6.
Timing waveforms
1.65 V
V
CC
SR0
Glitch immunity
SR1 t
SRC t
REC
RST1,
RST2
STM6522
1.65 V
AM04872v2
8/25 Doc ID 17045 Rev 3
STM6522 Pin descriptions
2.1 Power supply (V
CC
)
This pin is used to provide the power to the device. A 0.1 µF decoupling ceramic capacitor is recommended to be connected between V
CC
and V
SS
pins.
2.3
2.4
This is the supply ground for the device.
Primary Smart Reset™ input (SR0)
The primary push-button Smart Reset™ input, active-low pin is connected to the pushbutton switch. The input logic voltage levels are set to a fixed voltage level and have no internal pull-up resistor.
Secondary Smart Reset™ input (SR1)
The secondary push-button Smart Reset™ input, active-low pin is connected to the second push-button switch. The input logic voltage levels are set to a fixed voltage level and have no internal pull-up resistor. Keeping both Smart Reset™ inputs SR0 and SR1 active for longer than t
SRC
activates the reset output pulse.
Figure 7.
STM6522 timing tSRC tREC
SR0
SR1
RST1,
RST2
AM04873v2
Reset is asserted “low” right after the Smart Reset™ setup delay (t
SRC
) has been met and returns to high after the t
REC
period.
Doc ID 17045 Rev 3 9/25
Pin descriptions
2.5
STM6522
Adjustable delay of Smart Reset™ (SRC pin)
This pin controls the setup time before the push-button action is validated by the reset output. It is connected to an external capacitor (C
SRC
), which is tied to ground to provide the desired value of setup time (t
SRC
).
Selected calculated t
SRC
and C
SRC
. Refer also to
.
Table 2.
t
SRC
programmed by an ideal external capacitor
Setup delay t
SRC
[s]
(1)(2)
Calculated C
SRC value [µF]
Min.
Typ.
Max.
Closest common
C
SRC
value [µF]
0.2
0.3
0.6
1
2
3
6
10
2.5
3.75
7.5
12.5
3.0
4.5
9
15
0.22
0.33
0.56
1
1.
At 25 ° C. Example calculations based on an ideal capacitor. During application design and component selection it should be considered that the current flowing into the external t
SRC
(C
SRC
programming capacitor
) is on the order of 100 nA, therefore a low-leakage capacitor (ceramic or film capacitor) should be used and placed as close as possible to the SRC pin. Also an adequate low-leakage PCB environment should be ensured to prevent t is 0.1 µF.
SRC
accuracy from being affected. A recommended minimum value of C
SRC
2.
In case of quickly repeated activations of t activations to fully discharge C
SRC
SRC counter, an interval of 10 ms min. is needed between the
, so that the next t
SRC
is as specified.
2.6 Reset output (RST1)
This output is active-low, open-drain with no internal pull-up resistor.
2.7 Reset output (RST2)
This output is active-low, open-drain with no internal pull-up resistor.
10/25 Doc ID 17045 Rev 3
STM6522
3 Typical operating characteristics
Typical operating characteristics
Figure 8.
Supply current (I
CC
) vs. temperature
3
2.5
2
I CC
1.5
1
0.5
–60 –40 –20
0
0 20 40
Temperature [˚C]
60
5.5 V 3.3 V 2 V
80 100 120 140
AM07328
Figure 9.
Smart Reset™ delay (t
SRC
) vs. temperature, C
SRC
= 0.6 µF
9
8.5
t SR
8
7.5
7
6.5
–60 –40 –20
6
0 20 40
Temperature [˚C]
60
5.5 V 3.3 V 2 V
80 100 120 140
AM07329
Doc ID 17045 Rev 3 11/25
Typical operating characteristics
Figure 10.
Reset timeout period (t
REC
) vs. temperature
280
260
240
STM6522 t RE
220
200
180
160
–60 –40 –20
140
0 20 40
Temperature [˚C]
60
5.5 V 3.3 V 2 V
80 100 120 140
AM07330
Figure 11.
Smart Reset™ input voltage threshold vs. temperature
0.8
0.7
0.6
0.5
0.4
–60 –40 –20
0.3
0 20 40 60
Temperature [˚C]
5.5 V 3.3 V 2 V
80 100 120 140
AM07331
12/25 Doc ID 17045 Rev 3
STM6522 Maximum ratings
Stressing the device above the ratings listed in Table 3: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the
STMicroelectronics™ SURE program and other relevant quality documents.
Table 3.
Symbol
Absolute maximum ratings
Parameter Value
T
STG
T
SLD
(1)
θ
JA
V
IO
Storage temperature (V
CC
off)
Lead solder temperature for 10 seconds
Thermal resistance (junction to ambient)
Input or output voltage
TDFN8
–55 to +150
260
149.0
–0.3 to 5.5
V
CC
Supply voltage –0.3 to 7
1.
Reflow at peak temperature of 260 °C. The time above 255 °C must not exceed 30 seconds.
Unit
°C
°C
°C/W
V
V
Doc ID 17045 Rev 3 13/25
DC and AC parameters
5 DC and AC parameters
STM6522
This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in
Table 5: DC and AC characteristics that
follows, are derived from tests performed under the measurement conditions summarized in
Table 4: Operating and measurement conditions . Designers should check that the operating
conditions in their circuit match the operating conditions when relying on the quoted parameters.
Table 4.
Operating and measurement conditions
Parameter Value
V
CC
supply voltage
Ambient operating temperature (T
A
)
Input rise and fall times
Input pulse voltages
Input and output timing ref. voltages
1.65 to 5.5
–40 to +85
0.2 to 0.8 V
CC
0.3 to 0.7 V
CC
Unit
V
°C ns
V
V
Figure 12.
AC testing input/output waveforms
0.8 VCC
0.2 VCC
0.7 VCC
0.3 VCC
AM00478
14/25 Doc ID 17045 Rev 3
STM6522 DC and AC parameters
Table 5.
Symbol
DC and AC characteristics
Parameter Test conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
I
V
CC
CC
OL t
Supply voltage range
Supply current (inputs in their inactive state, neither
REC
nor t
SRC
in progress)
Reset output voltage low
(active-low reset asserted)
V
CC
= 5.0 V
V
CC
= 3.0 V
V
CC
≥
4.5 V, sinking 3.2 mA
V
CC
≥
3.3 V, sinking 2.5 mA
V
CC
≥
1.65 V, sinking 1 mA t
REC
Reset timeout delay, factory programmed
Smart Reset™ inputs
V
IL
V
IH
SR0, SR1 input voltage low
SR0, SR1 input voltage high
I
LI(SR)
Input leakage current,
SRx input
Smart Reset™ delay t
SRC
(3)
Delayed Smart Reset™
setup time. Refer to Table 2 .
T
A
= 25 °C
V
1.65
140
SS
– 0.3
0.85
–1
2
1.5
210
5.5
3
0.3
0.3
0.3
280
0.3
5.5
+1
10 x C
(µF)
SRC
12.5 x C
SRC
(µF)
15 x C
SRC
(µF)
V
µA
µA ms
V
V
µA s
V
V
V
1.
Valid for ambient operating temperature: T
A
= –40 to +85 °C; V
CC
= 1.65 to 5.5 V (except where noted).
2.
Typical value is at 25 °C and V
CC
= 3.3 V unless otherwise noted.
3.
Input glitch immunity is equal to t
SRC
(when both SR inputs are low, otherwise infinite).
Doc ID 17045 Rev 3 15/25
Package mechanical data STM6522
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
16/25 Doc ID 17045 Rev 3
STM6522 Package mechanical data
Figure 13.
TDFN – 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package outline
D
A
B
PIN 1 INDEX AREA
E
0.10 C 2x
0.10 C 2x
TOP VIEW
0.10 C
A
0.08 C
PIN 1 INDEX AREA
1
SIDE VIEW e
A1
SEAT ING
PLANE
C
4 b
0.10
C A B
Pin#1 ID
L
8 5
BOTTOM VIEW
8070540_A
Table 6.
Symbol
TDFN – 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package mechanical data
Dimension (mm) Dimension (inches)
A
A1 b
D
BSC
E
BSC e
L
Min.
0.70
0.00
0.15
1.9
1.9
0.45
Nom.
0.75
0.02
0.20
2.00
2.00
0.50
0.55
Max.
0.80
0.05
0.25
2.1
2.1
0.65
Min.
0.028
0.000
0.006
0.075
0.075
0.018
Nom.
0.030
0.001
0.008
0.079
0.079
0.020
0.022
Max.
0.031
0.002
0.010
0.083
0.083
0.026
Doc ID 17045 Rev 3 17/25
Package footprint
Figure 14.
Landing pattern - TDFN – 8-lead 2 x 2 mm without thermal pad
D
P
STM6522
E E1
L b
AM00441
Table 7.
Parameters for landing pattern - TDFN – 8-lead 2 x 2 mm package
Dimension (mm)
Parameter Description
Min.
Nom.
Max.
E
E1
L b
D
P
Contact length
Contact width
Max. land pattern Y-direction
Contact gap spacing
Max. land pattern X-direction
Contact pitch
1.05
0.25
—
—
—
—
—
—
2.85
0.65
1.75
0.5
1.15
0.30
—
—
—
—
18/25 Doc ID 17045 Rev 3
STM6522
8 Tape and reel information
Figure 15.
Carrier tape
P0
D P2
T
Top cover tape
B0
A0
Tape and reel information
F
E
W
K0 Center lines of cavity
User direction of feed
P1
AM03073v2
Table 8.
Package
TDFN8
Carrier tape dimensions
W D E P
0
P
2
F A
0
B
0
K
0
P
1
T Unit
Bulk qty.
8.00
+0.30
–0.10
1.50
+0.10/
–0.00
1.75
±0.10
4.00
±0.10
2.00
±0.10
3.50
±0.05
2.30
±0.05
2.30
±0.05
1.00
±0.05
4.00
±0.10
0.250
±0.05
mm 3000
Doc ID 17045 Rev 3 19/25
Tape and reel information
Figure 16.
Reel dimensions
STM6522
T
40 mm min.
acces hole at slot location
B
D C
N
A
Full radius
Tape slot in core for tape start
25 mm min width
G measured at hub
AM00443
Table 9.
Tape sizes
Reel dimensions
A max.
B min.
8 mm 180 (7 inches)
C
1.50
13.0 +/– 0.20
D min.
20.20
N min.
60
G T max.
8.4 +2/–0 14.40
20/25 Doc ID 17045 Rev 3
STM6522
Figure 17.
Tape trailer/leader
End
Tape and reel information
Start
Top cover tape
No components
T R A I L E R
160 mm min.
Components 100 mm min.
No components
L E A D E R
400 mm min.
Sealed with cover tape
User direction of feed
AM00444
Figure 18.
Pin 1 orientation
User direction of feed
Note: 1 Drawings are not to scale.
2 All dimensions are in mm, unless otherwise noted.
AM00442
Doc ID 17045 Rev 3 21/25
Part numbering STM6522
Table 10.
Ordering information scheme
Example: STM6522 A A A A DG 6 F
Device type
STM6522
V
CC
monitoring, power-on reset
A = no V
CC monitoring, no power-on reset
Smart Reset™ setup delay (t
SRC
); presence of internal input pull-up on all Smart Reset™ inputs (SRx)
A = user-programmed (external capacitor); no input pull-up
Output type
A = both RST1 and RST2 open-drain, no pull-up, active-low
Reset timeout period (t
REC
)
A = 140 ms min.
Package
DG = TDFN8 2 x 2 x 0.75 mm, 0.5 mm pitch
Temperature range
6 = –40 °C to +85 °C
Shipping method
F = ECOPACK
® package, tape and reel
For device options currently available refer to Table 11
. For other options, or for more information on any aspect of this device, please contact the ST sales office nearest you.
22/25 Doc ID 17045 Rev 3
STM6522 Package marking
Table 11.
Package marking
Part number t
SRC delay control
Smart
Reset™ inputs
(1)
Power-on reset, V
CC monitoring
RST1 output
(1)
RST2 output
(1) t
REC option
Topmark
STM6522AAAADG6F C
SRC
AL — AL, OD AL, OD
1.
AL = active-low, AH = active-high, PU = with internal pull-up resistor, OD = open-drain.
A CAL, AAL
Figure 19.
Package marking, top view
B
A
C D
E
Topmark
A = dot (pin 1 reference)
B = assembly plant (P)
C = assembly year (Y, 0-9): 9 = 2009 etc.
D = assembly work week (WW, 01 to 52): 20 = WW20 etc.
E = marking area (topmark)
AM00479
Doc ID 17045 Rev 3 23/25
Revision history STM6522
Table 12.
Document revision history
Date Revision
03-Feb-2010
10-May-2010
09-Jan-2012
1
2
3
Changes
Initial release.
Updated title, Features , Applications ,
,
,
,
,
,
,
,
, note 1 below
,
,
,
Updated
,
and Disclaimer, minor text corrections throughout document.
24/25 Doc ID 17045 Rev 3
STM6522
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Doc ID 17045 Rev 3 25/25
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