STM32L486xx Memory mapping
Figure 14. STM32L486xx memory map
0xFFFF FFFF
7
Cortex™-M4 with FPU
Internal
Peripherals
0xE000 0000
6
0xC000 0000
5
FMC and
QUADSPI registers
0xA000 0000
4 0x9000 0000
QUADSPI Flash bank
FMC bank 3
0x8000 0000
3
FMC bank 1 & bank 2
0x6000 0000
2
1
0
0x4000 0000
Peripherals
0x2000 0000
0x0000 0000
SRAM1
CODE
Reserved
0xBFFF FFFF
0xA000 1400
0xA000 1000
0xA000 0000
0x5FFF FFFF
0x5006 0C00
0x4800 0000
0x4002 4400
0x4002 0000
Reserved
QUADSPI registers
FMC registers
Reserved
AHB2
Reserved
AHB1
Reserved
0x4001 6400
0x4001 0000
0x4000 9800
0x4000 0000
0x1FFF FFFF
0x1FFF F810
0x1FFF F800
0x1FFF F000
0x1FFF 8000
0x1FFF 7810
0x1FFF 7800
0x1FFF 7400
0x1FFF 7000
0x1FFF 0000
0x1000 8000
0x1000 0000
0x0810 0000
0x0800 0000
0x0010 0000
0x0000 0000
APB2
Reserved
APB1
Reserved
Option Bytes
Reserved
System memory
Reserved
Options Bytes
Reserved
OTP area
System memory
Reserved
SRAM2
Reserved
Flash memory
Reserved
Flash, system memory or SRAM, depending on
BOOT configuration
MS34100V3
DS10199 Rev 7
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Memory mapping STM32L486xx
Table 19. STM32L486xx memory map and peripheral register boundary addresses (1)
Bus Boundary address
Size
(bytes)
Peripheral
AHB3
AHB2
-
AHB1
0xA000 1000 - 0xA000 13FF
0xA000 0000 - 0xA000 0FFF
0x5006 0800 - 0x5006 0BFF
0x5006 0400 - 0x5006 07FF
0x5006 0000 - 0x5006 03FF
0x5004 0400 - 0x5005 FFFF
0x5004 0000 - 0x5004 03FF
0x5000 0000 - 0x5003 FFFF
0x4800 2000 - 0x4FFF FFFF
0x4800 1C00 - 0x4800 1FFF
0x4800 1800 - 0x4800 1BFF
0x4800 1400 - 0x4800 17FF
0x4800 1000 - 0x4800 13FF
0x4800 0C00 - 0x4800 0FFF
0x4800 0800 - 0x4800 0BFF
0x4800 0400 - 0x4800 07FF
0x4800 0000 - 0x4800 03FF
0x4002 4400 - 0x47FF FFFF
0x4002 4000 - 0x4002 43FF
0x4002 3400 - 0x4002 3FFF
0x4002 3000 - 0x4002 33FF
0x4002 2400 - 0x4002 2FFF
0x4002 2000 - 0x4002 23FF
0x4002 1400 - 0x4002 1FFF
0x4002 1000 - 0x4002 13FF
0x4002 0800 - 0x4002 0FFF
0x4002 0400 - 0x4002 07FF
0x4002 0000 - 0x4002 03FF
1 KB
4 KB
1 KB
1 KB
1 KB
127 KB
1 KB
QUADSPI
FMC
RNG
Reserved
AES
Reserved
ADC
16 KB OTG_FS
~127 MB Reserved
1 KB GPIOH
1 KB
1 KB
1 KB
GPIOG
GPIOF
GPIOE
1 KB
1 KB
3 KB
1 KB
3 KB
1 KB
1 KB
1 KB
1 KB
GPIOD
GPIOC
GPIOB
1 KB GPIOA
~127 MB Reserved
1 KB TSC
2 KB
1 KB
1 KB
Reserved
CRC
Reserved
FLASH registers
Reserved
RCC
Reserved
DMA2
DMA1
102/259
DS10199 Rev 7
STM32L486xx Memory mapping
Table 19. STM32L486xx memory map and peripheral register boundary addresses (1)
(continued)
Bus Boundary address
Size
(bytes)
Peripheral
APB2
APB2
0x4001 6400 - 0x4001 FFFF
0x4001 6000 - 0x4000 63FF
0x4001 5C00 - 0x4000 5FFF
0x4001 5800 - 0x4000 5BFF
0x4001 5400 - 0x4000 57FF
0x4001 4C00 - 0x4000 53FF
0x4001 4800 - 0x4001 4BFF
0x4001 4400 - 0x4001 47FF
0x4001 4000 - 0x4001 43FF
0x4001 3C00 - 0x4001 3FFF
0x4001 3800 - 0x4001 3BFF
0x4001 3400 - 0x4001 37FF
0x4001 3000 - 0x4001 33FF
0x4001 2C00 - 0x4001 2FFF
0x4001 2800 - 0x4001 2BFF
0x4001 2000 - 0x4001 27FF
0x4001 1C00 - 0x4001 1FFF
0x4001 0800- 0x4001 1BFF
0x4001 0400 - 0x4001 07FF
0x4001 0200 - 0x4001 03FF
0x4001 0030 - 0x4001 01FF
0x4001 0000 - 0x4001 002F
Reserved
DFSDM1
Reserved
SAI2
SAI1
Reserved
TIM17
TIM16
TIM15
Reserved
USART1
TIM8
SPI1
TIM1
SDMMC1
Reserved
FIREWALL
Reserved
EXTI
COMP
VREFBUF
SYSCFG
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
2 KB
1 KB
5 KB
1 KB
39 KB
1 KB
1 KB
1 KB
1 KB
2 KB
1 KB
1 KB
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Memory mapping STM32L486xx
Table 19. STM32L486xx memory map and peripheral register boundary addresses (1)
(continued)
Bus Boundary address
Size
(bytes)
Peripheral
APB1
0x4000 9800 - 0x4000 FFFF
0x4000 9400 - 0x4000 97FF
0x4000 8C00 - 0x4000 93FF
0x4000 8800 - 0x4000 8BFF
0x4000 8400 - 0x4000 87FF
0x4000 8000 - 0x4000 83FF
0x4000 7C00 - 0x4000 7FFF
0x4000 7800 - 0x4000 7BFF
0x4000 7400 - 0x4000 77FF
0x4000 7000 - 0x4000 73FF
0x4000 6800 - 0x4000 6FFF
0x4000 6400 - 0x4000 67FF
0x4000 6000 - 0x4000 63FF
0x4000 5C00- 0x4000 5FFF
0x4000 5800 - 0x4000 5BFF
0x4000 5400 - 0x4000 57FF
0x4000 5000 - 0x4000 53FF
0x4000 4C00 - 0x4000 4FFF
Reserved
LPTIM2
Reserved
SWPMI1
Reserved
LPUART1
LPTIM1
OPAMP
DAC1
PWR
Reserved
CAN1
Reserved
I2C3
I2C2
I2C1
UART5
UART4
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
26 KB
1 KB
2 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
104/259
DS10199 Rev 7
STM32L486xx Memory mapping
Table 19. STM32L486xx memory map and peripheral register boundary addresses (1)
(continued)
Bus Boundary address
Size
(bytes)
Peripheral
APB1
0x4000 4800 - 0x4000 4BFF
0x4000 4400 - 0x4000 47FF
0x4000 4000 - 0x4000 43FF
0x4000 3C00 - 0x4000 3FFF
0x4000 3800 - 0x4000 3BFF
0x4000 3400 - 0x4000 37FF
0x4000 3000 - 0x4000 33FF
0x4000 2C00 - 0x4000 2FFF
0x4000 2800 - 0x4000 2BFF
0x4000 2400 - 0x4000 27FF
0x4000 1800 - 0x4000 23FF
0x4000 1400 - 0x4000 17FF
0x4000 1000 - 0x4000 13FF
0x4000 0C00- 0x4000 0FFF
0x4000 0800 - 0x4000 0BFF
0x4000 0400 - 0x4000 07FF
0x4000 0000 - 0x4000 03FF
1. The gray color is used for reserved boundary addresses.
USART3
USART2
Reserved
SPI3
SPI2
Reserved
IWDG
WWDG
RTC
LCD
Reserved
TIM7
TIM6
TIM5
TIM4
TIM3
TIM2
1 KB
1 KB
1 KB
3 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
DS10199 Rev 7
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