Functional description R5973AD strong overcurrent or short-circuit conditions could be not properly limited. For this reason the switching frequency is also reduced, thus keeping the inductor current under its maximum threshold. The frequency shifter (
Figure 4 ) functions based on the feedback
voltage. As the feedback voltage decreases (due to the reduced duty cycle), the switching frequency decreases also.
Figure 6. Current limitation circuitry
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The voltage error amplifier is the core of the loop regulation. It is a transconductance operational amplifier whose non inverting input is connected to the internal voltage reference (1.235 V), while the inverting input (FB) is connected to the external divider or directly to the output voltage. The output (COMP) is connected to the external compensation network. The uncompensated error amplifier has the following characteristics:
Table 5. Uncompensated error amplifier characteristics
Description Values
Transconductance
Low frequency gain
Minimum sink/source voltage
Output voltage swing
Input bias current
2300 µS
65 dB
1500 µA/300 µA
0.4 V/3.65 V
2.5 µA
The error amplifier output is compared to the oscillator sawtooth to perform PWM control.
PWM comparator and power stage
This block compares the oscillator sawtooth and the error amplifier output signals to generate the PWM signal for the driving stage.
The power stage is a highly critical block, as it functions to guarantee a correct turn ON and turn OFF of the PDMOS. The turn ON of the power element, or more accurately, the rise
DocID027027 Rev 1
R5973AD Functional description time of the current at turn ON, is a very critical parameter. At a first approach, it appears that the faster the rise time, the lower the turn ON losses.
However, there is a limit introduced by the recovery time of the recirculation diode.
In fact, when the current of the power element is equal to the inductor current, the diode turns OFF and the drain of the power is able to go high. But during its recovery time, the diode can be considered a high value capacitor and this produces a very high peak current, responsible for numerous problems:
Spikes on the device supply voltage that cause oscillations (and thus noise) due to the board parasites.
Turn ON overcurrent leads to a decrease in the efficiency and system reliability.
Major EMI problems.
Shorter freewheeling diode life.
The fall time of the current during turn OFF is also critical, as it produces voltage spikes (due to the parasites elements of the board) that increase the voltage drop across the PDMOS.
In order to minimize these problems, a new driving circuit topology has been used and the block diagram is shown in
Figure 7 . The basic idea is to change the current levels used to
turn the power switch ON and OFF, based on the PDMOS and the gate clamp status.
This circuitry allows the power switch to be turned OFF and ON quickly and addresses the freewheeling diode recovery time problem. The gate clamp is necessary to ensure that V
GS of the internal switch does not go higher than V
GS max. The ON/OFF control block protects against any cross conduction between the supply line and ground.
Figure 7. Driving circuitry
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