UM1694
Figure 5. STEVAL-ILH007V1 finite state machine lamp management
Firmware
The following table lists the user source.c files for the STEVAL-ILH007V1.
File
main.c
adc.c
stlux_smed.c
stlux_it.c
stmr.c
uart.c
Table 3. HID FW user source file list
Brief descriptions
Main module
ADC peripheral configuration
Automatically generated by SMED_Configurator, a PC software application
Manages the IRQ functions
Manage the requested timing
Analog to Digital Converter (ADC)
•
ADC0 VIN
•
ADC1 VBUS
•
ADC2 PFC_ISENS
•
ADC3 PFC_OK
•
ADC4 VLAMP
•
ADC5 VOUT33
•
ADC6 VTEMP
Measures the main input voltage
Measures the output voltage of the PFC stage
Currently not used
Currently not used
Measures of the voltage across the lamp
Checks the presence of the 3.3 V voltage regulator
Measures the temperature of the board; the sensor is currently not calibrated
DocID025509 Rev 1 9/30
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Firmware
Analog comparators
CPP0 Currently not used
CPP1 Currently not used
CPP2 Currently not used
CPP3 Sets the bridge peak current value
16-bit system timer
STMR Sets the correct timing of all events for the application:
– PID controller
– drive signals of the bridge
– systems state machine
State machine event driven
SMED0
SMED1
SMED2
SMED3
SMED4
SMED5
Provides for the high frequency signal generation of the bridge; it is also used for ZCD signal synchronization and bridge peak current control
Provides for the high frequency signal generation of the bridge; it is also used for ZCD signal synchronization and bridge peak current control
Currently not used
Currently not used
Generates the signals for the PFC switch
Generates the reference voltage for CPP3 comparator
UM1694
10/30 DocID025509 Rev 1
