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RL78/G14, RL78/G1C, RL78/L12, RL78/L13, RL78/L1C Group Clock Synchronous Single Master Control Software Using CSI Mode of Serial Array Unit
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RL78/G14, RL78/G1C, RL78/L12, RL78/L13, RL78/L1C Group
Clock Synchronous Single Master Control Software Using CSI Mode of Serial Array Unit
2. Conditions of Checking the Operation of the Software
The sample code described in this application note has been confirmed to run normally under the operating conditions given below.
(1)
RL78/G14 SAU Integrated Development Environment CS+ for CA,CX (Compiler: CA78K0R)
Table 2-1 Operating Conditions
Item
Microcomputer used for evaluation
Memory used for evaluation
Operating frequency
Operating voltage
Integrated development environment
C compiler
Version of the sample code
Software used for evaluation
Description
RL78/G14 Group (Program ROM: 256 KB, RAM: 24 KB)
Renesas Electronics R1EX25xxx Series SPI Serial EEPROM
Main system clock: 32 MHz
Peripheral hardware clock: 32 MHz
Serial clock: 4 MHz
3.3 V
Renesas Electronics
CS+ for CA, CX V3.01.00
Renesas Electronics
RL78,78K0R compiler CA78K0R V1.71
Compiler options:
The default settings (-qx2) for the integrated development environment are used.
Ver.2.05
RX Family, RL78 Family, 78K0R/Kx3-L
Renesas R1EX25xxx Series Serial EEPROM Control Software,
(R01AN0565EJ) Ver.2.04
Renesas Starter Kit for RL78/G14 Evaluation board used
(2)
RL78/G14 SAU Integrated Development Environment CS+ for CC (Compiler: CC-RL)
Table 2-2 Operating Conditions
Item
Microcomputer used for evaluation
Memory used for evaluation
Operating frequency
Operating voltage
Integrated development environment
C compiler
Version of the sample code
Software used for evaluation
Description
RL78/G14 Group (Program ROM: 256 KB, RAM: 24 KB)
Renesas Electronics R1EX25xxx Series SPI Serial EEPROM
Main system clock: 32 MHz
Peripheral hardware clock: 32 MHz
Serial clock: 4 MHz
3.3 V
Renesas Electronics
CS+ for CC V3.03.00
Renesas Electronics
RL78 compiler CC-RL V1.02.00
Compiler options:
The default settings (Perform the default optimization(None)) for the integrated development environment are used.
Ver.2.05
RX Family, RL78 Family, 78K0R/Kx3-L
Renesas R1EX25xxx Series Serial EEPROM Control Software,
(R01AN0565EJ) Ver.2.04
Renesas Starter Kit for RL78/G14 Evaluation board used
R01AN1195EJ0105 Rev.1.05
Mar 31, 2016
Page 5 of 54
RL78/G14, RL78/G1C, RL78/L12, RL78/L13, RL78/L1C Group
Clock Synchronous Single Master Control Software Using CSI Mode of Serial Array Unit
(3)
RL78/G14 SAU Integrated Development Environment IAR Embedded Workbench
Table 2-3 Operating Conditions
Item
Microcomputer used for evaluation
Memory used for evaluation
Operating frequency
Operating voltage
Integrated development environment
C compiler, assembler
Version of the sample code
Software used for evaluation
Description
RL78/G14 Group (Program ROM: 256 KB, RAM: 24 KB)
Renesas Electronics R1EX25xxx Series SPI Serial EEPROM
Main system clock: 32 MHz
Peripheral hardware clock: 32 MHz
Serial clock: 4 MHz
3.3 V
IAR Systems
IAR Embedded Workbench for Renesas RL78 (Ver.1.30.2)
IAR Systems
IAR Assembler for Renesas RL78 (Ver.1.30.2.50666)
IAR C/C++ Compiler for Renesas RL78 (Ver.1.30.2.50666)
Compiler options:
The default settings ("level: low") for the integrated development environment are used.
Ver.2.03
Renesas Electronics
The R1EX25xxx Series SPI Serial EEPROM Control Software,
(R01AN0565EJ) Ver.2.02
Renesas Starter Kit for RL78/G14 Evaluation board used
(4)
RL78/G1C SAU Integrated Development Environment CubeSuite+
Table 2-4 Operating Conditions
Item
Microcomputer used for evaluation
Memory used for evaluation
Operating frequency
Operating voltage
Integrated development environment
C compiler
Version of the sample code
Software used for evaluation
Description
RL78/G1C Group (Program ROM: 32 KB, RAM: 5.5 KB)
Renesas Electronics R1EX25xxx Series SPI Serial EEPROM
Main system clock: 24 MHz
Peripheral hardware clock: 24 MHz
Serial clock: 4 MHz
3.3 V
Renesas Electronics
CubeSuite+ V2.01.00
Renesas Electronics
RL78,78K0R compiler CA78K0R V1.70
Compiler options:
The default settings (-qx2) for the integrated development environment are used.
Ver.2.03
Renesas Electronics
The R1EX25xxx Series SPI Serial EEPROM Control Software,
(R01AN0565EJ) Ver.2.03 R01
Renesas RL78/G1C Target Board QB-R5F10JGC-TB Evaluation board used
R01AN1195EJ0105 Rev.1.05
Mar 31, 2016
Page 6 of 54
RL78/G14, RL78/G1C, RL78/L12, RL78/L13, RL78/L1C Group
Clock Synchronous Single Master Control Software Using CSI Mode of Serial Array Unit
(5)
RL78/G1C SAU Integrated Development Environment IAR Embedded Workbench
Table 2-5 Operating Conditions
Item
Microcomputer used for evaluation
Memory used for evaluation
Operating frequency
Operating voltage
Integrated development environment
C compiler, assembler
Version of the sample code
Software used for evaluation
Description
RL78/G1C Group (Program ROM: 32 KB, RAM: 5.5 KB)
Renesas Electronics R1EX25xxx Series SPI Serial EEPROM
Main system clock: 24 MHz
Peripheral hardware clock: 24 MHz
Serial clock: 4 MHz
3.3 V
IAR Systems
IAR Embedded Workbench for Renesas RL78 (Ver.1.30.5)
IAR Systems
IAR Assembler for Renesas RL78 (Ver.1.30.4.50715)
IAR C/C++ Compiler for Renesas RL78 (Ver.1.30.5.50715)
Compiler options:
The default settings ("level: low") for the integrated development environment are used.
Ver.2.03
Renesas Electronics
The R1EX25xxx Series SPI Serial EEPROM Control Software,
(R01AN0565EJ) Ver.2.03 R01
Renesas RL78/G1C Target Board QB-R5F10JGC-TB Evaluation board used
(6)
RL78/L12 SAU Integrated Development Environment CubeSuite+
Table 2-6 Operating Conditions
Item
Microcomputer used for evaluation
Memory used for evaluation
Operating frequency
Operating voltage
Integrated development environment
C compiler
Version of the sample code
Software used for evaluation
Description
RL78/L12 Group (Program ROM: 32 KB, RAM: 1.5 KB)
Renesas Electronics R1EX25xxx Series SPI Serial EEPROM
Main system clock: 24 MHz
Peripheral hardware clock: 24 MHz
Serial clock: 4 MHz
3.3 V
Renesas Electronics
CubeSuite+ V2.01.00
Renesas Electronics
RL78,78K0R compiler CA78K0R V1.70
Compiler options:
The default settings (-qx2) for the integrated development environment are used.
Ver.2.03
Renesas Electronics
The R1EX25xxx Series SPI Serial EEPROM Control Software,
(R01AN0565EJ) Ver.2.03 R01
Renesas Starter Kit for RL78/L12 Evaluation board used
R01AN1195EJ0105 Rev.1.05
Mar 31, 2016
Page 7 of 54
RL78/G14, RL78/G1C, RL78/L12, RL78/L13, RL78/L1C Group
Clock Synchronous Single Master Control Software Using CSI Mode of Serial Array Unit
(7)
RL78/L12 SAU Integrated Development Environment IAR Embedded Workbench
Table 2-7 Operating Conditions
Item
Microcomputer used for evaluation
Memory used for evaluation
Operating frequency
Operating voltage
Integrated development environment
C compiler, assembler
Version of the sample code
Software used for evaluation
Description
RL78/L12 Group (Program ROM: 32 KB, RAM: 1.5 KB)
Renesas Electronics R1EX25xxx Series SPI Serial EEPROM
Main system clock: 24 MHz
Peripheral hardware clock: 24 MHz
Serial clock: 4 MHz
3.3 V
IAR Systems
IAR Embedded Workbench for Renesas RL78 (Ver.1.30.5)
IAR Systems
IAR Assembler for Renesas RL78 (Ver.1.30.4.50715)
IAR C/C++ Compiler for Renesas RL78 (Ver.1.30.5.50715)
Compiler options:
The default settings ("level: low") for the integrated development environment are used.
Ver.2.03
Renesas Electronics
The R1EX25xxx Series SPI Serial EEPROM Control Software,
(R01AN0565EJ) Ver.2.03 R01
Renesas Starter Kit for RL78/L12 Evaluation board used
(8)
RL78/L13 SAU Integrated Development Environment CubeSuite+
Table 2-8 Operating Conditions
Item
Microcomputer used for evaluation
Memory used for evaluation
Operating frequency
Operating voltage
Integrated development environment
C compiler
Version of the sample code
Software used for evaluation
Description
RL78/L13 Group (Program ROM: 128 KB, RAM: 8 KB)
Renesas Electronics R1EX25xxx Series SPI Serial EEPROM
Main system clock: 24 MHz
Peripheral hardware clock: 24 MHz
Serial clock: 4 MHz
3.3 V
Renesas Electronics
CubeSuite+ V2.01.00
Renesas Electronics
RL78,78K0R compiler CA78K0R V1.70
Compiler options:
The default settings (-qx2) for the integrated development environment are used.
Ver.2.03
Renesas Electronics
The R1EX25xxx Series SPI Serial EEPROM Control Software,
(R01AN0565EJ) Ver.2.03 R01
Renesas Starter Kit for RL78/L13 Evaluation board used
R01AN1195EJ0105 Rev.1.05
Mar 31, 2016
Page 8 of 54
RL78/G14, RL78/G1C, RL78/L12, RL78/L13, RL78/L1C Group
Clock Synchronous Single Master Control Software Using CSI Mode of Serial Array Unit
(9)
RL78/L13 SAU Integrated Development Environment IAR Embedded Workbench
Table 2-9 Operating Conditions
Item
Microcomputer used for evaluation
Memory used for evaluation
Operating frequency
Operating voltage
Integrated development environment
C compiler, assembler
Version of the sample code
Software used for evaluation
Description
RL78/L13 Group (Program ROM: 128 KB, RAM: 8 KB)
Renesas Electronics R1EX25xxx Series SPI Serial EEPROM
Main system clock: 24 MHz
Peripheral hardware clock: 24 MHz
Serial clock: 4 MHz
3.3 V
IAR Systems
IAR Embedded Workbench for Renesas RL78 (Ver.1.30.5)
IAR Systems
IAR Assembler for Renesas RL78 (Ver.1.30.4.50715)
IAR C/C++ Compiler for Renesas RL78 (Ver.1.30.5.50715)
Compiler options:
The default settings ("level: low") for the integrated development environment are used.
Ver.2.03
Renesas Electronics
The R1EX25xxx Series SPI Serial EEPROM Control Software,
(R01AN0565EJ) Ver.2.03 R01
Renesas Starter Kit for RL78/L13 Evaluation board used
(10)
RL78/L1C SAU Integrated Development Environment CubeSuite+
Table 2-10 Operating Conditions
Item
Microcomputer used for evaluation
Memory used for evaluation
Operating frequency
Operating voltage
Integrated development environment
C compiler
Version of the sample code
Software used for evaluation
Description
RL78/L1C Group (Program ROM: 256 KB, RAM: 16 KB)
Renesas Electronics R1EX25xxx Series SPI Serial EEPROM
Main system clock: 24 MHz
Peripheral hardware clock: 24 MHz
Serial clock: 4 MHz
3.3 V
Renesas Electronics
CubeSuite+ V2.01.00
Renesas Electronics
RL78,78K0R compiler CA78K0R V1.70
Compiler options:
The default settings (-qx2) for the integrated development environment are used.
Ver.2.03
Renesas Electronics
The R1EX25xxx Series SPI Serial EEPROM Control Software,
(R01AN0565EJ) Ver.2.03 R01
Renesas Starter Kit for RL78/L1C Evaluation board used
R01AN1195EJ0105 Rev.1.05
Mar 31, 2016
Page 9 of 54
RL78/G14, RL78/G1C, RL78/L12, RL78/L13, RL78/L1C Group
Clock Synchronous Single Master Control Software Using CSI Mode of Serial Array Unit
(11)
RL78/L1C SAU Integrated Development Environment IAR Embedded Workbench
Table 2-11 Operating Conditions
Item
Microcomputer used for evaluation
Memory used for evaluation
Operating frequency
Operating voltage
Integrated development environment
C compiler, assembler
Version of the sample code
Software used for evaluation
Description
RL78/L1C Group (Program ROM: 256 KB, RAM: 16 KB)
Renesas Electronics R1EX25xxx Series SPI Serial EEPROM
Main system clock: 24 MHz
Peripheral hardware clock: 24 MHz
Serial clock: 4 MHz
3.3 V
IAR Systems
IAR Embedded Workbench for Renesas RL78 (Ver.1.30.5)
IAR Systems
IAR Assembler for Renesas RL78 (Ver.1.30.4.50715)
IAR C/C++ Compiler for Renesas RL78 (Ver.1.30.5.50715)
Compiler options:
The default settings ("level: low") for the integrated development environment are used.
Ver.2.03
Renesas Electronics
The R1EX25xxx Series SPI Serial EEPROM Control Software,
(R01AN0565EJ) Ver.2.03 R01
Renesas Starter Kit for RL78/L1C Evaluation board used
R01AN1195EJ0105 Rev.1.05
Mar 31, 2016
Page 10 of 54
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Table of contents
- 4 1. Specifications
- 5 2. Conditions of Checking the Operation of the Software
- 5 (1) RL78/G14 SAU Integrated Development Environment CS+ for CA,CX (Compiler: CA78K0R)
- 5 (2) RL78/G14 SAU Integrated Development Environment CS+ for CC (Compiler: CC-RL)
- 6 (3) RL78/G14 SAU Integrated Development Environment IAR Embedded Workbench
- 6 (4) RL78/G1C SAU Integrated Development Environment CubeSuite+
- 7 (5) RL78/G1C SAU Integrated Development Environment IAR Embedded Workbench
- 7 (6) RL78/L12 SAU Integrated Development Environment CubeSuite+
- 8 (7) RL78/L12 SAU Integrated Development Environment IAR Embedded Workbench
- 8 (8) RL78/L13 SAU Integrated Development Environment CubeSuite+
- 9 (9) RL78/L13 SAU Integrated Development Environment IAR Embedded Workbench
- 9 (10) RL78/L1C SAU Integrated Development Environment CubeSuite+
- 10 (11) RL78/L1C SAU Integrated Development Environment IAR Embedded Workbench
- 11 3. Related Application Notes
- 12 4. Hardware Description
- 12 4.1 List of Pins
- 12 4.2 Reference Circuit
- 13 5. Software Description
- 13 5.1 Operation Outline
- 14 5.1.1 Clock Synchronous Mode Timing
- 14 5.1.2 SPI Slave Device CE# Pin Control
- 15 5.2 Software Control Outline
- 15 5.2.1 Software Configuration
- 15 5.2.2 Serial Enabling (R_SIO_Enable())
- 16 5.2.3 Serial Disabling (R_SIO_Disable())
- 16 5.2.4 Serial Opening (R_SIO_Open_Port())
- 16 5.2.5 Data Transmission (R_SIO_Tx_Data())
- 16 5.2.6 Data Reception (R_SIO_Rx_Data())
- 16 5.2.7 Data Transmission/Reception (R_SIO_TRx_Data())
- 17 5.3 Sizes of Required Memory
- 17 (1) RL78/G14 SAU Integrated Development Environment CS+ for CA, CX (Compiler: CA78K0R)
- 17 (2) RL78/G14 SAU Integrated Development Environment CS+ for CC (Compiler: CC-RL)
- 17 (3) RL78/G14 SAU Integrated Development Environment IAR Embedded Workbench
- 17 (4) RL78/L13 SAU Integrated Development Environment CubeSuite+
- 18 (5) RL78/L13 SAU Integrated Development Environment IAR Embedded Workbench
- 19 5.4 File Configuration
- 20 5.5 List of Constants
- 20 5.5.1 Return Values
- 20 5.5.2 Miscellaneous Definitions
- 21 5.6 Structures and Unions
- 21 5.7 List of Functions
- 22 5.8 Function Specifications
- 22 5.8.1 Driver Initialization Processing
- 23 5.8.2 Serial I/O Disable Setting Processing
- 25 5.8.3 Serial I/O Enable Setting Processing
- 27 5.8.4 Serial I/O Open Setting Processing
- 28 5.8.5 Serial I/O Data Transmit Processing
- 30 5.8.6 Serial I/O Data Receive Processing
- 32 5.8.7 Serial I/O Data Transmit/Receive Processing
- 34 5.9 Macro Function Specifications
- 34 5.9.1 Macro Function SIO_IO_INIT()
- 34 5.9.2 Macro Function SIO_IO_OPEN()
- 35 5.9.3 Macro Function SIO_DATAI_INIT()
- 35 5.9.4 Macro Function SIO_DATAO_INIT()
- 35 5.9.5 Macro Function SIO_DATAO_OPEN()
- 36 5.9.6 Macro Function SIO_CLK_INIT()
- 36 5.9.7 Macro Function SIO_CLK_OPEN()
- 37 5.9.8 Macro Function SIO_ENABLE()
- 38 5.9.9 Macro Function SIO_DISABLE()
- 39 5.9.10 Macro Function SIO_TX_ENABLE()
- 40 5.9.11 Macro Function SIO_TX_DISABLE()
- 41 5.9.12 Macro Function SIO_TRX_ENABLE()
- 42 5.9.13 Macro Function SIO_TRX_DISABLE()
- 43 5.10 State Transition Diagram
- 44 6. Application Example
- 44 6.1 mtl_com.h (common header file)
- 44 (1) Defining the Header Files for the OS
- 44 (2) Defining the Header File with the Common Access Area Defined
- 44 (3) Defining the Loop Timer
- 44 (4) Defining the Endian Mode
- 45 (5) Defining High-Speed Endian Processing
- 45 (6) Defining the Standard Library to Be Used
- 45 (7) Defining the RAM Area to Be Accessed
- 46 6.1.1 mtl_tim.h
- 47 6.2 Setting up the Control Software for Clock Synchronous Single Master Operation
- 47 6.2.1 R_SIO.h
- 47 (1) Defining the Wait Time after Setting Up the BRR
- 47 6.2.2 R_SIO_csi.h
- 47 (1) Defining the Operating Mode to Be Used
- 47 (2) Defining the Form of CRC Calculation to Be Used
- 48 (3) Defining the Pins to Be Used
- 48 (4) Defining the Peripheral Enable Register
- 48 (5) Defining the CSI Channel to Be Used
- 49 (6) Defining the Operating Clock to Be Used in the Serial Clock Select Register (SPSm)
- 49 (7) Defining the Operating Clock (fMCK) Selection for the Channel to Be Used
- 49 (8) Defining the Serial Output Value
- 50 (9) Defining the Serial Output Level Register (SOLm)
- 50 (10) Defining the Port Input Mode Register (PIM) and the Port Output Mode Register (POM)
- 51 6.3 R_SIO_csi.c
- 51 6.4 Setting the definition of SFR
- 52 7. Usage Notes
- 52 7.1 Usage Notes to be Observed when Building the Sample Code
- 52 7.2 Unnecessary Functions
- 52 7.3 Using Other MCUs
- 52 7.4 Port Control for Serial Data and Clock Output Pins
- 52 7.5 Enabling/Disabling Clock Supply to the Serial Array Unit
- 52 7.6 Prohibition of Data Transmission and Reception
- 53 7.7 Setting Serial Output Level Register (SOLm)
- 53 7.8 About Warnings of Duplicate Type Declaration
- 55 Revision History
- 57 General Precautions in the Handling of Microprocessing Unit and Microcontroller Unit Products
- 58 Notice