RL78/G14, RL78/G1C, RL78/L12, RL78/L13, RL78/L1C Group Clock Synchronous Single Master Control Software Using CSI Mode of Serial Array Unit


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RL78/G14, RL78/G1C, RL78/L12, RL78/L13, RL78/L1C Group Clock Synchronous Single Master Control Software Using CSI Mode of Serial Array Unit | Manualzz

RL78/G14, RL78/G1C, RL78/L12, RL78/L13, RL78/L1C Group

Clock Synchronous Single Master Control Software Using CSI Mode of Serial Array Unit

7. Usage Notes

7.1 Usage Notes to be Observed when Building the Sample Code

To incorporate the sample code, include R_SIO.h and R_SIO_csi.h (after renaming R_SIO_csi.h.XXX).

7.2 Unnecessary Functions

Unused functions waste ROM capacity, so we recommend excluding them by commenting them out and so on.

7.3 Using Other MCUs

Other MCUs can easily be used.

The files to be prepared are as follows:

A common I/O module definition file corresponding to R_SIO_csi.h.XXX

A header definition file corresponding to mtl_com.h.XXX

Make them by referring the attachment.

7.4 Port Control for Serial Data and Clock Output Pins

To set these pins to function as ports, set to 1 the CKOmn and SOmn bits in the serial output register (SOm). The output from these pins is determined by an AND operation using the serial output register (SOm) setting and the output latch setting of the corresponding port registers (Pxx). When the CKOmn bit and SOmn bit are set to 1, the unmodified port register (Pxx) setting value becomes the output value of the corresponding pin.

7.5 Enabling/Disabling Clock Supply to the Serial Array Unit

In the sample code, supply of the clock is started by the serial I/O enable setting processing (R_SIO_Enable()), but no control over stopping the clock is provided by the serial I/O disable setting processing (R_SIO_Disable()). This is because it is assumed that other programs may be using the other channels of the same unit.

Therefore, the user should provide additional program code with the necessary control functions if there is a need to stop operation of individual units in order to reduce power consumption and noise, taking into account the control of channels other than the one used by the sample code.

Note that the sample code does provide the capability to stop operation of the channel used by the application.

7.6 Prohibition of Data Transmission and Reception

Do not perform serial data transmission or reception if the serial I/O function has not been enabled.

In the sample code, supply of the clock to the serial array unit starts when driver initialization processing

(R_SIO_Init_Driver()) is performed. Executing serial I/O data transmit processing (R_SIO_Tx_Data()) or serial I/O data receive processing (R_SIO_Rx_Data()) in this state will cause transmission or reception processing to start even though the correct register settings for the serial I/O function have not been completed. It is not possible for transmission or reception processing to proceed properly in this state because the register settings for items such as the baud rate are not correct.

To perform serial I/O data transmit processing (R_SIO_Tx_Data()) or serial I/O data receive processing

(R_SIO_Rx_Data()), first execute serial I/O enable setting processing (R_SIO_Enable()) to make the necessary register

settings related to serial I/O. Also refer to 5.10, State Transition Diagram.

R01AN1195EJ0105 Rev.1.05

Mar 31, 2016

Page 52 of 54

RL78/G14, RL78/G1C, RL78/L12, RL78/L13, RL78/L1C Group

Clock Synchronous Single Master Control Software Using CSI Mode of Serial Array Unit

7.7 Setting Serial Output Level Register (SOLm)

In CSI mode the inversion setting is prohibited. Set 1 in order to write 0 to the relevant SOLmn bit and reserved bits.

The reason for setting 1 is to contain the operation of writing 0 to the point that is set to 1 in the sample code,

Also refer to 6.2.2 (9), Defining the Serial Output Level Register (SOLm).

7.8 About Warnings of Duplicate Type Declaration

This driver has declared the intN_t and uintN_t that are declared in the "stdint.h". There is a possibility that the warning occurs when including the "stdint.h". If the type of declaration is unnecessary, delete the declaration of this driver.

R01AN1195EJ0105 Rev.1.05

Mar 31, 2016

Page 53 of 54

RL78/G14, RL78/G1C, RL78/L12, RL78/L13, RL78/L1C Group

Clock Synchronous Single Master Control Software Using CSI Mode of Serial Array Unit

Website and Support

Renesas Electronics Website http://www.renesas.com/

Inquiries http://www.renesas.com/contact/

All trademarks and registered trademarks are the property of their respective owners.

R01AN1195EJ0105 Rev.1.05

Mar 31, 2016

Page 54 of 54

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