UPD780208GF-XXX-3BA-A - Renesas Electronics

CHAPTER 12 A/D CONVERTER

12.4 A/D Converter Operations

12.4.1 Basic operations of A/D converter

[1] Set the number of analog input channels using the A/D converter input select register (ADIS).

[2] From among the analog input channels set by ADIS, select the channel for A/D conversion using the A/

D converter mode register (ADM).

[3] The sample & hold circuit samples the voltage input to the selected analog input channel.

[4] Sampling for the specified period of time sets the sample & hold circuit to the hold state so that the circuit holds the input analog voltage until the end of A/D conversion.

[5] Bit 7 of the successive approximation register (SAR) is set. The tap selector sets the series resistor string voltage tap to (1/2) AV

REF

.

[6] The voltage difference between the series resistor string voltage tap and analog input is compared by the voltage comparator. If the analog input is larger than (1/2) AV

REF

, the MSB of the SAR remains set.

If the input is smaller than (1/2) AV

REF

, the MSB is reset.

[7] Next, bit 6 of the SAR is automatically set and the operation proceeds to the next comparison. In this case, the series resistor string voltage tap is selected according to the preset value of bit 7 as described below.

• Bit 7 = 1: (3/4) AV

REF

• Bit 7 = 0: (1/4) AV

REF

The voltage tap and analog input voltage are compared and bit 6 of the SAR is manipulated using the result as follows.

• Analog input voltage

≥ Voltage tap: Bit 6 = 1

• Analog input voltage < Voltage tap: Bit 6 = 0

[8] Comparison of this sort continues up to bit 0 of the SAR.

[9] Upon completion of the comparison of 8 bits, an effective digital result value remains in the SAR and the result value is transferred to and latched in the A/D conversion result register (ADCR).

At the same time, the A/D conversion end interrupt request (INTAD) can also be generated.

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A/D converter operation

SAR

CHAPTER 12 A/D CONVERTER

Sampling time

Figure 12-4. Basic Operation of A/D Converter

Conversion time

A/D conversion Sampling

Undefined

80H

C0H or

40H

ADCR

INTAD

Conversion result

Conversion result

A/D conversion operations are performed continuously until bit 7 (CS) of ADM is reset (0) by software.

If a write to ADM is performed during an A/D conversion operation, the conversion operation is initialized, and if CS is set (1), conversion starts again from the beginning.

RESET input makes ADCR undefined.

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