STG3682
Low voltage high bandwidth dual SPDT switch
Features
■
■
■
■
■
■
■
■
Ultra low power dissipation:
– I
CC
= 0.2
µA (Max.) at T
A
= 85°C
Low “ON” resistance:
– R
ON
= 4.6
Ω (T
A
= 25°C) at V
– R
ON
= 5.8
Ω (T
A
= 25°C) at V
CC
= 4.3V
CC
= 3.0V
Wide operating voltage range:
– V
CC
(Opr) = 1.65V to 4.3V single supply
4.3V tolerant and 1.8V compatible threshold on digital control input at V
CC
= 2.3V to 3.0V
Typical bandwidth (-3dB) at 800MHz on all channels
Latch-up performance exceeds 100mA per
JESD 78, Class II
ESD performance exceeds JESD22
– 2000-V Human body model (A114-A)
USB (2.0) High speed (480Mbps) signal switching compliant
QFN10 (1.8mm x 1.4mm)
Description
The STG3682 is a high-speed CMOS low voltage dual analog S.P.D.T. (Single Pole Dual Throw)
Switch or 2:1 Multiplexer /Demultiplexer Switch fabricated in silicon gate C
2
MOS technology. It is designed to operate from 1.65V to 4.3V, making this device ideal for portable applications.
The nSEL inputs are provided to control the switch. The switch S1 is ON (they are connected to common Ports Dn) when the nSEL input is held high and OFF (high impedance state exists between the two ports) when SEL is held low; the switch S2 is ON (it is connected to common Port
D) when the nSEL input is held low and OFF (high impedance state exists between the two ports) when nSEL is held high.
Additional key features are fast switching speed,
Break Before Make Delay Time and Ultra Low
Power Consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage.
Table 1. Device summary
Order code
STG3682QTR
Package
QFN10 (1.8mm x 1.4mm)
Packaging
Tape and reel
July 2007 Rev 2 1/19 www.st.com
19
2
3
6
7
4
5
Contents
Contents
1
STG3682
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/19
STG3682
Figure 1.
Pin connection (top through view)
1S1
D1
1S2
1
2
3
10 9
4 5
8
7
6
2S2
D2
2S1
Pin settings
Table 2. Pin description
Pin N°
1,3,6,8
Symbol
1S1, 1S2, 2S1, 2S2
Name and function
Independent channels
2,7 D1,D2 channels
Note: Exposed pad must be soldered to a floating plane. Do NOT connect to power or ground.
3/19
Device summary
Figure 2.
Input equivalent circuit
D
SEL
Table 3. Truth table
SEL
H
L
1.
High impedance
Switch S1
ON
OFF
(1)
Switch S2
OFF
(1)
ON
S2
S1
STG3682
4/19
STG3682 Maximum rating
3.1
Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 4. Absolute maximum ratings
Symbol Parameter
I
IKC
I
IK
I
OK
I
O
V
CC
V
I
V
IC
V
O
I
OP
I
CC
or
I
GND
Supply voltage
DC input voltage
DC control input voltage
DC output voltage
DC input diode current on control pin (V
SEL
<0V)
DC input diode current (V
SEL
<0V)
DC output diode current
DC output current
DC output current peak (pulse at 1ms, 10% duty cycle)
DC V
CC
or ground current
P
D
Power dissipation at T
A
= 70°C
(1)
T stg
T
L
Storage temperature
Lead temperature (10 sec)
1.
Derate above 70ºC by 18.5mW/C
Value
-0.5 to 5.5
-0.5 to V
CC
+ 0.5
-0.5 to 5.5
-0.5 to V
CC
+ 0.5
-50
±50
±20
±128
±300
±100
1120
-65 to 150
300
Unit
V
V
V
V mA mA mA mA mA mA mW
°C
°C
Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter
V
CC
V
I
V
IC
V
O
T op
Supply voltage
(1)
Input voltage
Control input voltage
Output voltage
Operating temperature dt/dv
Input rise and fall time control input
V
CC
= 1.65V to 2.7V
V
CC
= 3.0 to 4.3V
1.
Truth Table guaranteed: 1.2V to 4.3V
Value
1.65 to 4.3
0 to V
CC
0 to 4.3
0 to V
CC
-40 to 85
0 to 20
0 to 10 ns/V
5/19
Unit
V
V
°C
V
V
Electrical characteristics STG3682
Table 6. DC specifications
Symbol Parameter
Vcc (V)
Test conditions
R
V
V
R
PEAK
R
∆R
IH
IL
ON
ON
FLAT
High level input voltage
Low level input voltage
Switch ON peak resistance
Switch On resistance
ON resistance match between channels
(1)
ON resistance flatness
(2)
1.65 -1.95
2.3-2.5
2.7-3.0
3.3-3.6
4.3
1.65-1.95
2.3-2.5
2.7-3.0
3.3-3.6
4.3
1.8
2.7
3.0
3.7
4.3
3.0
3.0
4.3
1.8
2.7
3.0
1.8
2.7
3.0
3.7
3.7
4.3
V
S
= 0V to V
CC
I
S
= 8mA
V
S
= 3V I
S
= 8mA
V
S
= 0.8V I
S
= 8mA
V
S
@ R
ON
Max
I
S
= 8mA
V
S
= 0V to V
CC
I
S
= 8mA
I
OFF
OFF state leakage current
(SN), (D)
4.3
V
S
= 0.3 or 4V
Value
Min
T
A
= 25°C
Typ Max
0.65V
CC
1.2
1.3
1.4
1.6
-40 to 85°C
Min Max
0.65V
CC
1.2
1.3
1.4
1.6
0.25
0.25
0.25
0.30
0.40
12.0
16.0
6.3
5.8
8.0
7.5
5.0
4.6
6.5
6.0
4.0
5.2
5.0
6.5
Unit
V
V
Ω
Ω
0.3
6.6
2.0
1.7
1.5
1.6
±20 ±100
Ω
Ω nA
6/19
STG3682 Electrical characteristics
Table 6. DC specifications
Symbol Parameter
Vcc (V)
Test conditions Value
Min
T
A
= 25°C
Typ Max
-40 to 85°C
Min Max
Unit
I
I
IN
CC
Input leakage current
Quiescent supply current
0 to 4.3
1.65 to 4.3
V
V
SEL
SEL
= 0 to 4.3V
= V
CC
or GND
±0.1
±0.1
±1
±1.0
µA
µA
I
CCLV
Quiescent supply current low voltage driving
4.3
V
1-2SEL,
V
V
3-4SEL
1-2SEL,
V
3-4SEL
= 1.65V
= 1.80V
±37 ±50
±33 ±40
±100
±50
V
1-2SEL,
V
3-4SEL
= 2.60V
±11 ±20 ±30
1.
Note 1:
∆Ron = max |mSN-nSN|, where m = 1..4 and n = 1..4, N = 1..2
2.
Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges.
µA
7/19
Electrical characteristics STG3682
Table 7. AC electrical characteristics (C
L
= 35pF, R
L
= 50
Ω, t r
= t f
≤
5ns)
Test conditions Value
Symbol Parameter
Vcc (V)
Min
T
A
= 25°C
Typ Max t
PLH
, t
PHL
Propagation delay
1.65-1.95
2.3-2.7
3.0-3.3
3.6-4.3
0.30
0.30
0.25
0.25
1.65-1.95
V
S
= 0.8V
31 t
ON
Turn-ON time
2.3-2.7
3.0-3.3
3.6-4.3
V
S
= 1.5V
20
15
12
26
20
15
V
S
= 0.8
t
OFF t
D
Q
Turn-OFF time
Break before make time delay
Charge injection
1.65-1.95
2.3-2.7
3.0-3.3
3.6-4.3
1.65-1.95
2.3-2.7
3.0-3.3
3.6-4.3
1.65
2.3
3.0
4.3
V
S
= 1.5V
C
L
= 35pF
R
L
= 50Ω
V
S
= 1.5V
C
L
= 100pF
V
GEN
= 0V
R
GEN
= 0Ω
1
1
1
1
4
3
2.8
3.5
3.8
5.0
22
14
11
10
7
5
18
14
13
-40 to 85°C
Min Max
Unit
23
18
17
34
26
20 ns ns ns ns pC
8/19
STG3682 Electrical characteristics
Table 8. Analog switch characteristics (C
L
= 5pF, R
L
= 50
Ω, T
A
= 25°C)
Symbol Parameter
Vcc (V)
Test conditions Value
T
A
= 25°C -40 to 85°C
Min Typ Max Min Max
OIRR OFF Isolation
(1)
Xtalk Crosstalk
BW -3dB bandwidth
D
G
D
P
Differential gain
Differential phase
1.65 - 4.3
V
S
= 1V
RMS, f = 1MHz
Signal = 0 dBm
V
S
= 1V
RMS, f = 10MHz
Signal = 0 dBm
1.65 - 4.3
V
S
= 1V
RMS, f = 1MHz
Signal = 0 dBm
3.0 - 4.3
V
S
= 1V
RMS, f = 10MHz
Signal = 0 dBm
R
L
= 50 Ω
Signal = 0dBm
3.0 - 4.3
RL = 150
Ω
3.0 - 4.3
RL = 150
Ω
-79
-60
-78
-61
800
0.64
0.1
C
IN
C
ON
C
OFF
Control pin input capacitance
Sn Port capacitance when switch is enabled
Sn Port capacitance when switch is disabled
3.3
3.3
V
CC
= 0V f = 1MHz f = 1MHz
6.2
12
5
1.
Off Isolation = 20Log10 (V
D
/V
S
), V
D
= output. V
S
= input to off switch.
Table 9. USB related AC electrical characteristics
Test conditions
Symbol Parameter
V
CC
(V) t
SK(0)
3.0 to 3.6
C
L
=10pF
Value
T
A
= 25°C -40 to 85°C
Min Typ Max Min Max
26 t
SK(P)
Channel-to-channel skew
Skew of opposite transition of the same output
3.0 to 3.6
60
T
J
Total jitter 3.0 to 3.6
C
L
=10pF t
R
R
L
= 50
Ω,
C
L
= 10pF,
= t
F
= 750ps at 480Mbps
130
Unit dB dB
MHz
% deg pF
Unit ps ps ps
9/19
Test circuits
5 Test circuits
Figure 3.
ON-resistance Figure 4.
Bandwidth
STG3682
Figure 5.
OFF leakage Figure 6.
Channel to channel crosstalk
Figure 7.
OFF isolation
10/19
STG3682
Figure 8.
Test circuit
Note: 1 C
L
= 5/35pF or equivalent: (includes jig capacitance)
2 R
L
= 50
Ω or equivalent
3 R
T
= Z
OUT of pulse generator (typically 50
Ω)
Test circuits
11/19
Test circuits
Figure 9.
Break-before-make time delay
Figure 10. Switching time and charge injection
(V
GEN
= 0V, R
GEN
= 0
Ω, R
L
= 1M
Ω, C
L
= 100pF)
Figure 11. Turn ON, turn OFF delay time
STG3682
12/19
STG3682
6 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
13/19
Package mechanical data
Table 10. QFN10L(1.8x1.4) Mechical data mm ref.
A3 0.127 e 0.40
Figure 12. Package dimension
STG3682
0.005
0.015
inch
0.017
0
0
0.006
0.066
0.051
0.011
0.021
0.002
0
0.010
0.074
0.059
0.020
14/19
STG3682 Package mechanical data
Figure 13. QFN10L (1.8mm x 1.4mm) foot print recommendation
Figure 14. QFN10L (1.8mm x 1.4mm) carrier type
15/19
Package mechanical data
Figure 15. QFN10L(1.8mm x 1.4mm) reel information
STG3682
16/19
STG3682
Figure 16. QFN10L(1.8mm x 1.4mm) reel information
Package mechanical data
17/19
Revision history
Table 11. Revision history
Date Revision
08-Jan-2007 1 First release
03-Jul-2007 2
Changes
Updated C
ON
, C
OFF
Table 8 on page 9
STG3682
18/19
STG3682
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19/19
