AMS AS6200 Environmental Sensor Datasheet


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AMS AS6200 Environmental Sensor Datasheet | Manualzz

General Description

Figure 1:

Added Value of Using AS6200

Benefits

High Measurement Accuracy

Low Power Consumption

Supply Voltage Range

Wide Operating Temperature

Small PCB Footprint

AS6200

Temperature Sensor

The AS6200 IC is a high accuracy temperature sensor system that communicates via a 2 wire digital bus with other devices.

It consists of a Si bandgap temperature sensor, an ADC and a digital signal processor.

It has a very high temperature accuracy (±0.4°C for AS6200) and an ultra-low power consumption (low operation and quiescent current) which makes it ideally suited for mobile/battery powered applications.

The AS6200 is an easy to integrate and use solution, featuring an factory calibrated sensor, integrated linearization and the possibility to use 2 different I²C addresses, enabling to use two

AS6200 devices on one bus.

Additionally the AS6200 temperature sensor system also features an alert functionality, which triggers e.g. an interrupt to protect devices from excessive temperatures.

Ordering Information

and

Content Guide appear at end of

datasheet.

Key Benefits & Features

The benefits and features of AS6200, Temperature Sensor are listed below:

Features

± 0.4°C (0°C to 65°C)

± 1°C (-40°C to 125°C)

(max. values)

6μA @Operation (typ. @4Hz)

0.1μA @Standby (typ.)

1.8V to 3.6V (0°C to 125°C)

-40°C to 125°C

1.5mm x 1.0mm (WLCSP)

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General Description

Applications

HVAC and thermostat controls

Medical instrumentation

• Body temperature measurement

Mobile devices

• Thermal monitoring for smartphones, tablets and cameras

• Smart watches and wearables

Industrial

• Industrial automation

• Cold chain monitoring

Figure 2:

Typical Application Environment of the AS6200 Temperature Sensor

VDD

Microcontroller

(Bus Master)

R

PU

Pull-up resistors

VDD

10nF

SDA

VDD

ADD0

Slave

SCL

VSS

ALERT

Address Select

In

Figure 2

a typical application of the AS6200 is shown. It is connected via a serial bus (I²C) with a microcontroller.

The sensor system is also connected to the microcontroller via the “Alert” pin which can be used to trigger events in case the temperature exceeds defined limits.

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General Description

Figure 3:

Functional Blocks of the AS6200

Block Diagram

The functional blocks of this device are shown below:

VDD

GND

Temperature

Sensor Analog

Frontend

A/D Converter

AS6200

Digital Signal

Processing

Oscillator

Registers

Control Logic

I 2 C Interface

Alert

ADD0

SCL

SDA

In Figure 3 all relevant blocks of the AS6200 temperature sensor

are shown. The sensing element is a Si bipolar transistor.

The analog signal is transformed by the A/D converter in a digital signal which is processed by the DSP and written into the registers.

The data in the register can be accessed by the serial bus (I²C).

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Pin Assignments

AS6200 −

Pin Assignments

Figure 4:

Pin Assignment WLCSP (Top View)

A

B

1

A1

ALERT

Columns

2

A2

VSS

3

A3

SCL

B1

ADD0

B2

VDD

B3

SDA

Top View

In

Figure 4

the pin assignment of the WLCSP package is shown.

A1 pin assignment is shown via a marking on the package (top side).

Figure 5:

Pin Description

Pin number

(WLCSP)

A1

A2

A3

B1

B2

B3

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Pin Name

ALERT

VSS

SCL

ADD0

VDD

SDA

Description

Alert Output (interrupt)

Ground Pin

Serial Interface Clock

Address Select Pin

Positive Supply Voltage

Serial Interface Data

In

Figure 5

the pins of the device are described. For the pins

“Alert”, “SDA” and “SCL” external pull up resistors are necessary.

The pin ADD0 needs to be connected and cannot be left unconnected (please refer to the bus address sections for more information).

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Absolute Maximum Ratings

Absolute Maximum Ratings

Stresses beyond those listed under

Absolute Maximum Ratings

may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under

Operating

Conditions

is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Figure 6:

Absolute Maximum Ratings

Symbol

V

DD

/V

SS

I

SCR

ESD

HBM

T

A

T

J

T

STRG

Parameter Min Max Units Comments

Electrical Parameters

Supply Voltage to

Ground

Input Current (latch-up immunity)

-0.3

-100

4

100

V mA JEDEC JESD78D

Electrostatic Discharge

Electrostatic Discharge

HBM

±2 kV MIL-STD-833J-3015.9

Temperature Ranges and Storage Conditions

Operating Temperature -40 125 °C

Junction Temperature

Storage Temperature

Range

-55

125

125

°C

°C

T

BODY

Package Body

Temperature

260 °C

IPC/JEDEC J-STD-020

The reflow peak soldering temperature (body temperature) is specified according to IPC/JEDEC

J-STD-020 “Moisture/Reflow

Sensitivity Classification for

Non-hermetic Solid State Surface

Mount Devices.”

RH

NC

MSL

Relative Humidity non-condensing

Moisture Sensitivity

Level

5

1

85 %

Maximum floor life time is unlimited

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Electrical Characteristics

Electrical Characteristics

Operating Conditions

Figure 7:

Operating Conditions

Symbol

VDD

T_AMB

Parameter

DC supply voltage

Ambient temperate

Min Typ

3.0

1.8

-40

Max

3.6

125

Units

V

°C

Note

Reference to VSS

Analog System Parameters

Figure 8:

Analog System Parameters

Symbol

VDD

T

IDD

IDD

T_ERR

N

TS

NS

Parameter

Supply voltage

Temperature range

Standby consumption

Current consumption

(4 conversions/s)

Accuracy

(1)

Resolution

Conversion time

Conversion rate

Min

1.8

2.0

-40

-0.4

-1

24

TRise_VDD Supply voltage rise time

SR_VDD Supply voltage slew rate 50

12

34

0.25

1

4

8

Typ

3.0

3.0

0.1

0.3

6

46

0.35

1.35

5.5

10.7

20

Max

3.6

3.6

125

0.4

9.0

7

16

0.4

1

Unit Note

V

T = 0°C to 125°C

T = -40°C to 125°C

°C

μA

μA

°C

T= -40°C to 65°C

T= 65°C to 125°C

T = -40°C to 65°C

Serial bus inactive

T = 65°C to 125°C

Serial bus inactive

T = 0°C to 65°C

T = -40°C to 125°C bit ms

Conv/s

CR[1:0]=00

CR[1:0]=01

CR[1:0]=10

CR[1:0]=11 ms 0.1V to 1.6V

mV/ms 0.1V to 1.6V

Note(s):

1. The accuracy is based on measurements and reflects 4,5 σ statistics.

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Detailed Descriptions

Detailed Descriptions

Figure 9:

Register Map with Serial Interface

The AS6200 is a complete sensor system that has an integrated temperature sensing element, the analog frontend, the A/D converter and the digital signal processing part.

The digital signal processing part consists of the signal processor, the registers and the serial bus interface.

For block diagram please refer to

Figure 3

.

In

Figure 8

an overview of the analog system parameters is given.

The current consumption with fewer conversions per second is lower than the values mentioned in

Figure 8 .

Digital System Parameters

The device contains the following data registers as depicted in the following figure:

0x0

0x1

0x2

0x3

TVAL (Read Only)

CONFIG (Read/Write)

TLOW (Read/Write)

THIGH (Read/Write)

INDEX (Read/Write)

Serial Interface

SCLK

SDA

With the use of the index register, it is possible to address the specific data register. The index register is an 8-bit register, where only bits 0 and 1 are used as shown in

Figure 10

and all other bits are set to 0 and read only.

Figure 10:

Index Register

Bit

Value

D7

0

D6

0

D5

0

D4

0

D3

0

D2

0

D1 D0

Address Bits

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Detailed Descriptions

The two-bit address selects the register to be accessed by the serial interface as shown in the following table.

Figure 11:

Register Map

Address

0x0

0x1

0x2

0x3

Symbol

TVAL

CONFIG

TLOW

THIGH

Register

Temperature Register

Configuration Register

T

LOW

Register

T

HIGH

Register

Description

Contains the temperature value

Configuration settings of the temperature sensor

Low temperature threshold value

High temperature threshold value

This means that in order to access the different registers, the index register must be set accordingly. With the exception of the TVAL register (which contains the temperature value data), all registers are read/write accessible.

Configuration Register

The configuration register is a 16-bit register which defines the operation modes of the device. Any read/write operations processes the MSB byte first.

Figure 12:

Configuration Register

Bit

R/W

Bit

Default

RW

SS

0

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

RO

Reserved

1 0

CF

0 0

MSB Byte

RW

POL IM SM

0 0 0 1

CR

0

RO RW

AL

1 0 0

LSB Byte

RO

Reserved

0 0 0

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In

Figure 12

the configuration register is shown. The bits D0-3 and D13-14 are not to be used and are set to read only. The bit

D4 is RW and must not be changed from the default value. The explanation of the other bits are detailed in the following sections.

Alert, Bit D5

The alert bit can be used to easily compare the current temperature reading to the thresholds that can be set in the

TLOW and THIGH registers.

If the polarity bit is set to 0, the AL bit is read as 1 until the converted temperature value exceeds the defined value in the high temperature threshold register THIGH for the number of defined consecutive faults (bits CF). Such an event causes the

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Detailed Descriptions

AL bit to toggle to 0 and the value is kept until the converted temperature value falls below the defined value in the low temperature threshold register TLOW for the number of defined consecutive faults. If this condition is met, the AL bit is reset to 1.

The polarity bit (POL) defines the active state of the alert bit as depicted in the following figure.

The alert bit has the same setting as the alert output as long as the device is configured for the comparator mode.

Figure 13:

State Diagram of the Alert Bit

POL = 0:

AL = 1

T < TLOW for N consecutive cycles

AL = 0

T > THIGH for N consecutive cycles

T < TLOW for N consecutive cycles

POL = 1:

AL = 0

AL = 1

T > THIGH for N consecutive cycles

Conversion Rate, Bit D6-D7

The conversion rate bits define the number of executed temperature conversions per time unit. Additional readouts of the temperature register between conversion is possible but not recommended because the value is changed only after a conversion is finished.

Values of 125ms, 250ms, 1s and 4s per conversion can be configured while the default rate is set to 250ms. This corresponds to a value of 4 conversions per second.

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Detailed Descriptions

The following table summarizes the different configuration settings:

Figure 14:

Conversion Rate Configuration

CR Bits

Conversion Rate

D7

1

1

0

0

D6

0

1

0

1

0.25 /s

1 /s

4 /s

8 /s

The device immediately starts a conversion after a power-on sequence and provides the first result after typ. 34ms (max.

46ms). A higher power consumption occurs during the actual conversion while the device stays in the standby mode after a finished conversion until the next conversion is activated as shown in the following figure.

Figure 15:

Conversion Sequence

Powerup

Standby

Active

Standby

TS

Conversion Rate

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Sleep Mode, Bit D8

The sleep mode is activated by setting the bit SM in the configuration register to 1. This shuts the device down immediately and reduces the power consumption to a minimum value.

Entering the sleep mode will take some time (120ms maximum) and the first conversion after the sleep mode has been entered takes longer than the values specified in

Figure 8 . It is therefor

recommended when entering sleep mode to trigger a single shot conversion at the same time. After 150ms, the device has then entered the sleep mode and subsequent conversion times are as specified in

Figure 8 .

The serial interface is the only active circuitry in the sleep mode in order to provide access to the digital registers.

After resetting the SM bit to 0, the device enters the continuous conversion mode.

Figure 16:

Sleep Mode Configuration

SM Bit

0

1

Operation Mode

Continuous Conversion Mode

Sleep Mode

Interrupt Mode, Bit D9

The interrupt mode bit defines whether the device operates in the temperature comparator mode or interrupt mode. This defines the operation mode of the ALERT output as described in the polarity bit section.

Figure 17:

Interrupt Mode Configuration

IM Bit

0

1

Operation Mode

Comparator Mode

Interrupt Mode

The comparator mode is characterized that if the temperature value exceeds the THIGH value, the alert output is changed (e.g. from high to low if the polarity bit is set to 0 and vice versa).

The alert output stays in that condition until the measured temperature drops below the defined TLOW value.

The interrupt mode is characterized that it changes the alert output as soon as the measured temperature crosses the THIGH or TLOW value threshold.

The alert bit has the same setting as the alert output if the device is set to comparator mode.

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Detailed Descriptions

Figure 18:

ALERT Output Functionality

Converted Temperature

(TVAL)

THIGH

TLOW

ALERT

IM=0, POL=0

H

L

ALERT

IM=1, POL=0

H

L

ALERT

IM=0, POL=1

H

L

ALERT

IM=1, POL=1

H

L

T

HIGH

T

LOW t

Read Read Read

Polarity, Bit D10

The polarity bit configures the polarity of the ALERT output. If the polarity bit is cleared, the ALERT output is low active while it becomes high active if the polarity bit is set to ‘1’.

Figure 19:

Polarity Bit Configuration

POL Bit

0

1

ALERT Output

Active low

Active high

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Detailed Descriptions

Consecutive Faults, Bits D11-D12

A fault condition persists if the measured temperature either exceeds the configured value in register THIGH or falls below the defined value in register TLOW. As a result, the ALERT pin indicates the fault condition if a defined number of consecutive temperature readings meets this fault condition. The number of consecutive faults are defined with two bits (D12 and D11) and prevent a false alert if environmental temperature noise is present. The register configuration is shown in the following table.

Figure 20:

Consecutive Faults Bit Settings

D12

1

1

0

0

CF Bits

D11

0

1

0

1

Consecutive Faults (N)

4

6

1

2

Single Shot Conversion, Bit D15

The device features a single shot measurement mode if the device is in sleep mode (SM=1). By setting the “Single Shot-bit” to 1, a single temperature conversion is started and the SS-bit can be read as 1 during the active conversion operation. Once the conversion is completed, the device enters the sleep mode again and the SS-bit is set to 0. The single shot conversion allows very low power consumption since a temperature conversion is executed on demand only. This allows a user defined timing of the temperature conversions to be executed and is used if the consecutive operation mode is not required.

The first conversion triggered in this mode has a longer conversion time. In the section

Sleep Mode, Bit D8 this is

detailed together with the recommendation to trigger the first conversion simultaneously with entering the sleep mode.

As the device exhibits a very short conversion time, the effective conversion rate can be increased by setting the single shot bit repetitively after a conversion has finished. However, it has to be ensured that the additional power is limited, otherwise self-heating effects have to be considered.

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Detailed Descriptions

Figure 21:

Single Shot Conversion Bit Settings

SS Bit

0

1

Conversion

No conversion ongoing/conversion finished

Start Single Shot conversion/conversion ongoing

High- and Low-Limit Registers

If the comparator mode is configured (IM=0), the ALERT output becomes active if the temperature equals or exceeds the defined value in register THIGH for the configured number of consecutive faults (N). This configuration is defined by the field

CF in the configuration register. The ALERT output remains assigned until the converted temperature value equals or falls below the defined value in register TLOW for the same number of consecutive fault cycles.

If the interrupt mode is configured (IM=1), the ALERT output becomes active if the temperature equals or exceeds the defined value in register THIGH for the configured number of consecutive fault cycles. It remains active until a read operation is executed on any register. The ALERT output is also cleared if the device is set into sleep mode by setting bit SM in the configuration register.

Once the ALERT output is cleared, it is activated again only if the temperature value falls below the configured value in register TLOW. It remains active unless a read operation has taken place.

This sequence is repeated unless the device is set into the comparator mode or reset by the General Call Reset command.

This reset command clears the interrupt mode bit and consequently puts the device into the comparator mode.

The sequential behavior is summarized in the following figure.

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Detailed Descriptions

Figure 22:

ALERT Operation Modes

Comparator Mode

ALERT output cleared

T ≤ TLOW for

N consecutive cycles

T ≥ THIGH for

N consecutive cycles

ALERT output active

General Reset

Command

IM=0 IM=1

Read operation or

Set to sleep mode

ALERT output active

Interrupt Mode

ALERT output cleared

T ≥ THIGH for

N consecutive cycles

ALERT output active

T ≤ TLOW for

N consecutive cycles

ALERT output cleared

Read operation or

Set to sleep mode

The following table defines the content of the registers TLOW and THIGH. For data transmission, the MSB byte is transmitted first, followed by the LSB byte. The data format for representing the threshold temperatures is equal to the temperature register

(TVAL). After a power-up, the registers are initialized with the following default values:

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Figure 23:

Default Values for THIGH and TLOW

Register Temperature

TLOW

THIGH

75°C

80°C

Binary Value (12-Bit)

L11..L0 = 0100 1011 0000

H11..H0 = 0101 0000 0000

The following table defines the register bits of the THIGH and

TLOW register.

Figure 24:

Register Bit Settings for THIGH/TLOW

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

H11 H10 H9 H6 0 0 0 H8 H7

MSB Byte

H5 H4 H3 H2 H1 H0 0

LSB Byte

Temperature Register

The temperature register contains the digitally converted temperature value and can be read by setting the index pointer to the TVAL register (0x0).

Figure 25:

Temperature Value Register

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

T11 T10 T9 T6 T5 T4 T3 T2 T1 0 0 0 T8 T7

MSB Byte

T0 0

LSB Byte

Two consecutive bytes must be read to obtain the complete temperature value. The MSB byte (Bits D15…D8) is transmitted upon the first read access and the LSB byte (Bits D7…D0) is transmitted after the second read access. The least significant bits D3…D0 are set to 0.

A temperature value is represented as a two complement value in order to cover also negative values. After power-up, the temperature value is read as 0°C until the first conversion has been completed. One LSB corresponds to 0.0625°C.

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The binary values can be calculated according to the following formulas:

Positive values:

|Value| / LSB

Negative values:

Complement( |Value| / LSB ) + 1

Example 75°C:

75ºC / 0.0625ºC = 1200 = Binary 0100 1011 0000 = Hex 4B0

Example -40°C:

|-40ºC| / 0.0625ºC + 1 = 640 + 1 = Binary 0010 1000 0000 + 1 =

1101 0111 1111 + 1 = 1101 1000 0000 = Hex D80

Figure 26:

Temperature Conversion Examples

Temperature (°C)

100.0

75.0

50.0

25.0

0.125

0.0625

0.0

-0.0625

-0.125

-25.0

-40.0

Digital Output (Binary)

0110 0100 0000

0100 1011 0000

0011 0010 0000

0001 1001 0000

0000 0000 0010

0000 0000 0001

0000 0000 0000

1111 1111 1111

1111 1111 1110

1110 0111 0000

1101 1000 0000

Digital Output (Hex)

FFE

E70

D80

002

001

000

FFF

640

4B0

320

190

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Detailed Descriptions

Serial Interface

The device employs a standard I²C-Interface.

Bus Description

A data transfer must be invoked by a master device (e.g. microcontroller) which defines the access to the slave device.

The master device defines and generates the serial clock (SCL) and the start/stop conditions.

In order to address a specific device, a START condition has to be generated by the master device by pulling the data line (SDA) from a logic high level to a logic low level while the serial clock signal (SCL) is kept at high level.

After the start condition, the slave address byte is transmitted which is completed with a ninth bit which indicates a read

(bit=’1’) or a write operation (bit=’0’) respectively. All slaves read the data on the rising edge of the clock. An acknowledge signal is generated by the addressed slave during the ninth clock pulse. This acknowledge signal is produced by pulling the pin SDA to a low level by the selected slave.

Subsequently, the byte data transfer is started and finished by an acknowledge bit. A change in the data signal (SDA) while the clock signal (SCL) is high causes a START or STOP condition.

Hence, it must be ensured such a condition is prevented during a data transfer phase.

After completing the data transfer, the master generates a STOP condition by pulling the data line (SDA) from low level to high level while the clock signal (SCL) is kept at high level.

Data Interface

A bus connection is created by connecting the open drain input/output lines SDA and SCL to the two wire bus. The inputs of SDA and SCL feature Schmitt-trigger inputs as well as low pass filters in order to suppress noise on the bus line. This improves the robustness against spikes on the two wire interface.

Both fast transmission mode (1kHz to 400kHz) and high-speed transmission mode (1kHz to 3.4MHz) are employed to cover different bus speed settings.

Any data transfer transmits the MSB first and the LSB as last bit.

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Bus Address

A slave address consists of seven bits, followed by a data direction bit (read/write operation). The slave address can be selected from a pool of two different address settings by connecting the input pin ADD0 to an appropriate signal as summarized in the following table.

The ADD0 must not be left unconnected.

Figure 27:

I²C Address Select Configuration

ADD0 Connection

VSS

VDD

Device Address (bin)

100 1000

100 1001

Device Address (hex)

0x48

0x49

Read/Write Operation

In order to access an internal data register, the index register must be written in advance. This register contains the actual register address and selects the appropriate register for an access. A typical transfer consists of the transmission of the slave address with a write operation indication, followed by the transmission of the register address and is finalized with the actual register content data transfer. This implies that every write operation to the temperature sensor device requires a value for the index register prior to the transmission of the actual register data.

The index register defines the register address for both the write and read operation. Consequently, if a read operation is executed, the register address is taken from the index register which was defined from the last write operation.

If a different register needs to be read, the index register has to be written in advance to define the new register address. This is accomplished by transmitting the slave address with a low

R/W bit, followed by the new content of the index register.

Subsequently, the master provokes a START condition on the bus and transmits the slave address with a high R/W bit in order to initiate a read operation.

Since the index register always keeps its last value, reads can be executed repetitively on the same register.

Similarly to the byte transfer where the MSB is transmitted first, the transfer of a 16-bit word is executed by a two byte transfer whereas the MSB byte is always transmitted first.

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Detailed Descriptions

Slave Operation

The device employs a slave functionality only (slave transmitter and slave receiver) and cannot be operated as a bus master.

Consequently, the device never actively drives the SCL line.

Slave Receiver Mode

Any transmission is invoked by the master device by transmitting the slave address with a low R/W bit. Subsequently, the slave device acknowledges the reception of the valid address by pulling the ninth bit to a low level. Following to acknowledge, the master transmits the content of the index register. This transfer is again acknowledged by the slave device. The next data byte(s) are written to the actual data register which is selected by the index register while each transfer is acknowledged upon a completed transfer by the slave device. A data transfer can be finished if the master transmits a START or a STOP condition on the bus.

Slave Transmitter Mode

The master transmits the slave address with a high R/W bit. In turn, the slave acknowledges a valid slave address.

Subsequently, the slave transmits the MSB byte of the actual selected data register by the index register. After the MSB byte transmission, acknowledge is sent by the master. Afterwards, the LSB byte is transmitted by the slave which is also acknowledged by the master after the completed transmission.

The data transfer can be terminated by the master by transmitting a Not-Acknowledge after the transmitted slave data or by invoking a START or a STOP condition on the bus.

Alert Function

If the device is configured for an interrupt mode operation

(IM=1), the ALERT output can be used as an alert signal.

If the polarity bit is set to ‘0’ (POL=’0’), the alert condition bit is set to ‘0’ in case the temperature has exceeded the configured value in register THIGH. Accordingly, the alert condition bit is set to ‘1’ if the temperature has fallen below the configured value in register TLOW.

If the polarity bit is set to ‘1’ (POL=’1’), the alert condition bit is inverted. The following table summarizes the status of the alert condition bit with different alert conditions and polarity configurations.

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Figure 28:

Alert Condition Bit

POL

1

1

0

0

Alert Condition

T

THIGH

T ≤ TLOW

T

THIGH

T ≤ TLOW

Alert Condition Bit

(AC-Bit)

1

0

0

1

High Speed Mode

The bus operation is limited to 400kHz unless a high speed command is issued by the master device as the first byte after a START condition. This switches the bus to a high speed operation which allows data transfer frequencies up to 3.4MHz.

Such a command is not acknowledged by the slave but the input filter time constants on the serial interface (SDA and SCL) are adapted to allow the higher transfer rate.

After a high speed command, the slave address is transmitted by the master in order to invoke a data transfer. The bus keeps operating at the higher operating frequency until the master issues a STOP condition on the serial bus. Upon the reception of the STOP condition by the slave, the input filters are switched to their initial time constants which allow lower transfer rates only.

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AS6200 −

Detailed Descriptions

Summary of Bus Commands

Figure 29:

Summary of Bus Commands

Command

High Speed Command

Address Data Value

0000 1xxx

General Call

A general call is issued by the master by transmitting the general call address (000 0000) with a low R/W bit. When this command is issued on the bus, the device acknowledges this command. The device also acknowledges the second byte but ignores the data. Subsequent bytes sent by the master during the general call are not acknowledged.

Start Byte

When the master transmits address 000 0000 and a high R/W bit (“START byte”) the device acknowledges the address. The device then sends the MSB data byte and LSB data byte, where the data corresponds to the content of the register whose address has been last written to. After reset this corresponds to the temperature register.

Timeout Function

The serial interface of the slave device is reset if the clock signal

SCL is kept low for typ. 30ms. Such a condition results in a release of the data line by the slave in case it has been pulled to low level. The slave remains inactive after a timeout and waits for a new START command invoked by the bus master. In order to prevent a timeout, the bus transfer rate must be higher than

1kHz.

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AS6200 −

Detailed Descriptions

Bus Conditions

The following conditions occur on the serial bus which is compatible to the I²C-Bus.

• Bus Idle:

The signals SDA and SCL are not actively driven and pulled to a high level by an external pull-up resistor.

• Start Data Transfer:

A transition of the SDA input from high to low level while the SCL signal is kept at high level results in a START condition. Such a START condition must precede any data transfer.

• Stop Data Transfer:

A transition of the SDA input from low to high level while the SCL signal is kept at high level results in a STOP condition. Any data transfer is finished by generating a STOP or START condition.

• Data Transfer:

The master device defines the number of data bytes between a START and STOP condition and there is no limitation in the amount of data to be transmitted.

If it is desired to read only a single MSB byte without the

LSB byte, a termination of the data transfer can be provoked by issuing a START or STOP condition on the bus.

• Acknowledge:

It is mandatory for each slave device to respond with acknowledge if the device is addressed by the master. Acknowledge is indicated by pulling down the data line (SDA) while the clock signal (SCL) is high in the acknowledge clock phase. In order to avoid an unwanted

START or STOP condition on the bus, setup and hold times must be met.

The master can signal an end of data transmission by transmitting a Not-Acknowledge on the last transmitted data byte by keeping the acknowledge bit at high level.

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Figure 30:

Serial Interface Timing Diagram

SCL

STOP START t

LOW t

RISE t

HIGH

Timing Characteristics

START t

FALL

SDA t

BUF t

HDSTA t

SUDAT t

HDDAT t

SUSTA

AS6200 −

Detailed Descriptions

t

SUSTO

STOP

Figure 31:

Bus Timing Specifications

Parameter

SCL Clock Frequency

Bus free time between STOP and

START condition

Hold time after repeated START condition

Repeated START condition setup time

Data in hold time

Data out hold time

(1)

Data setup time

SCL clock low period

SCL clock high period

Clock/Data fall time

Clock/Data rise time

Clock/Data rise time for SCL≤100kHz

Symbol

f

SCL t

BUF

Fast Mode

Min Max

0.001

0.4

600 t

HDSTA t

SUSTA t

HDDAT t

DH t

SUDAT t

LOW t

HIGH t

F t

R t

R

100

100

10

100

100

1300

600

300

300

1000

100

100

10

100

10

160

60

High Speed Mode

Min Max

0.001

3.4

Unit

MHz

160 ns

160

160

ns ns ns ns ns ns ns ns ns ns

Note(s):

1. The device will hold the SDA line high for 100 ns during the falling edge of the SCL.

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AS6200 −

Detailed Descriptions

Timing Diagrams

The following timing diagrams depict the different bus operation modes and data transmission.

Figure 32:

Timing Diagram for Word Write

1 2

Frame 1: Slave Address Byte

3 4 5 6 7 8 9 1 2

Frame 2: Index Register Byte

3 4 5 6 7 8 9

SCL

SDA

Start by master

1 0 0 1 0 A1 A0 R/W

Values are defined by

ADD0 pin setting

Acknowledge by slave

0 0 0 0 0 0 IX1 IX0

Acknowledge by slave

1 2

Frame 3: MSB Data Byte

3 4 5 6 7 8 9 1 2

Frame 4: LSB Data Byte

3 4 5 6 7 8 9

SCL

(Continued)

SDA

(Continued)

D7 D6 D5 D4 D3 D2 D1 D0

Acknowledge by slave

D7 D6 D5 D4 D3 D2 D1 D0

Acknowledge by slave

Stop by master

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AS6200 −

Detailed Descriptions

Figure 33:

Timing Diagram for Word Read

1 2

Frame 1: Slave Address Byte

3 4 5 6 7 8 9 1 2

Frame 2: Index Register Byte

3 4 5 6 7 8 9

SCL

SDA

1 0 0 1 0 A1 A0 R/W 0 0 0 0 0 0 IX1 IX0

Start by master

Values are defined by

ADD0 pin setting

Acknowledge by slave

1 2

Frame 3: Slave AddressByte

3 4 5 6 7 8 9

Acknowledge by slave

Stop by master

1

Frame 4: Register MSB Data Byte

2 3 4 5 6 7 8 9

SCL

(Continued)

SDA

(Continued)

Start by master

1 0 0 1 0 A1 A0 R/W

Acknowledge by slave

D7 D6 D5 D4 D3 D2 D1 D0

Acknowledge by master

1

Frame 5: Register LSBData Byte

2 3 4 5 6 7 8 9

D7 D6 D5 D4 D3 D2 D1 D0

Acknowledge by master

Stop by master

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AS6200 −

Application Information

Application Information

Figure 34:

Typical Application for the AS6200 Temperature Sensor

VDD

Microcontroller

(Bus Master)

R

PU

Pull-up resistors

VDD

10nF

SDA

VDD

ADD0

Slave

SCL

VSS

ALERT

Address Select

In

Figure 34

the connections of the AS6200 temperature sensors to a microcontroller and the supply voltage are shown.

The AS6200 is connected to a microcontroller via an I²C bus

(SDA and SCL only). Additionally the Alert output can also be used for temperature monitoring (e.g. using the interrupt mode, refer to IM bit settings), an example is given in

Figure 34

where the Alert output is connected to a microcontroller.

The I²C of the AS6200 address of the can be selected by connecting the ADD0 pin to VDD or VSS (refer to

Figure 27 ). This

pin must not be left unconnected.

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External Components

Figure 35:

Schematic with External Components

VDD

R

PU

SCL

SDA

VDD

Decoupling

Cap

Pull-up resistors

SDA

VDD

ADD0

Slave

SCL

VSS

ALERT

ALERT

AS6200 −

Application Information

Figure 36:

Values for External Components

Parameter

Decoupling capacitor

Pull-up resistors

Min

10

10

Max Unit

nF k

Ω

18

In

Figure 35

and

Figure 36 the schematics for external

components are shown.

The decoupling capacitor for the supply should have a value of at least 10 nF.

The pull-up resistors on the serial interface and the interrupt also depend on the bus capacitance and on the clock speed, in

Figure 36 recommended values are given.

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AS6200 −

Package Drawings & Markings

Package Drawings & Markings

Figure 37:

Mechanical Dimensions of the WLCSP Package

A

1

A1

ALERT

Columns

2

A2

VSS

3

A3

SCL

B

B1

ADD0

B2

VDD

B3

SDA

Top View

A

A3

SCL

3

Columns

2

A2

VSS

A1

ALERT

1

B

B3

SDA

Bottom

View ax

B2

VDD

B1

ADD0 dx

X dx d ax

RoHS

Green

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AS6200 −

Pack age Drawings & Mark ings

Figure 38:

Mechanical Specifications of WLCSP Package

Symbol

(1)

ax dx

X

Y ay dy d

Thickness (w.o. balls)

Thickness after reflow

Min

Dimension [µm]

Typ Max

1450

960

1530

1040

347.5

400

302.5

400

250

400

525

Note(s):

1. As used in

Figure 37

Figure 39:

Marking of WLCSP Package (Top View)

z

XXXX

AS6200

Figure 40:

Package Code

XXXX

Tracecode

ams Datasheet

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AS6200 −

Ordering & Contact Information

Ordering & Contact Information

Figure 41:

Ordering Information

Ordering Code Package Marking

AS6200-AWLT-S

AS6200-AWLT-L

WLCSP

WLCSP

AS6200

AS6200

Delivery Form

7” Tape and Reel in dry pack

13” Tape and Reel in dry pack

Delivery Quantity

500 pcs/reel

5000 pcs/reel

Buy our products or get free samples online at: www.ams.com/Products

Technical Support is available at: www.ams.com/Technical-Support

Provide feedback about this document at: www.ams.com/Document-Feedback

For further information and requests, e-mail us at: [email protected]

For sales offices, distributors and representatives, please visit: www.ams.com/Contact

Headquarters

ams AG

Tobelbader Strasse 30

8141 Premstaetten

Austria, Europe

Tel: +43 (0) 3136 500 0

Website: www.ams.com

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AS6200 −

RoHS Compliant & ams Green Statement

RoHS Compliant & ams Green

Statement

RoHS:

The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories plus additional 4 substance categories (per amendment EU 2015/863), including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specified lead-free processes.

ams Green (RoHS compliant and no Sb/Br/Cl):

ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants

(Br or Sb do not exceed 0.1% by weight in homogeneous material) and do not contain Chlorine (Cl not exceed 0.1% by weight in homogeneous material).

Important Information:

The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

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ams Datasheet

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AS6200 −

Copyrights & Disclaimer

Copyrights & Disclaimer

Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten,

Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner.

Devices sold by ams AG are covered by the warranty and patent indemnification provisions appearing in its General Terms of

Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein. ams AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied warranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed.

ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of ams AG rendering of technical or other services.

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AS6200 −

Document Status

Document Status

Document Status

Product Preview

Preliminary Datasheet

Datasheet

Datasheet (discontinued)

Product Status

Pre-Development

Pre-Production

Production

Discontinued

Definition

Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice

Information in this datasheet is based on products in the design, validation or qualification phase of development.

The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice

Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of

Trade

Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of

Trade, but these products have been superseded and should not be used for new designs

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ams Datasheet

[v1-05] 2020-Mar-12

AS6200 −

Revision Information

Revision Information

Changes from 1-04 (2019-May-16) to current revision 1-05 (2020-Mar-12)

Updated Figure 8

Updated information about conversion time

Added information about time to enter sleep mode and recommendation how to enter sleep mode

Added information concerning longer conversion time for first single shot

Updated Figure 29

(removed Device Initialization and General Address Acquire)

Added “General Call” and “Start Byte”

Note(s):

1. Page and figure numbers for the previous version may differ from page and figure numbers in the current revision.

2. Correction of typographical errors is not explicitly mentioned.

Page

6

10

22

22

11

13

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Content Guide

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AS6200 −

Content Guide

1 General Description

1 Key Benefits & Features

2 Applications

3 Block Diagram

4 Pin Assignments

5 Absolute Maximum Ratings

6 Electrical Characteristics

6 Operating Conditions

6 Analog System Parameters

7 Detailed Descriptions

7 Digital System Parameters

8 Configuration Register

8 Alert, Bit D5

9 Conversion Rate, Bit D6-D7

11 Sleep Mode, Bit D8

11 Interrupt Mode, Bit D9

12 Polarity, Bit D10

13 Consecutive Faults, Bits D11-D12

13 Single Shot Conversion, Bit D15

14 High- and Low-Limit Registers

16 Temperature Register

18 Serial Interface

18 Bus Description

18 Data Interface

19 Bus Address

19 Read/Write Operation

20 Slave Operation

20 Slave Receiver Mode

20 Slave Transmitter Mode

20 Alert Function

21 High Speed Mode

22 Summary of Bus Commands

22 General Call

22 Start Byte

22 Timeout Function

23 Bus Conditions

24 Timing Characteristics

25 Timing Diagrams

27 Application Information

28 External Components

29 Package Drawings & Markings

31 Ordering & Contact Information

32 RoHS Compliant & ams Green Statement

33 Copyrights & Disclaimer

34 Document Status

35 Revision Information

ams Datasheet

[v1-05] 2020-Mar-12

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