STMicroelectronics LED2001 Datasheet
تبلیغات
تبلیغات
LED2001
Datasheet
4 A monolithic step-down current source with synchronous rectification
Product status link
LED2001
Features
• 3.0 V to 18 V operating input voltage range
• 850 kHz fixed switching frequency
• 100 mV typ. current sense voltage drop
• PWM dimming
• ± 7% output current accuracy
• Synchronous rectification
• 95 mΩ HS/ 69 mΩ LS typical R
DS(on)
• Peak current mode architecture
• Embedded compensation network
• Ceramic output capacitor compliant
• Internal current limiting
• Thermal shutdown
Applications
• High brightness LED driving
• Signage
• Halogen bulb replacement
• General lighting
Description
The LED2001 is an 850 kHz fixed switching frequency monolithic step-down DC-DC converter designed to operate as precise constant current source with an adjustable current capability up to 4 A DC. The embedded PWM dimming circuitry features LED brightness control. The regulated output current is set connecting a sensing resistor to the feedback pin. The embedded synchronous rectification and the 100 mV typical
R
SENSE
voltage drop enhance the efficiency performance.
The size of the overall application is minimized thanks to the high switching frequency and ceramic output capacitor compatibility. The device is fully protected against thermal overheating, overcurrent and output short-circuit. The LED2001 is available in VFQFPN 4x4 mm 8-lead package, and HSOP8.
DS9524 - Rev 3 - August 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
1
Typical application circuit
Figure 1. Typical application circuit
LED2001
6
1
2
VIN_SW
VIN_A
DIM
PGND EP
8 9
SW
7
FB
AGND
4
3
LL
LED2001
Typical application circuit
AM12892v1
DS9524 - Rev 3 page 2/40
2
Pin settings
2.1
Pin connection
Figure 2. Pin connection (top view)
LED2001
Pin settings
2.2
Pin description
Table 1. Pin description
VFQFPN8 4x4 mm
1
2
3
4
5
6
7
8
Exposed pad
HS0P8 Type Description
1
2
VIN
DIM
A
Analog circuitry power supply connection
Dimming control input. Logic low prevents the switching activity, logic high enables it. A square wave on this pin implements LED current
PWM dimming. Connect to VIN
)
A
if not used (see Section 6.6 Dimming
3
4
-
FB
AGND
Feedback input. Connect a proper sensing resistor to set the LED current
Analog circuitry ground connection
Not connected
6
7
NC
VIN
SW
SW
Power input voltage
Regulator switching pin
8 PGND Power ground
Exposed pad Exposed pad Connect the exposed pad to AGND
DS9524 - Rev 3 page 3/40
3
LED2001
Maximum ratings
Maximum ratings
Symbol
V
INSW
V
INA
V
DIM
V
SW
V
PG
V
FB
I
FB
P
TOT
T
OP
T
STG
Table 2. Absolute maximum ratings
Parameter
Power input voltage
Input voltage
Dimming voltage
Output switching voltage
Power Good
Feedback voltage
FB current
Power dissipation at T
A
< 60 °C
Operating junction temperature range
Storage temperature range
Table 3. Thermal data
Symbol
R th JA
Parameter
Maximum thermal resistance junction-
VFQFPN8 4x4
HSOP8
1. Package mounted on the evaluation board.
Value
40
Value
-0.3 to 20
-0.3 to 20
-0.3 to (V
INA
)
-1 to V
IN
-0.3 to V
IN
-0.3 to 2.5
-1 to +1
2
-40 to 150
-55 to 150
Unit
°C/W
V
V
V
Unit
V
V
V mA
°C
°C
°C
DS9524 - Rev 3 page 4/40
LED2001
Electrical characteristics
4
Electrical characteristics
T
J
= 25 °C, V
CC
= 12 V, unless otherwise specified.
Table 4. Electrical characteristics
Symbol
V
IN
Operating input voltage range
Device ON level
Device OFF level
Parameter
Test conditions
V
FB feedback Voltage
I
FB
R
DS(on)
-P
R
DS(on)
-N
I
LIM
Oscillator f
SW
D
V
FB
pin bias current
High-side switch on-resistance
Low-side switch on-resistance
Switching frequency
Duty cycle
Maximum limiting current
DC characteristics
I
Q
Dimming
Quiescent current
I
T j
=25 °C
T j
= 125 °C
SW
=750 mA
90
0.7
0
V
DIM
DIM threshold voltage
Switching activity
Switching activity prevented
1.2
I
DIM
Soft-start
T
SS
Protection
DIM current
Soft-start duration
T
SHDN
Thermal shutdown
Hysteresis
1. Specifications referred to T
J
from -40 to +125 °C. Specifications in the -40 to +125 °C temperature range are assured by design, characterization and statistical correlation.
2. Guaranteed by design.
Min.
3
2.6
2.4
90
Typ.
95
69
5.6
0.85
1.5
2
1
150
15
2.75
2.55
97
100
Max.
18
2.9
2.7
104
110
600
1
100
2.5
0.4
Unit
V mV nA mΩ
A
MHz
% mA
V
µA ms
°C
DS9524 - Rev 3 page 5/40
5
5.1
LED2001
Functional description
Functional description
•
•
•
•
•
•
•
•
The LED2001 is based on a “peak current mode” architecture with fixed frequency control. As a consequence the intersection between the error amplifier output and the sensed inductor current generates the control signal to drive the power switch.
The main internal blocks shown in the block diagram in Figure 3. LED2001 block diagram are:
• High-side and low-side embedded power element for synchronous rectification
A fully integrated sawtooth oscillator with a typical frequency of 850 kHz
A transconductance error amplifier
A high-side current sense amplifier to track the inductor current
A pulse width modulator (PWM) comparator and the circuitry necessary to drive the internal power element
The soft-start circuitry to decrease the inrush current at power-up
The current limitation circuit based on the pulse-by-pulse current protection with frequency divider
The dimming circuitry for output current PWM
The thermal protection function circuitry
Figure 3. LED2001 block diagram
OSC
OCP
REF
Vsum
Vc
PWM
COMP
OCP
REGULATOR
UVLO
MOSFET
CONTROL
LOGIC
V I N A
I2 V
Vdrv_p
DRIVER
Vdrv_n
V I N S W
I _ SENSE R
SENSE
SW
OTP DMD
E/A
DIMMING DRIVER
SOFT-START
0.1V
FB DIM GNDA
GNDP
AM12894v1
Power supply and voltage reference
The internal regulator circuit consists of a start-up circuit, an internal voltage pre-regulator, the bandgap voltage reference and the bias block that provides current to all the blocks. The starter supplies the start-up current to the entire device when the input voltage goes high and the device is enabled. The pre-regulator block supplies the bandgap cell with a pre-regulated voltage that has a very low supply voltage noise sensitivity.
DS9524 - Rev 3 page 6/40
5.2
5.3
LED2001
Voltage monitor
Voltage monitor
An internal block continuously senses the V cc
, V ref
and V bg
. If the monitored voltages are good, the regulator begins operating. There is also a hysteresis on the V cc
(UVLO).
Figure 4. Internal circuit
V
CC
STARTER PREREGULATOR
VREG
BANDGAP
IC BIAS
VREF
AM13488v1
Soft-start
The start-up phase is implemented ramping the reference of the embedded error amplifier in 1 ms typ. time. It minimizes the inrush current and decreases the stress of the power components at power up.
During normal operation a new soft-start cycle takes place in case of:
• thermal shutdown event
• UVLO event
The soft-start is disabled when DIM input goes high in order to maximize the dimming performance.
DS9524 - Rev 3 page 7/40
5.4
5.5
LED2001
Error amplifier
Error amplifier
The voltage error amplifier is the core of the loop regulation. It is a transconductance operational amplifier whose non-inverting input is connected to the internal voltage reference (100 mV), while the inverting input (FB) is connected to the output current sensing resistor. The error amplifier is internally compensated to minimize the size of the final application.
Table 5. Uncompensated error amplifier characteristics
Description
Transconductance
Low frequency gain
C
C
R
C
Values
220 µS
96 dB
195 pF
70 kΩ
The error amplifier output is compared with the inductor current sense information to perform PWM control.
Thermal shutdown
The shutdown block generates a signal that disables the power stage if the temperature of the chip goes higher than a fixed internal threshold (150 ± 10 °C typical). The sensing element of the chip is close to the PDMOS area, ensuring fast and accurate temperature detection. A 15 °C typical hysteresis prevents the device from turning ON and OFF continuously during the protection operation.
DS9524 - Rev 3 page 8/40
LED2001
Application notes
6
Application notes
6.1
6.2
Closing the loop
Figure 5. Block diagram of the loop
V
IN
G
CO
(s)
PWM control
Current sense
HS switch
L
V
OUT
LC filter
LS switch
C
OUT
-
PWM comparator
+
V
CONTROL
R
C
C
C error amplifier
FB compensation network
+
V
REF
A
O
(s)
R
S
LED
AM13490v1
G
CO
(s) control to output transfer function
The accurate control to output transfer function for a buck peak current mode converter can be written as follows:
Equation 1
G
CO s =
R0
Ri
⋅
1 +
1
⋅ mC ⋅ 1 − D − 0.5
⋅ ⋅ F
H s where R
0
represents the load resistance, R i
the equivalent sensing resistor of the current sense circuitry , ω p
the single pole introduced by the LC filter and ω z
the zero given by the ESR of the output capacitor.
F
H
(s) accounts the sampling effect performed by the PWM comparator on the output of the error amplifier that introduces a double pole at one half of the switching frequency.
Equation 2
ω z
=
.
OUT where ESR is the equivalent series resistor to the output capacitor.
Equation 3
DS9524 - Rev 3 page 9/40
6.3
LED2001
Error amplifier compensation network
ω
P
=
R
LOAD
.
C
OUT
+ m
C
( 1 D
.
OUT
.
f
SW where:
Equation 4 m
C
S
S e n
=
= 1 +
= V pp
Se
Sn
⋅ f
L sw
VIN − VOUT
⋅ R i
S n
represents the slope of the sensed inductor current, S e
the slope of the external ramp (V
PP
peak to peak amplitude equal to 1.2 V) that implements the slope compensation to avoid sub-harmonic oscillations at duty cycle over 50%.
The sampling effect contribution F
H
(s) is:
Equation 5
F
H
=
1 +
ω n
.
Q
P s
2
+
ω n where:
Equation 6
ω
n and
=
SW
Equation 7
Q
P
=
C
(
Error amplifier compensation network
The LED2001 embeds ( see figure below) the error amplifier and a pre-defined compensation network, which stabilize the system in most application conditions.
DS9524 - Rev 3 page 10/40
DS9524 - Rev 3
LED2001
Error amplifier compensation network
FB
Figure 6. Transconductance embedded error amplifier
+
-
E/A
COMP
R
C
C
C
C
P
V + dV
G m dV
R
0
C
0
R
C
C
C
C
P
AM13491v1
R
C
and C
C
introduce a pole and a zero in the open loop gain. C
P
does not significantly affect system stability but it can be useful to reduce the noise at the output of the error amplifier.
The transfer function of the error amplifier and its compensation network is:
Equation 8
A
0
= s
2
.
R
0
.
( C
0
+ C p
) R c
.
A
C c
V0
+
.
s
(
.
1 s
( R
0
.
.
R
C c c
+
.
C
R c
0
)
.
( C
0
+ C p
) R c
.
C c
Where A
V0
= G m
· R
0
.
The poles of this transfer function are (if C c
>> C
0
+ C
P
):
Equation 9 f
P LF
=
1
2 π R
0
.
C c
Equation 10 f
P HF
=
. .
c
.
( C
0
+ C p
) whereas the zero is defined as:
Equation 11
F
Z
=
. .
c
.
C c
The embedded compensation network is R
C
=70 K, C
C
=195 pF while C
P
and C
O
can be considered as negligible.
The error amplifier output resistance is 240 MΩ, so the relevant singularities are:
Equation 12 f z
= 11.6 kHz f
PLF
= 3.4 Hz page 11/40
6.4
LED2001
LED small signal model
LED small signal model
Once the system reaches the working condition, LEDs composing the row are biased and their equivalent circuit can be considered as a resistor for frequencies << 1 MHz.
The LED manufacturer typically provides the equivalent dynamic resistance of the LED biased at different DC currents. This parameter is required to study the behavior of the system in the small signal analysis.
For instance, the equivalent dynamic resistance of Luxeon III Star from Lumiled measured with different biasing current levels is reported below:
Equation 13 : r
LED
{ 1.3 Ω I
LED
= 350 mA; 0.9 Ω I
LED
= 700 mA;
If the LED datasheet does not report the equivalent resistor value, it can be simply derived as the tangent to the diode I-V characteristic in the present working point (see
Figure 7. Equivalent series resistor ).
Figure 7. Equivalent series resistor
[A]
1 working po int
0.1
1 2 3 4
[V]
Figure 8. Load equivalent circuit
shows the equivalent circuit of the LED constant current generator.
AM13492v1
DS9524 - Rev 3 page 12/40
LED2001
Total loop gain
Figure 8. Load equivalent circuit
LL
LL
6.5
AM13493v1
As a consequence the LED equivalent circuit gives the α
LED
(s) term correlating the output voltage with the high impedance FB input:
Equation 14
α
LED
( n
LED
) = n
LED
.
LED
+ R
SENSE
Total loop gain
In summary, the open loop gain can be expressed as:
Equation 15
G s = G
CO
Example 1
.
0
.
LED
( n
LED
)
Design specification:
V
IN
=12 V, V
FW_LED
=3.5 V, n
LED
= 2, r
LED
= 1.1 Ω, I
LED
= 4 A, I
LED RIPPLE
= 2%
The inductor and capacitor value are dimensioned in order to meet the ILED RIPPLE specification (see
Section 6.8.2 Inductor and output capacitor selection for output capacitor and inductor
selection guidelines):
L=2.2 μH, C
OUT
=2.2 μF MLCC (negligible ESR)
Accordingly, with
Section 6.8.1 Sensing resistor the sensing resistor value is:
Equation 16
R s
=
100mV
4A
Equation 17
= 25 mΩ
α
LED n
LED
=
RSENSE nLED . rLED + RSENSE
=
25 mΩ
2 × 1.1Ω + 25 mΩ
= 0.011
The gain and phase margin Bode diagrams are plotted respectively in the figures below.
DS9524 - Rev 3 page 13/40
DS9524 - Rev 3
LED2001
Total loop gain
Figure 9. Module plot
EXTERNAL LOOP MODULE
100
87
48
35
22
9
74
61
0.1
1 10 100
Frequency [Hz]
Figure 10. Phase plot
EXTERNAL LOOP GAIN PHASE
180
157.5
135
112.5
90
67.5
45
22.5
0
0.1
1 10
The cut-off frequency and the phase margin are:
Equation 18: f c
= 14 kHz pm = 120°
100
Frequency [Hz] x
7
AM12900v1
AM12901v1 page 14/40
6.6
LED2001
Dimming operation
Dimming operation
The dimming input disables the switching activity, masking the PWM comparator output.
The inductor current dynamic performance when dimming input goes high depends on the designed system response. The best dimming performance is obtained by maximizing the bandwidth and phase margin, when possible.
As a general rule, the output capacitor minimization improves dimming performance.
Figure 11. Dimming operation example
DS9524 - Rev 3
In fact, when dimming enables the switching activity, a small capacitor value is fast charged with low inductor value. As a consequence, the LED current rising edge time is improved and the inductor current oscillation reduced. An oversized output capacitor value requires extra current for fast charge so generating an inductor current oscillations.
The switching activity is prevented as soon as the dimming signal goes low. Nevertheless, the LED current drops to zero only when the voltage, stored in the output capacitor, goes below a minimum voltage determined by the selected LEDs. As a consequence, a big capacitor value makes the LED current falling time worse than a smaller one.
The LED2001 device embeds dedicated circuitry to improve LED current falling time.
As soon as the dimming input goes low, the low-side is kept enabled to discharge C
OUT
until the LED current drops to 60% of the nominal current. A negative current limitation (-1 A typical) protects the device during this operation, see figure below.
page 15/40
Figure 12. LED current falling edge operation
LED2001
Dimming operation
6.6.1
Dimming frequency vs. dimming depth
As seen in
Section 6.6 Dimming operation , the LEDs current rising and falling edge time mainly depends on the
system bandwidth (T
RISE
) and the selected output capacitor value (T
RISE
and T
FALL
).
The dimming performance depends on the minimum current pulse shape specification of the final application. The ideal minimum current pulse has a rectangular shape, in any case it degenerates into a trapezoid or, at worst, into a triangle, depending on the ratio (T
RISE
+ T
FALL
)/ T
DIM
.
Equation 19 rec tan gle
TRISE TFALL
1
TDIM
«
trapezoid
TRISE TFALL
1
TDIM
<
triangle
TDIM
= 1
The small signal response in
Figure 11. Dimming operation example
and Figure 12. LED current falling edge operation
is considered as an example.
Equation 20
T
RISE
≅ 20 μs
T
FALL
≅ 5 μs
Assuming the minimum current pulse shape specification as:
Equation 21
T
RISE
+T
FALL
= 0.5 ㆍ D
MIN
ㆍ T
DIMMING it is possible to calculate the maximum dimming depth given the dimming frequency or vice versa.
DS9524 - Rev 3 page 16/40
Figure 13. Dimming signal
LED2001 eDesignSuite software
6.7
AM13499v1
For example, assuming a 1 kHz dimming frequency the maximum dimming depth is 5% or given a 2% dimming depth it follows a 200 Hz maximum f
DIM
.
The LED2001 dimming performance is strictly dependent on the system small signal response. As a consequence, an optimized compensation network (good phase margin and bandwidth maximized) and minimized C
OUT
value are crucial for best performance.
eDesignSuite software
The LED2001 is supported by the eDesign software which can be viewed online at www.st.com.
Figure 14. eDesignSuite software
DS9524 - Rev 3
The software easily supports the component sizing according to the technical information given in this datasheet
(see
and Section 6.8 Component selection ).
The end user is requested to fill in the requested information such as the input voltage range, the selected LED parameters and the number of LEDs composing the row.
The software calculates external components according to the internal database. It is also possible to define new components and ask the software to use them.
page 17/40
6.8
6.8.1
6.8.2
LED2001
Component selection
Bode plots, estimated efficiency and thermal performance are provided.
Finally, the user can save the design and print all the information including the bill of material of the board.
Component selection
Sensing resistor
In closed loop operation the LED2001 feedback pin voltage is 100 mV, so the sensing resistor calculation is expressed as:
Equation 22
R
S
=
100mV
ILED
current is regulated into the LEDs. The integration period is at minimum 5 * T
SW
since the system bandwidth can be dimensioned up to f
SW
/5 at maximum.
The system performs the output current regulation over a period, which is at least five times longer than the switching frequency. The output current regulation neglects the ripple current contribution and its reliance on external parameters like input voltage and output voltage variations (line transient and LED forward voltage spread). This performance cannot be achieved with simpler regulation loops like hysteretic control.
For the same reason, the switching frequency is constant over the application conditions, that helps to tune the EMI filtering and to guarantee the maximum LED current ripple specification in the application range. This performance cannot be achieved using constant ON/OFF time architectures.
Inductor and output capacitor selection
The output capacitor filters the inductor current ripple that, given the application condition, depends on the inductor value. As a consequence the LED current ripple, that is the main specification for a switching current source, depends on the inductor and output capacitor selection.
Figure 15. Equivalent circuit
LL LL
DS9524 - Rev 3
AM13500v1
The LED ripple current can be calculated as the inductor ripple current ratio flowing into the output impedance using the Laplace transform (see Figure 2):
Equation 23
Δ I
RIPPLE
=
8
.
ΔI
L
π
2
.
( + .
.
OUT
)
-----------------------------------------------------------------------------------------------------------
1 s .
( R
S
+
LED
.
R
LED
.
OUT where the term 8/π 2 represents the main harmonic of the inductor current ripple (which has a triangular shape) and ∆I
L
is the inductor current ripple.
Equation 24
ΔI
L
= ⋅ T
OFF
= so L value can be calculated as:
Equation 25
⋅ T
OFF page 18/40
6.8.3
LED2001
Component selection
L = nLED ⋅ VFW_LED + 100mV
ΔIL
⋅ T
OFF
= nLED ⋅ VFW_LED + 100mV
ΔIL
⋅ 1 − nLED ⋅ VFW_LED + 100mV
VIN where T
OFF
is the OFF time of the embedded high switch, given by 1 - D.
As a consequence the lower the inductor value (so higher the current ripple), the higher C
OUT
value to meet the specification.
A general rule to dimension L value is:
Equation 26
ΔI
L
≤ 0.5
I
LED
Finally the required output capacitor value can be calculated equalizing the LED current ripple specification with
the module of the Fourier transformer (see Equation 23
) calculated at f
SW
frequency.
Equation 27
Δ I
RIPPLE
( s=j ω ) = Δ I
RIPPLE_SPEC
Example 1
V
IN
=12 V, I
LED
= 700 mA, Δ
ILED
/I
LED
= 2%, V
FW_LED
= 3.7 V, n
LED
= 2.
A lower inductor value maximizes the inductor current slew rate for better dimming performance.
becomes:
Equation 28
I
ΔI
L
LED
= 0.5
which is satisfied selecting a 10 µH inductor value.
The output capacitor value has to be dimensioned according to
Finally, given the selected inductor value, a 2.2 µF ceramic capacitor value keeps the LED current ripple ratio lower than the 2% of the nominal current. An output ceramic capacitor type (negligible ESR) is suggested to minimize the ripple contribution given a fixed capacitor value.
Manufacturer
Wurth Elektronik
Coilcraft
Series
WE-HCI 7040
WE-HCI 7050
XPL 7030
Table 6. Inductor selection
Inductor value (µH)
1 to 4.7
4.9 to 10
2.2 to 10
Saturation current (A)
20 to 7
20 to 4.0
29 to 7.2
Input capacitor
The input capacitor must be able to support the maximum input operating voltage and the maximum RMS input current.
Since step-down converters draw current from the input in pulses, the input current is squared and the height of each pulse is equal to the output current. The input capacitor has to absorb all this switching current, whose
RMS value can be up to the load current divided by two (worst case, with duty cycle of 50%). For this reason, the quality of these capacitors has to be very high to minimize the power dissipation generated by the internal ESR, thereby improving system reliability and efficiency. The critical parameter is usually the RMS current rating, which must be higher than the RMS current flowing through the capacitor. The maximum RMS input current (flowing through the input capacitor) is:
Equation 29
I
RMS
= I
O
.
–
η
2
--------------+
2
η
2
Where η is the expected system efficiency, D is the duty cycle and I
O
is the output DC current. Considering η =
1 this function reaches its maximum value at D = 0.5 and the equivalent RMS current is equal to I
O
The maximum and minimum duty cycles are:
divided by 2.
Equation 30
DS9524 - Rev 3 page 19/40
6.9
LED2001
Layout considerations
D
MAX
=
V
V
INMIN
+
–
V
F
V
SW and
Equation 31
D
MIN
=
V
OUT
V
INMAX
–
V
F
V
SW
Where V
F
is the freewheeling diode forward voltage and V
SW
the voltage drop across the internal PDMOS.
Considering the range D
MIN
to D
MAX
, it is possible to determine the max. I
RMS
going through the input capacitor.
Capacitors that can be considered are:
• Electrolytic capacitors:
These are widely used due to their low price and their availability in a wide range of RMS current ratings.
The only drawback is that, considering ripple current rating requirements, they are physically larger than other capacitors.
• Ceramic capacitors:
If available for the required value and voltage rating, these capacitors usually have a higher RMS current rating for a given physical dimension (due to very low ESR).
The drawback is the considerably high cost.
• Tantalum capacitors:
Small tantalum capacitors with very low ESR are more available. However, they can occasionally burn if subjected to very high current during charge.
Therefore, it is suggested to avoid this type of capacitor for the input filter of the device as they could be stressed by a high surge current when connected to the power supply.
Manufacturer
Taiyo Yuden
Murata
Table 7. List of ceramic capacitors for the LED2001
Series
UMK325BJ106MM-T
GRM42-2 X7R 475K 50
Capacitor value (µC)
10
4.7
Rated voltage (V)
50
50
In case the selected capacitor is ceramic (so neglecting the ESR contribution), the input voltage ripple can be calculated as:
Equation 32
V
IN PP
=
IO
CIN ⋅ fSW
⋅ [ 1 −
D
η
⋅ D +
D
η
⋅ (1 − D)]
Layout considerations
The layout of switching DC-DC converters is very important to minimize noise and interference. Power-generating portions of the layout are the main cause of noise and so high switching current loop areas should be kept as small as possible and lead lengths as short as possible.
High impedance paths (in particular the feedback connections) are susceptible to interference, so they should be
The input and output loops are minimized to avoid radiation and high frequency resonance problems. The feedback pin to the sensing resistor path must be designed as short as possible to avoid pick-up noise. Another important issue is the ground plane of the board. Since the package has an exposed pad, it is very important to connect it to an extended ground plane in order to reduce the thermal resistance junction-to-ambient.
The input capacitor, connected to VINSW, must be placed as close as possible to the device, to avoid spikes on
VINSW due to the stray inductance and the pulsed input current. In order to prevent dynamic unbalance between
VINSW and VINA, the trace, connecting the VINA pin to the input, must be derived from VINSW and designs local ceramic bypass capacitor (1 μF) as close as possible to the VINA pin.
DS9524 - Rev 3 page 20/40
LED2001
Thermal considerations
In addition, to increase the design noise immunity, different signal and power ground should be designed in the layout (see
Section 6.12 Application circuit ). The signal ground serves the small signal components, the device
analog ground pin, the exposed pad and a small filtering capacitor connected to the VCC pin. The power ground serves the device ground pin and the input filter. The different grounds are connected underneath the output capacitor. Neglecting the current ripple contribution, the current flowing through this component is constant during the switching activity and so this is the cleanest ground point of the buck application circuit.
Figure 16. Layout example
6.10
Thermal considerations
The dissipated power of the device is tied to three different sources:
• Conduction losses due to the R
DS(on)
, which are equal to:
Equation 33
P
ON
=
P
OFF =
R
RDSON_HS
R
.
( I
OUT
RDSON_LS
)
2
.
D
⋅ (I
OUT
)
2
⋅ (1 − D)
Where D is the duty cycle of the application. Note that the duty cycle is theoretically given by the ratio between
V
OUT
(n
LED
ㆍ V
LED
+ 100 mV) and V
IN
, but in practice it is substantially higher than this value to compensate for the losses in the overall application.
For this reason, the conduction losses related to the R
DS(on)
increase compared to an ideal case.
•
Switching losses due to turning ON and OFF. These are derived using Equation 34
:
Equation 34
P
SW
= V
IN
.
I
OUT
.
( T
RISE
+
2
T
FALL
)
.
F
SW
= V
IN
.
I
OUT
.
T
SW_EQ
.
F
SW
Where T
RISE
and T
FALL
represent the switching times of the power element that cause the switching losses when
driving an inductive load (see Figure 17. Switching losses ). T
SW
is the equivalent switching time.
DS9524 - Rev 3 page 21/40
Figure 17. Switching losses
LED2001
Thermal considerations
DS9524 - Rev 3
• Quiescent current losses
Equation 35
P
Q
= V
IN
.
I
Q
Example 2
(see Compensation network design for alternative topologies):
V
IN
= 12 V, V
FW_LED
= 3.5 V, n
LED
= 2, I
LED
= 700 mA.
The typical output voltage is:
Equation 36
V
OUT
= n
LED
⋅ V
FW_LED
+ V
FB
= 7.1 V
R
DSON_HS
has a typical value of 95 mΩ and R
DSON_LS
is 69 mΩ at 25 °C.
For the calculation we can estimate R
DSON_HS
= 140 mΩ and R
DSON_LS
= 100 mΩ as a consequence of T
J increase during the operation.
T
SW_EQ
is approximately 12 ns.
I
Q
has a typical value of 1.5 mA at V
IN
= 12 V.
The overall internal losses are:
Equation 37
P
TOT
= R
DSON_HS
⋅ (I
OUT
)
2
⋅ D + R
DSON_LS where T
SW_EQ
= (T
RISE
+ T
FALL
)/2 = 12 nS.
⋅ (I
OUT
)
2
⋅ (1 − D) + V
IN
⋅ I
OUT
⋅ f sw
⋅ T sw
+ V
IN
⋅ I
Q
Equation 38
P
TOT
= 0.14 ⋅ 0.7
2
⋅ 0.6 + 0.1 ⋅ 0.7
2
⋅ 0.4 + 12 ⋅ 10
The junction temperature of the device is:
−9
⋅ 850 ⋅ 10
3
+ 12 ⋅ 1.5 ⋅ 10
−3
≅ 205mW
Equation 39
T
J
= T
A
+ Rth .
P
TOT
Where T
A
is the ambient temperature and Rth
J-A
is the thermal resistance junction-to-ambient. The junctionto-ambient (Rth
J-A
) thermal resistance of the device assembled in the HSOP8 package and mounted on the evaluation is about 40 °C/W.
Assuming the ambient temperature around 40 °C, the estimated junction temperature is: page 22/40
6.11
LED2001
Short-circuit protection
T
J
= 60+0.205
ㆍ 40 ≅ 68 °C
Short-circuit protection
In overcurrent protection mode, when the peak current reaches the current limit threshold, the device disables the power element and it is able to reduce the conduction time down to the minimum value (approximately 100 ns typical) to keep the inductor current limited. This is the pulse-by-pulse current limitation to implement constant current protection feature.
In overcurrent condition, the duty cycle is strongly reduced and, in most applications, this is enough to limit the switch current to the current threshold.
The inductor current ripple during ON and OFF phases can be written as:
• ON phase
Equation 40
•
Δ I
L TON
=
V – V
OUT
– ( DCR
L
+ R
DSON HS
.
( T
ON
)
OFF phase
Equation 41
ΔI
L TON
= (T
OFF
) where DCR
L
is the series resistance of the inductor.
The pulse-by-pulse current limitation is effective to implement constant current protection when:
Equation 42
Δ I
L TON
= Δ I
L TOFF
From Equation 40 and Equation 41
it can be seen that the implementation of the constant current protection becomes more critical the lower is the V
OUT
and the higher is V
IN
.
In fact, in short-circuit condition the voltage applied to the inductor during the OFF time becomes equal to the voltage drop across parasitic components (typically the DCR of the inductor and the R
DS(on) negligible, while during T
ON
) since V
OUT
is
the voltage applied to the inductor is maximized and it is approximately equal to V
IN
.
in overcurrent conditions can be simplified to:
Equation 43
Δ I
L TON
=
V – ( DCR +
L
R
DSON HS
.
( T
ON MIN
) ≈
V
IN
L
( 90ns ) considering T
ON
that has been already reduced to its minimum.
Equation 44
ΔI
L TOFF
= (T
SW
− 90ns) ≅ ⋅ (1.18μs) where T
SW
= 1/f
SW
considering the nominal f
SW
.
At higher input voltage ΔI
L TON
may be higher than ΔI
L TOFF
and so the inductor current can escalate. As a consequence, the system typically meets Equation 42 at a current level higher than the nominal value thanks to the increased voltage drop across stray components. In most of the application conditions the pulse-by-pulse current limitation is effective to limit the inductor current. Whenever the current escalates, a second level current protection called “Hiccup mode” is enabled. Hiccup protection offers an additional protection against heavy short-circuit conditions at very high input voltage even considering the spread of the minimum conduction time of the power element. If the hiccup current level (6.2 A typical) is triggered, the switching activity is prevented for 12 cycles.
Figure 1 shows the operation of the constant current protection when a short-circuit is applied to the output at the maximum input voltage.
DS9524 - Rev 3 page 23/40
Figure 18. Constant current protection triggering hiccup mode
LED2001
Short-circuit protection
During pulse skipping, high-side OFF, low-side keeps ON till 26 clks finish (13 clks for the LED2001) or I pk decreases to be zero value.
DS9524 - Rev 3 page 24/40
6.12
LED2001
Application circuit
Application circuit
Figure 19. Demonstration board application circuit
D I
I N
4 k
P 1
2
3
4
1
2
L E D 2 0 0 1
VIN_A
DIM
FB
AGND PGND EP
VIN_SW
SW
NC
8 9
6
7
5
1 0 u , , 2 5 V
3 .
.
3 u H u F
0 R 1 5
N D
V L E D +
4 .
7 u
V L E D -
AM12910v1
Reference
C1
C2
C3
R1
R2
R s
L1
Part number
ERJ14BSFR27U
XAL6030-332MEB
Table 8. Component list
GRM31CR61E226KE15L
GRM21BR71E475KA73L
Description
1 µF 25 V (size 0805)
22 μF 25 V (size 1206)
4.7 μF 25 V (size 0805)
4.7 kΩ 5%
(size 0603)
Not mounted
0.15 Ω 1%
(size 1206)
3.3 μH
I
SAT
= 8.4 A
(20% drop) I
RMS
= 7.3 A
(40 °C rise)
(size 6.36 x 6.56 x 6.1 mm)
Manufacturer
Murata
Panasonic
Coilcraft
DS9524 - Rev 3 page 25/40
Figure 20. PCB layout (component side) DFN package
LED2001
Application circuit
Figure 21. PCB layout (bottom side) DFN package
DS9524 - Rev 3 page 26/40
DS9524 - Rev 3
Figure 22. PCB layout (component side) HSOP8 package
LED2001
Application circuit
It is strongly recommended that the input capacitors are to be put as close as possible to the pins, see C1 and
C2.
Figure 23. PCB layout (bottom side) HSOP8 package page 27/40
7
Typical characteristics
Figure 24. Soft-start
LED2001
Typical characteristics
Figure 25. Load regulation
Figure 26. Dimming operation Figure 27. LED current rising edge
DS9524 - Rev 3 page 28/40
Figure 28. LED current falling edge
LED2001
Typical characteristics
Figure 29. Hiccup current protection
Figure 30. OCP blanking time Figure 31. Thermal shutdown protection
DS9524 - Rev 3 page 29/40
LED2001
Ordering information
8
Ordering information
Order code
LED2001PUR
LED2001PHR
Table 9. Order code
Package
VFQFPN 4x4 8L
HSOP8
Packing
Tape and reel
DS9524 - Rev 3 page 30/40
9
9.1
LED2001
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
VFQFPN8 (4x4x1.08 mm) package outline
Figure 32. VFQFPN8 (4x4x1.08 mm) package outline
DS9524 - Rev 3 page 31/40
Dim.
D2
E
E2 e
L
A
A1
A3 b
D
LED2001
VFQFPN8 (4x4x1.08 mm) package outline
Table 10. VFQFPN8 (4x4x1.08 mm) package mechanical data
Min.
0.80
0
0.23
3.90
2.82
3.90
2.05
0.40
mm
Typ.
3
4
2.20
0.80
0.50
0.90
0.02
0.20
0.30
4
Figure 33. VFQFPN8 (4x4x1.08 mm) recommended footprint
Max.
1
0.05
0.38
4.10
3.23
4.10
2.30
0.60
DS9524 - Rev 3 page 32/40
9.2
HSOP8 package information
Figure 34. HSOP8 package outline
LED2001
HSOP8 package information
DS9524 - Rev 3
7195016_D page 33/40
Symbol
D
D1
E
E1
E2 e h
L k
A
A1
A2 b c
Table 11. HSOP8 package mechanical data
Min.
Dimensions (mm)
Typ.
1.25
0.38
0.17
4.80
3.10
5.80
3.80
2.20
0.30
0.45
0°
4.90
3.30
6.00
3.90
2.40
1.27
LED2001
HSOP8 package information
Max.
1.75
0.15
0.51
0.25
5.00
3.50
6.20
4.00
2.60
0.50
0.80
8°
DS9524 - Rev 3 page 34/40
LED2001
Revision history
Date
20-May-2013
11-Jun-2018
30-Aug-2021
Revision
1
2
3
Table 12. Document revision history
Changes
Initial release.
Updated Section 2.1 Pin connection.
Minor modifications throughout document.
Updated
Section 6.9 Layout considerations and
Section 6.7 eDesignSuite software , by changing the word from eDesign studio to eDesignSuite.
DS9524 - Rev 3 page 35/40
LED2001
Contents
Contents
DS9524 - Rev 3 page 36/40
LED2001
Contents
DS9524 - Rev 3 page 37/40
LED2001
List of figures
List of figures
DS9524 - Rev 3 page 38/40
LED2001
List of tables
List of tables
DS9524 - Rev 3 page 39/40
LED2001
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
DS9524 - Rev 3 page 40/40
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