STMicroelectronics TSU114 Datasheet
Reklama
Reklama
TSU111, TSU112, TSU114
Datasheet
Nanopower (900 nA), high accuracy (150 µV) 5 V CMOS operational amplifier
Product status link
TSU111 , TSU112 , TSU114
Related products
See TSU101 , TSU102 , and TSU104
See TSZ121 , TSZ122 ,
TSZ124 for further power savings for increased accuracy
Features
• Sub-micro ampere current consumption: Icc = 900 nA typ. at 25 °C
• Low offset voltage: 150 µV max. at 25 °C, 235 µV max. over full temperature range (-40 to 85 °C)
• Low noise over 0.1 to 10 Hz bandwidth: 3.6 µVpp
• Low supply voltage: 1.5 V to 5.5 V
• Rail-to-rail input and output
• Gain bandwidth product: 11.5 kHz typ.
• Low input bias current: 10 pA max. at 25 °C
• High tolerance to ESD: 4 kV HBM
• More than 25 years of typical equivalent lifetime supplied by a 220 mA.h
CR2032 coin type Lithium battery
• High accuracy without calibration
• Tolerance to power supply transient drops
Applications
• Gas sensors: CO, O
2
, and H
2
S
• Alarms: PIR sensors
• Signal conditioning for energy harvesting and wearable products
• Ultra long-life battery-powered applications
• Battery current sensing
• Active RFID tags
Description
The TSU111 , TSU112 and the TSU114 operational amplifiers (op-amp) offer an ultra low-power consumption per channel of 900 nA typical and 1.2 µA maximum when supplied by 3.3 V. Combined with a supply voltage range of 1.5 V to 5.5 V, these features allow the TSU11x to be efficiently supplied by a coin type Lithium battery or a regulated voltage in low-power applications.
The high accuracy of 150 µV max. and 11.5 kHz gain bandwidth make the TSU11x ideal for sensor signal conditioning, battery supplied, and portable applications.
DS11846 - Rev 6 - February 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
1
TSU111, TSU112, TSU114
Package pin connections
Package pin connections
Figure 2. Pin connections for each package (top view)
IN+ 1
VCC2
IN3
OUT 1
VCC2
IN3
DFN6 1.2x1.3
6 VCC+
5 NC
4 IN+
5 VCC+
4 OUT
SC70-5
TSU111
+
VCC -
+
DFN8 2x2
MiniSO8
TSU112
TSU114
1.
The exposed pad of the DFN8 2x2 can be connected to V
CC-
or left floating.
TSU114
DS11846 - Rev 6 page 2/35
2
TSU111, TSU112, TSU114
Absolute maximum ratings and operating conditions
Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings (AMR)
Symbol
V
CC
V id
V in
I in
T stg
T j
Supply voltage
Differential input voltage
Input voltage
Storage temperature
Parameter
Maximum junction temperature
6
±V
CC
(V
CC -
) - 0.2 to (V
CC +
) + 0.2
10
-65 to 150
150
Value
R thja
Thermal resistance junction-to-ambient (5) (6)
DFN6 1.2x1.3
SC70-5
DFN8 2x2
MiniSO8
QFN16 3x3
TSSOP14
232
205
57
190
45
100
4000
ESD
1500
200
1. All voltage values, except the differential voltage are with respect to the network ground terminal.
2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal.
3. (V
CC+
) - V in
must not exceed 6 V, V in
- (V
CC-
) must not exceed 6 V.
4. The input current must be limited by a resistor in-series with the inputs.
5. R th
are typical values.
6. Short-circuits can cause excessive heating and destructive dissipation.
7. Related to ESDA/JEDEC JS-001 Apr. 2010.
8. Related to JEDEC JESD22-C101-E Dec. 2009.
9. Related to JEDEC JESD78C Sep. 2010.
Symbol
V
CC
V icm
T oper
Table 2. Operating conditions
Parameter
Supply voltage
Common-mode input voltage range
Operating free-air temperature range
Value
1.5 to 5.5
(V
CC-
) - 0.1 to (V
CC+
) + 0.1
-40 to 85
V
Unit mA
°C
°C/W
V mA
V
Unit
°C
DS11846 - Rev 6 page 3/35
TSU111, TSU112, TSU114
Electrical characteristics
3 Electrical characteristics
Table 3. Electrical characteristics at (V
CC +
) = 1.8 V with (V
CC connected to V
CC
) = 0 V, V icm
= V
CC
/2, T amb
= 25 °C, and R
L
= 1 MΩ
/2 (unless otherwise specified)
Symbol Parameter Min.
Typ.
Max.
Unit
V io
ΔV io
/ΔT
I io
I ib
CMR
Input offset voltage
Input offset voltage drift
Input bias current
Common mode rejection ratio,
20 log (ΔV icm
/ΔV io
),
V icm
= 0 to 1.8 V
Conditions
DC performance
T = 25 °C
-40 °C < T< 85 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
76
71
1
1
107
10
50
10
50
150
235
1.4
µV
μV/°C pA dB
A vd
V
OH
V
OL
V
Large signal voltage gain, out
= 0.2 V to (V
CC+
) - 0.2 V
High-level output voltage,
(drop from V
CC
+)
Low-level output voltage
R
L
= 100 kΩ, T = 25 °C
R
L
= 100 kΩ,
-40 °C < T< 85 °C
R
L
= 10 kΩ, T = 25 °C
R
L
= 10 kΩ,
-40 °C < T< 85 °C
R
L
= 10 kΩ, T = 25°C
R
L
= 10 kΩ,
-40 °C < T< 85 °C
T = 25 °C
95
90
2.8
120
10
8
5
25
40
25
40 mV
I out
I
CC
Output sink current,
V out
= V
CC
,
V
ΙD
= -200 mV
Output source current,
V out
= 0 V,
V
ΙD
= 200 mV
Supply current (per channel), no load,
V out
= V
CC
/2
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
1.5
2
1.5
4
900 1200
1480 mA nA
AC performance
GBP
F u
Φ m
G m
Gain bandwidth product
Unity gain frequency
Phase margin
Gain margin
R
L
= 1 MΩ, C
L
= 60 pF
10
8
60
10 kHz degrees dB
DS11846 - Rev 6 page 4/35
TSU111, TSU112, TSU114
Electrical characteristics
Symbol t
SR e ʃe n n rec
Parameter
Slew rate (10 % to 90 %)
Equivalent input noise voltage
Low-frequency, peak-to-peak input noise
Conditions
R
L
= 1 MΩ, C
L
= 60 pF,
V out
= 0.3 V to (V
CC+
) - 0.3 V f = 100 Hz
Bandwidth: f = 0.1 to 10 Hz
Overload recovery time
100 mV from rail in comparator, R
L
= 100 kΩ,
V
ΙD
= ±1 V, -40 °C < T< 85 °C
1. Guaranteed by design
Min.
Typ.
2.5
220
3.8
325
Max.
Unit
V/ms nV/√Hz
µV pp
µs
Table 4. Electrical characteristics at (V
CC +
) = 3.3 V with (V
CC -
) = 0 V, V icm
= V
CC connected to V
CC
/2 (unless otherwise specified)
/2, T amb
= 25 °C, and R
L
= 1 MΩ
Symbol Parameter Min. Typ. Max.
Unit
V io
ΔV io
/ΔT
I io
I ib
CMR
A vd
V
OH
V
OL
I out
I
CC
Input offset voltage
Input offset voltage drift
Input offset current
Common mode rejection ratio,
20 log (ΔV icm
/ΔV io
), V icm
= 0 to 3.3 V
Large signal voltage gain, V out
= 0.2 V to
(V
CC+
) - 0.2 V
High-level output voltage, (drop from V
CC
+)
Low-level output voltage
Output sink current, V out
= V
CC
, V
ΙD
= -200 mV
Output source current, V out
= 0 V, V
ΙD
= 200 mV
Supply current (per channel), no load,
V out
= V
CC
/2
Conditions
DC performance
T = 25 °C
-40 °C < T< 85 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
R
L
= 100 kΩ, T = 25 °C
R
L
= 100 kΩ, -40 °C < T< 85 °C
R
L
= 10 kΩ, T = 25 °C
R
L
= 10 kΩ, -40 °C < T< 85 °C
R
L
= 10 kΩ, T = 25°C
R
L
= 10 kΩ, -40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
AC performance
1
1
81 110
76
105 130
105
10 25
40
7 25
40
12 22
6
9
5
18
900 1200
1480
150
235
µV
1.4
μV/°C
10
50
10
50 pA dB mV mA nA
GBP
F u
Φ m
G m
Gain bandwidth product
Unity gain frequency
Phase margin
Gain margin
R
L
= 1 MΩ, C
L
= 60 pF
11
10
60
7 kHz degrees dB
DS11846 - Rev 6 page 5/35
TSU111, TSU112, TSU114
Electrical characteristics
Symbol
SR e n ʃe n t rec
1. Guaranteed by design
Parameter
Slew rate (10 % to 90 %)
Equivalent input noise voltage
Low-frequency, peak-to-peak input noise
Overload recovery time
Conditions
R
L
= 1 MΩ, C
L
= 60 pF,
V out
= 0.3 V to (V
CC+
) - 0.3 V f = 100 Hz
Bandwidth: f = 0.1 to 10 Hz
100 mV from rail in comparator, R
L
= 100 kΩ,
V
ΙD
= ±1 V, -40 °C < T< 85 °C
Min. Typ. Max.
Unit
2.5
220
3.7
630
V/ms nV/√Hz
µV pp
µs
Table 5. Electrical characteristics at (V
CC +
) = 5 V with (V
CC -
) = 0 V, V icm
= V
CC connected to V
CC
/2 (unless otherwise specified)
/2, T amb
= 25 °C, and R
L
= 1 MΩ
Min. Typ. Max.
Unit Symbol
V
ΔV io
/ΔT
CMR
SVR
A
V
V
I
I
I
I io io ib vd
OH
OL out
CC
Parameter Conditions
DC performance
Input offset voltage
Input offset voltage drift
T = 25 °C
-40 °C < T< 85 °C
-40 °C < T< 85 °C
Input offset current
= 0 to 5 V
Common mode rejection ratio, 20 log (ΔV icm
= 0 to 3.9 V
Common mode rejection ratio, 20 log (ΔV icm
/ΔV
/ΔV io io
), V
), V icm icm
T = 25 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
Supply voltage rejection ratio, V
CC
= 1.5 to 5.5 V,
V icm
= 0 V
Large signal voltage gain, V out
Output sink current, V out
Output source current, V out
= 0.2 V to (V
CC+
High-level output voltage, (drop from V
Low-level output voltage
= V
CC
, V
ΙD
CC
) - 0.2 V
+)
= -200 mV
= 0 V, V
ΙD
Supply current (per channel), no load, V
= 200 mV out
= V
CC
/2
R
L
= 100 kΩ, T = 25 °C
R
L
= 100 kΩ, -40 °C < T< 85 °C
R
L
= 10 kΩ, T = 25 °C
R
L
= 10 kΩ, -40 °C < T< 85 °C
R
L
= 10 kΩ, T = 25°C
R
L
= 10 kΩ, -40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
T = 25 °C
-40 °C < T< 85 °C
AC performance
1
1
90 121
90
85 112
80
92 116
84
105 135
101
10 25
10
50
10
50
150
235
µV
1.4
μV/°C pA dB
7
40
25
40
30 45
15
25 41
18
950 1350
1620 mV mA nA
DS11846 - Rev 6 page 6/35
TSU111, TSU112, TSU114
Electrical characteristics
Symbol
GBP
Parameter
Gain bandwidth product
Conditions
F u
Φ m
G m
Unity gain frequency
Phase margin
Gain margin
R
L
= 1 MΩ, C
L
= 60 pF
SR Slew rate (10 % to 90 %)
R
L
= 1 MΩ, C
L
= 60 pF, V out
+
) - 0.3 V
= 0.3 V to (V
CC f = 100 Hz e n ʃe n
Equivalent input noise voltage
Low-frequency, peak-to-peak input noise Bandwidth: f = 0.1 to 10 Hz t rec
EMIRR
Overload recovery time
Electromagnetic interference rejection ratio
100 mV from rail in comparator,
R
L
= 100 kΩ, V
ΙD
= ±1 V,
-40 °C < T< 85 °C
V in
= -10 dBm, f = 400 MHz
V in
= -10 dBm, f = 900 MHz
V in
= -10 dBm, f = 1.8 GHz
V in
= -10 dBm, f = 2.4 GHz
1. Guaranteed by design
2. Based on evaluations performed only in conductive mode on the TSU111ICT.
Min. Typ. Max.
Unit
11.5
kHz
10
60
7
2.7
200
3.6
940
54
79
65
65 degrees dB
V/ms nV/√Hz
µV
µs pp dB
DS11846 - Rev 6 page 7/35
TSU111, TSU112, TSU114
Electrical characteristic curves
4 Electrical characteristic curves
Figure 3. Supply current vs. supply voltage Figure 4. Supply current vs. input common-mode voltage
Figure 5. Input offset voltage vs. input common-mode voltage
(µV)
Figure 6. Input offset voltage distribution
Common-mode input voltage (V)
Figure 7. Input offset voltage vs. temperature at 3.3 V supply voltage
Figure 8. Input offset voltage temperature coefficient distribution from -40 °C to 25 °C
DS11846 - Rev 6 page 8/35
TSU111, TSU112, TSU114
Electrical characteristic curves
Figure 9. Input offset voltage temperature coefficient distribution from 25 °C to 85 °C
Figure 10. Input bias current vs. temperature at mid V
ICM
Figure 11. Input bias current vs. temperature at low V
ICM
Figure 12. Input bias current vs. temperature at high V
ICM
Figure 13. Output characteristics at 1.8 V supply voltage Figure 14. Output characteristics at 3.3 V supply voltage
DS11846 - Rev 6 page 9/35
TSU111, TSU112, TSU114
Electrical characteristic curves
Figure 15. Output characteristics at 5 V supply voltage Figure 16. Output saturation with a sinewave on the input
Figure 17. Output saturation with a square wave on the input
Figure 18. Phase reversal free
Figure 19. Slew rate vs. supply voltage Figure 20. Output swing vs. input signal frequency
DS11846 - Rev 6 page 10/35
Figure 21. Triangulation of a sine wave
TSU111, TSU112, TSU114
Electrical characteristic curves
Figure 22. Large signal response at 3.3 V supply voltage
Figure 23. Small signal response at 3.3 V supply voltage
Figure 24. Overshoot vs. capacitive load at 3.3 V supply voltage
Figure 25. Open loop output impedance vs. frequency Figure 26. Bode diagram at 1.8 V supply voltage
DS11846 - Rev 6 page 11/35
Figure 27. Bode diagram at 3.3 V supply voltage
TSU111, TSU112, TSU114
Electrical characteristic curves
Figure 28. Bode diagram at 5 V supply voltage
Figure 29. Gain bandwidth product vs. input commonmode voltage
Figure 30. In-series resistor (Riso) vs. capacitive load
Figure 31. Noise vs. frequency for different power supply voltages
Figure 32. Noise vs. frequency for different commonmode input voltages
DS11846 - Rev 6 page 12/35
TSU111, TSU112, TSU114
Electrical characteristic curves
Figure 33. Noise amplitude on a 0.1 Hz to 10 Hz frequency range
DS11846 - Rev 6 page 13/35
TSU111, TSU112, TSU114
Application information
5 Application information
5.1
Nanopower applications
The TSU11x can operate from 1.5 V to 5.5 V. The parameters are fully specified at 1.8 V, 3.3 V, and 5 V supply voltages and are very stable in the full V
CC
range. Additionally, the main specifications are guaranteed on the industrial temperature range from -40 to 85 °C. The estimated lifetime of the TSU11x exceeds 25 years if supplied
by a CR2032 battery (see Figure 34. CR2032 battery
).
Figure 34. CR2032 battery
5.1.1
Schematic optimization aiming for nanopower
To benefit from the full performance of the TSU11x, the impedances must be maximized so that current consumption is not lost where it is not required.
For example, an aluminum electrolytic capacitance can have significantly high leakage. This leakage may be greater than the current consumption of the op-amp. For this reason, ceramic type capacitors are preferred.
For the same reason, big resistor values should be used in the feedback loop. However, there are two main limitations to be considered when choosing a resistor.
1.
Noise generated: a 100 kΩ resistor generates 40 nV/√Hz, a bigger resistor value generates even more noise.
2.
Leakage on the PCB: leakage can be generated by moisture. This can be improved by using a specific coating process on the PCB.
DS11846 - Rev 6 page 14/35
TSU111, TSU112, TSU114
Rail-to-rail input
5.1.2
PCB layout considerations
For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible to the power supply pins.
Minimizing the leakage from sensitive high impedance nodes on the inputs of the TSU11x can be performed with a guarding technique. The technique consists of surrounding high impedance tracks by a low impedance track
(the ring). The ring is at the same electrical potential as the high impedance node.
Therefore, even if some parasitic impedance exists between the tracks, no leakage current can flow through them
as they are at the same potential (see Figure 35. Guarding on the PCB
).
Figure 35. Guarding on the PCB
5.2
5.3
Rail-to-rail input
The TSU11x is built with two complementary PMOS and NMOS input differential pairs. Thus, the device has a rail-to-rail input, and the input common mode range is extended from (V
CC-
) - 0.1 V to (V
CC+
) + 0.1 V.
The TSU11x has been designed to prevent phase reversal behavior.
Input offset voltage drift overtemperature
The maximum input voltage drift variation overtemperature is defined as the offset variation related to the offset value measured at 25 °C. The operational amplifier is one of the main circuits of the signal conditioning chain, and the amplifier input offset is a major contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated during production at application level. The maximum input voltage drift over temperature enables the system designer to anticipate the effect of temperature variations.
The maximum input voltage drift over temperature is computed using
.
Equation 1
∆V io
∆T
= max
V io
T – V io
( 25 °C )
Where T = -40 °C and 85 °C.
The TSU11x datasheet maximum values are guaranteed by measurements on a representative sample size ensuring a C pk
(process capability index) greater than 1.3.
DS11846 - Rev 6 page 15/35
5.4
TSU111, TSU112, TSU114
Long term input offset voltage drift
Long term input offset voltage drift
To evaluate product reliability, two types of stress acceleration are used:
• Voltage acceleration, by changing the applied voltage
• Temperature acceleration, by changing the die temperature (below the maximum junction temperature allowed by the technology) with the ambient temperature.
The voltage acceleration has been defined based on JEDEC results, and is defined using Equation 2 .
Equation 2
A
FV
= e
β .
( V
S
– V
U
)
Where:
A
FV
is the voltage acceleration factor
β is the voltage acceleration constant in 1/V, constant technology parameter (β = 1)
V
S
is the stress voltage used for the accelerated test
V
U
is the voltage used for the application
The temperature acceleration is driven by the Arrhenius model, and is defined in Equation 3 .
Equation 3
A
FT
= e
E k
.
1
T
U
–
1
T
S
Where:
A
FT
is the temperature acceleration factor
E a
is the activation energy of the technology based on the failure rate k is the Boltzmann constant (8.6173 x 10 -5 eV.K
-1 )
T
U
is the temperature of the die when V
U
is used (°K)
T
S
is the temperature of the die under temperature stress (°K)
The final acceleration factor, A
F
, is the multiplication of the voltage acceleration factor and the temperature
acceleration factor ( Equation 4 ).
Equation 4
A
F
= A
FT
× A
FV
A
F is calculated using the temperature and voltage defined in the mission profile of the product. The A
F
value can then be used in
to calculate the number of months of use equivalent to 1000 hours of reliable stress duration.
Equation 5
Months = A
F
× 1000 h × / ( × 365.25 days )
To evaluate the op amp reliability, a follower stress condition is used where V
CC
is defined as a function of the maximum operating voltage and the absolute maximum rating (as recommended by JEDEC rules).
The V io
drift (in µV) of the product after 1000 h of stress is tracked with parameters at different measurement
Equation 6
V
CC
= maxV op
with V icm
= V
CC
/ 2
The long term drift parameter (ΔV io
), estimating the reliability performance of the product, is obtained using the ratio of the V io
).
Equation 7
∆V io
=
V io drift
( month s )
DS11846 - Rev 6 page 16/35
TSU111, TSU112, TSU114
Using the TSU11x with sensors
5.5
5.5.1
Where V io
drift is the measured drift value in the specified test conditions after 1000 h stress duration.
Using the TSU11x with sensors
The TSU11x has MOS inputs, thus input bias currents can be guaranteed down to 10 pA maximum at ambient temperature. This is an important parameter when the operational amplifier is used in combination with high impedance sensors.
The TSU11x is perfectly suited for trans-impedance configuration. This configuration allows a current to be converted into a voltage value with a gain set by the user. It is an ideal choice for portable electrochemical gas sensing or photo/UV sensing applications. The TSU11x, using trans-impedance configuration, is able to provide a voltage value based on the physical parameter sensed by the sensor.
Electrochemical gas sensors
The output current of electrochemical gas sensors is generally in the range of tens of nA to hundreds of µA. As
the input bias current of the TSU11x is very low (see Figure 10. Figure 8 , Figure 11. Figure 9
, and
) compared to these current values, the TSU11x is well adapted for use with the
shows a potentiostat (electronic hardware required to control a three electrode cell) schematic using the TSU11x. In such a configuration, the devices minimize leakage in the reference electrode compared to the current being measured on the working electrode.
Another great advantage of TSU11x versus the competition is its low noise for low frequencies (3.6 µVpp over 0.1
to 10 Hz), and low input offset voltage of 150 µV max. These improved parameters for the same power consumption allow a better accuracy.
Figure 36. Trans-impedance amplifier schematic
I
R
-
TSU111
+
Vref + RI
Sensor: electrochemical photodiode/UV
Vref
Figure 37. Potentiostat schematic using the TSU111
-
TSU111
+
Vref1
-
TSU111
+
Vref2
DS11846 - Rev 6 page 17/35
5.6
5.7
5.8
TSU111, TSU112, TSU114
Fast desaturation
Fast desaturation
When the TSU11x goes into saturation mode, it takes a short period of time to recover, typically 630 µs. When recovering after saturation, the TSU11x does not exhibit any voltage peaks that could generate issues (such as false alarms) in the application (see
).
We can observe that this circuit still exhibits good gain even close to the rails i.e. A vd
greater than 105 dB for V cc
= 3.3 V with V out
varying from 200 mV up to a supply voltage minus 200 mV. With a trans-impedance schematic, a voltage reference can be used to keep the signal away from the supply rails.
Using the TSU11x in comparator mode
The TSU11x can be used as a comparator. In this case, the output stage of the device always operates in saturation mode. In addition,
shows that the current consumption is not higher and even decreases smoothly close to the rails. The TSU11x is obviously an operational amplifier and is therefore optimized for use in linear mode. We recommend using the TS88 series of nanopower comparators if the primary function is to perform a signal comparison only.
ESD structure of the TSU11x
). These diodes must be considered at application level especially when signals applied on the input pins go beyond the power supply rails (V
CC+
) or (V
CC-
).
Figure 38. ESD structure
-
TSU111
+
5.9
Current through the diodes must be limited to a maximum of 10 mA as stated in
Table 1. Absolute maximum ratings (AMR)
. A serial resistor on the inputs can be used to limit this current.
EMI robustness of nanopower devices
Nanopower devices exhibit higher impedance nodes and consequently they are more sensitive to EMI. To improve the natural robustness of the TSU11x device, we recommend to add three capacitors of around 22 pF each between the two inputs, and between each input and ground. These capacitors lower the impedance of the input at high frequencies and therefore reduce the impact of the radiation.
DS11846 - Rev 6 page 18/35
6
TSU111, TSU112, TSU114
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
. ECOPACK ® is an ST trademark.
DS11846 - Rev 6 page 19/35
TSU111, TSU112, TSU114
SC70-5 (or SOT323-5) package information (TSU111)
6.1
SC70-5 (or SOT323-5) package information (TSU111)
Figure 39. SC70-5 (or SOT323-5) package outline
SIDE VIEW
DIMENSIONS IN MM
GAUGE PLANE
COPLANAR LEADS
SEATING PLANE
DS11846 - Rev 6
TOP VIEW c
D
E
E1
A
A1
A2 b
L
< e e1
Ref.
0.80
0.80
0.15
0.10
1.80
1.80
1.15
0.26
0°
Min.
Table 6. SC70-5 (or SOT323-5) package mechanical data
Dimensions
Millimeters
Typ.
Max.
0.032
Min.
Inches
Typ.
0.90
2.00
2.10
1.25
0.65
1.30
0.36
0.22
2.20
2.40
1.35
1.10
0.10
1.00
0.30
0.46
8°
0.032
0.006
0.004
0.071
0.071
0.045
0.010
0°
0.035
0.079
0.083
0.049
0.025
0.051
0.014
0.043
0.004
0.039
0.012
0.009
0.087
0.094
0.053
Max.
0.018
8° page 20/35
6.2
TSU111, TSU112, TSU114
DFN6 1.2x1.3 package information ( TSU111)
DFN6 1.2x1.3 package information ( TSU111)
Figure 40. DFN6 1.2x1.3 package outline
BOTTOM VIEW e
b
PIN#1 ID
8
0.05 C
A
L
L3
SIDE VIEW
A1
SEATING
PLANE
C
TOP VIEW
D
E
PIN 1 b c
D
A
A1
E e
L
L3
Ref
0.31
0.00
0.15
Min.
0.475
0.375
Table 7. DFN6 1.2x1.3 mechanical data
Dimensions
Millimeters
Typ.
0.38
0.02
0.18
0.05
1.20
1.30
0.40
0.525
0.425
0.40
0.05
0.25
0.575
0.475
Max.
0.012
0.000
0.006
Min.
0.019
0.015
0.015
0.001
0.007
0.002
0.047
0.051
0.016
0.021
0.017
Inches
Typ.
0.016
Max.
0.002
0.010
0.023
0.019
DS11846 - Rev 6 page 21/35
DS11846 - Rev 6
TSU111, TSU112, TSU114
DFN6 1.2x1.3 package information ( TSU111)
Figure 41. DFN6 1.2x1.3 recommended footprint
0.40
3 1
0.25
1.20
0.475
4 6
C
D
E
A
B
F
G
Ref.
4.00
0.50
0.30
1.00
0.70
0.66
Table 8. DFN6 1.2x1.3 recommended footprint data
Dimensions
Millimeters
0.158
0.020
0.012
0.039
0.028
0.026
Inches page 22/35
6.3
MiniSO8 package information (TSU112)
Figure 42. MiniSO8 package outline
TSU111, TSU112, TSU114
MiniSO8 package information (TSU112)
DS11846 - Rev 6
Dim.
D
E
E1 e
L
L1
L2 k ccc
A
A1
A2 b c
Min.
Millimeters
Typ.
0
0.75
0.22
0.08
2.8
4.65
2.8
0.4
3
4.9
3
0.65
0.6
0.95
0.25
Table 9. MiniSO8 mechanical data
Inches
Min.
0.85
Max.
1.1
0.15
0.95
0.4
0.23
3.2
5.15
3.1
0.8
0
0.03
0.009
0.003
0.11
0.183
0.11
0.016
0° 8°
0.1
0°
Typ.
0.033
0.118
0.193
0.118
0.026
0.024
0.037
0.01
Max.
0.043
0.006
0.037
0.016
0.009
0.126
0.203
0.122
0.031
8°
0.004
page 23/35
6.4
DFN8 2x2 package information (TSU112)
Figure 43. DFN8 2x2 package outline
TSU111, TSU112, TSU114
DFN8 2x2 package information (TSU112)
DS11846 - Rev 6
A
A1
A3 b
D
D2
E
E2 e
L ddd
Ref.
0.18
1.85
1.45
1.85
0.75
0.225
0.51
Min.
0.15
0.25
2.00
1.60
2.00
0.90
0.50
0.325
Table 10. DFN8 2x2 package mechanical data
Dimensions
Millimeters
Typ.
0.55
0.60
0.05
Max.
0.020
Min.
Inches
Typ.
0.022
0.30
2.15
1.70
2.15
1.00
0.425
0.08
0.007
0.073
0.057
0.073
0.030
0.009
0.006
0.010
0.079
0.063
0.079
0.035
0.020
0.013
0.024
0.002
Max.
0.012
0.085
0.067
0.085
0.039
0.017
0.003
page 24/35
TSU111, TSU112, TSU114
DFN8 2x2 package information (TSU112)
Figure 44. DFN8 2x2 recommended footprint
DS11846 - Rev 6 page 25/35
6.5
TSSOP14 package information (TSU114)
Figure 45. TSSOP14 package outline
TSU111, TSU112, TSU114
TSSOP14 package information (TSU114)
DS11846 - Rev 6 page 26/35
Symbol
E
E1 e
L
L1 k aaa
A
A1
A2 b c
D
Table 11. TSSOP14 mechanical data
Min.
mm
Typ.
0.05
0.80
0.19
0.09
4.90
6.20
4.30
0.45
0
1.00
5.00
6.40
4.40
0.65
0.60
1.00
TSU111, TSU112, TSU114
TSSOP14 package information (TSU114)
0.75
8
0.10
0.30
0.20
5.10
6.60
4.50
Max.
1.20
0.15
1.05
DS11846 - Rev 6 page 27/35
6.6
TSU111, TSU112, TSU114
QFN16 (3x3x0.9) package information (TSU114)
QFN16 (3x3x0.9) package information (TSU114)
Figure 46. QFN16 (3x3x0.9) package outline
DS11846 - Rev 6 page 28/35
TSU111, TSU112, TSU114
QFN16 (3x3x0.9) package information (TSU114)
Table 12. QFN16 (3x3x0.9) mechanical data
Symbol
Min.
A
A1
A3 b
D
D2
E
E2 e
0.80
0
0.18
2.90
1.50
2.90
1.50
0.30
1. The value of “L” a JEDEC norm is min. 0.35 – max. 0.45
0.90
0.20
3.00
3.00
0.50
mm
Typ.
Figure 47. QFN16 (3x3x0.9) recommended footprint
1
0.05
0.30
3.10
1.80
3.10
1.80
0.50
Max.
DS11846 - Rev 6 page 29/35
7
TSU111, TSU112, TSU114
Ordering information
Ordering information
Table 13. Order code
Order code
TSU111IQ1T
TSU111ICT
TSU112IQ2T
TSU112IST
TSU114IPT
TSU114IQ4T
Temperature range
-40 °C to 85 °C
1. All devices are delivered in tape and reel packing.
Package
DFΝ6 1.2x1.3
SC70-5
DFN8 2x2
MiniSO8
TSSOP14
QFN16 3x3x0.9
Marking
K8
K37
TSU114IPT
K164
DS11846 - Rev 6 page 30/35
TSU111, TSU112, TSU114
Revision history
Table 14. Document revision history
Date
17-Oct-2016
14-Nov-2016
04-Dec-2017
08-May-2018
21-Jan-2019
06-Feb-2019
Revision
1
2
Changes
Initial release
Features: added "rail-to-rail input and output".
Description: updated the maximum ultra low-power consumption of TSU111 op-amp.
Applications: updated
Table 5: added EMIRR typ. values
Added Section 5.9: "EMI robustness of nanopower devices".
3
4
5
6
Added the part number TSU112 and the relative package information MiniSO8 and DFN8 2x2.
Updated Section 3 Electrical characteristics.
Added the part number TSU114, therefore the document has been updated accordingly.
Updated
Section 3 Electrical characteristics .
Added
Figure 5. Input offset voltage vs. input common-mode voltage
.
DS11846 - Rev 6 page 31/35
TSU111, TSU112, TSU114
Contents
Contents
DS11846 - Rev 6 page 32/35
TSU111, TSU112, TSU114
List of tables
List of tables
Table 3. Electrical characteristics at ( V
Table 4. Electrical characteristics at ( V
Table 5. Electrical characteristics at ( V
DS11846 - Rev 6 page 33/35
TSU111, TSU112, TSU114
List of figures
List of figures
Figure 10. Input bias current vs. temperature at mid V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 11. Input bias current vs. temperature at low V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 12. Input bias current vs. temperature at high V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
DS11846 - Rev 6 page 34/35
TSU111, TSU112, TSU114
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
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Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2019 STMicroelectronics – All rights reserved
DS11846 - Rev 6 page 35/35
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