STMicroelectronics TSU111H Datasheet
Annonce
Annonce
TSU111H
Datasheet
High temperature (150 °C) and long mission profile automotive grade, high accuracy (250 µV) 5 V CMOS operational amplifier
Features
Maturity status link
TSU111H
Related products
TSU101 , TSU102 and TSU104
TSZ121 , TSZ122 and TSZ124
For further power savings
For increased accuracy
•
•
•
•
•
•
•
•
•
•
•
•
•
AEC-Q100 qualified
Long mission profile
High temperature qualified 150 °C
Micro ampere current consumption: I
CC
= 1.7 µA typ. at 25 °C
Low offset voltage: 250 µV max. at 25 °C, 600 µV max. over full temperature range (-40 to 150 °C)
Low noise over 0.1 to 10 Hz bandwidth: 3.9 µVpp
Low supply voltage: 1.5 V to 5.5 V
Rail-to-rail input and output
Gain bandwidth product: 23 kHz typ.
Low input bias current: 1 pA max. at 25 °C
High tolerance to ESD: 4 kV HBM
High accuracy without calibration
Tolerance to power supply transient drops
•
•
Applications
• Battery management system: ultra-low power op amp detects when battery is charging/discharging and wakes up CPU
Onboard chargers (OBC)
Wireless chargers
Description
The TSU111H operational amplifier (op amp) offers an ultralow power consumption of
1.7 µA typical and 2.4 µA maximum when supplied by 1.8 V.
The ultralow power consumption, the high accuracy of 250 µV max., and 23 kHz gain bandwidth make the TSU111H ideal for sensor signal conditioning, battery management systems, onboard (OBC) and wireless chargers.
DS14162 - Rev 1 - December 2022
For further information contact your local STMicroelectronics sales office.
www.st.com
1 Package pin connection
Figure 1. Pin connection (top view)
Pin n°
1
2
3
4
5
Pin name
IN+
VCC-
IN-
OUT
VCC+
IN+ 1
VCC2
IN3
5 VCC+
4 OUT
SOT23-5
Table 1. Pin description
Non-inverting input channel
Negative supply voltage
Inverting input channel
Output channel
Positive supply voltage
Description
TSU111H
Package pin connection
DS14162 - Rev 1 page 2/31
2
TSU111H
Maximum ratings
Maximum ratings
Table 2. Absolute maximum ratings
Symbol
V
CC
V id
V in
Differential input voltage
Parameter Value
6
± V
CC
(V
CC-
) - 0.2 to (V
CC+
) +
0.2
I in
T stg
T j
R thja
ESD
Input current
Storage temperature
Maximum junction temperature
Thermal resistance junction-to-ambient
HBM: human body model
CDM: charged device model
SOT23-5
10
-65 to 150
160
250
4000
1500
1. All voltage values, except the differential voltage are with respect to the network ground terminal.
2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal.
3. (V
CC+
)- V in
must not exceed 6 V, V in
- (V
CC-
) must not exceed 6 V.
4. The input current must be limited by a resistor in-series with the inputs.
5. R th
are typical values.
6. Short-circuits can cause excessive heating and destructive dissipation.
7. Related to ESDA/JEDEC JS-001 Apr. 2010.
8. Related to JEDEC JESD22-C101-E Dec. 2009.
Symbol
V
CC
V icm
T oper
Table 3. Operating conditions
Parameter
Supply voltage
Common-mode input voltage range
Operating free-air temperature range
Value
1.5 to 5.5
(V
CC-
) to (V
CC+
) + 0.1
-40 to 150
Unit
V
Unit
V
°C mA
°C
°C/W
V
DS14162 - Rev 1 page 3/31
TSU111H
Electrical characteristics
3 Electrical characteristics
Table 4. Electrical characteristics at (V
CC+
) = 1.8 V with (V
CC-
) = 0 V, V icm
= V
CC connected to V
CC
/2 (unless otherwise specified)
/2, T amb
= 25 °C, and R
L
= 1 MΩ
Symbol Parameter Min.
Typ.
Max.
Unit
V io
ΔV io
/ΔT Input offset voltage drift
I io
I ib
CMR
A vd
V
OH
V
OL
I out
Input offset voltage
Input offset current
Input bias current
Common mode rejection ratio,
20 log (ΔV icm
/ΔV io
), V icm
= 0 to 1.8 V
Large signal voltage gain,
V out
= 0.2 V to (V
CC+
) - 0.2 V
High-level output voltage, (drop from
V
CC+
), V
ID
= 200 mV
Low-level output voltage,
V
ID
= - 200 mV
Output sink current, V out
= V
CC
,
V
ΙD
= - 200 mV
Output source current, V out
= 0 V,
V
ΙD
= 200 mV
Conditions
DC performance
T = 25 °C
-40 °C < T < 150 °C
-40 °C < T < 25 °C
25 °C < T < 150 °C
T = 25 °C
T = 25 °C
T = 25 °C
-40 °C < T < 150 °C
R
L
= 100 kΩ, T = 25 °C
R = 100 kΩ,
-40 °C < T < 150 °C
R
L
= 10 kΩ, T = 25 °C
R = 10 kΩ,
-40 °C < T < 150 °C
R
L
= 10 kΩ, T = 25 °C
R
L
= 10 kΩ,
-40 °C < T < 150 °C
T = 25 °C
-40 °C < T < 150 °C
T = 25 °C
-40 °C < T < 150 °C
82
2.8
1.5
2
74
67
95
1.5
1
1
102
126
11
9
5
4
250
600
6
3
25
40
25
40
µV
μV/°C pA dB mV mA
I
CC
GBP
Φ m
GM
SRp
SRn e n
Supply current (per channel), no load,
V out
= V
CC
/2
Gain bandwidth product
Phase margin R
L
= 1 MΩ, C
L
= 60 pF
Gain margin
Slew rate (10 % to 90 %)
R
L
= 1 MΩ, C
L
= 60 pF,
V out
= 0.3 V to (V
CC+
) - 0.3 V
Slew rate (10 % to 90 %)
R
L
= 1 MΩ, C
L
= 60 pF,
V out
= 0.3 V to (V
CC+
) - 0.3 V
Equivalent input noise voltage
T = 25 °C
-40 °C < T < 150 °C
-40 °C < T < 125 °C
AC performance
R
L
= 100 kΩ, C
L
= 60 pF
T = 25 °C
R
L
= 100 kΩ, C
L
= 60 pF
T = 25 °C
-40 °C < T < 150 °C
T = 25 °C
-40 °C < T < 150 °C f = 100 Hz
10
1.4
0.9
2.2
1.1
1.7
23
79
24
3.5
5.5
200
2.4
2.6
2.5
µA kHz degrees dB
V/ms
V/ms nV/√Hz
DS14162 - Rev 1 page 4/31
Symbol e n-pp trec trec
P
N
Parameter
Equivalent input noise voltage (Noise
RTI)
Overload recovery time (from positive rail)
Overload recovery time (from positive rail)
Overload recovery time (from negative rail)
T
T s startup
Settling time
Startup time (time between V supply reaching min. operating and V io
final value)
1. Guaranteed by design.
Conditions
0.1 to 10 Hz
100 mV from rail in comparator,
R
L
= 100 kΩ,
V
ΙD
= ±1 V, -40 °C < T < 150 °C
100 mV from rail in comparator,
R
L
= 100 kΩ,
V
ΙD
= ±1 V, -40 °C < T < 150 °C
1 V step, G = +1, 0.1%
G = 1, V in
= 0.2 V
Min.
300
645
1100
Typ.
3.9
TSU111H
Electrical characteristics
Max.
Unit
µVpp
220
µs
DS14162 - Rev 1 page 5/31
TSU111H
Electrical characteristics
Table 5. Electrical characteristics at (V
CC +
) = 3.3 V with (V
CC -
) = 0 V, V icm
= V
CC
/ 2, T connected to VCC/2 (unless otherwise specified) amb
= 25 °C, and R
L
= 1 MΩ
Symbol Parameter Min.
Typ.
Max.
Unit
V io
Input offset voltage
ΔV io
/ΔT Input offset voltage drift
I io
I ib
CMR
A vd
V
OH
V
OL
I out
I
CC
T s e n ʃe n
GBP
Φ m
G m
SR p
SR n t recP t recN
Input offset current
Input bias current
Common mode rejection ratio,
20 log (ΔV icm
/ΔV io
), V icm
= 0 to 3.3 V
Large signal voltage gain,
V out
= 0.2 V to (V
CC+
) - 0.2 V
High-level output voltage, (drop from V
CC+
),
V
ID
= 200 mV
Low-level output voltage, V
ID
= -200 mV
Output sink current, V out
= V
CC
,
V
ΙD
= -200 mV
Output source current, V out
= 0 V,
V
ΙD
= 200 mV
Supply current (per channel), no load,
V out
= V
CC
/2
Gain bandwidth product
Phase margin
Gain margin
Slew rate (10 % to 90 %) R
L
= 1 MΩ,
C
L
= 60 pF, V out
= 0.3 V to (V
CC+
) - 0.3 V
Slew rate (10 % to 90 %) R
L
= 1 MΩ,
C
L
= 60 pF, V out
= 0.3 V to (V
CC+
) - 0.3 V
Settling time
Equivalent input noise voltage
Low-frequency, peak-to-peak input noise
Overload recovery time (from positive rail)
Overload recovery time (from negative rail)
Conditions
DC performance
T = 25 °C
-40 °C < T < 150 °C
-40 °C < T < 25 °C
25 °C < T < 150 °C
T = 25 °C
T = 25 °C
T = 25 °C
-40 °C < T < 150 °C
R
L
= 100 kΩ, T = 25 °C
R
L
= 100 kΩ, -40 °C < T < 150 °C
R
L
= 10 kΩ, T = 25 °C
R
L
= 10 kΩ, -40 °C < T < 150 °C
R
L
= 10 kΩ, T = 25 °C
R
L
= 10 kΩ, -40 °C < T < 150 °C
T = 25 °C
-40 °C < T < 150 °C
T = 25 °C
-40 °C < T < 150 °C
T = 25 °C
-40 °C < T < 150 °C
-40 °C < T < 125 °C
AC performance
R
L
= 100 kΩ, C
L
= 60 pF
T = 25 °C
-40 °C < T < 150 °C
T = 25 °C
-40 °C < T < 150 °C
1 V step, G = +1, 0.1% f = 100 Hz
Bandwidth: f = 0.1 to 10 Hz
100 mV from rail in comparator, R
L
= 100 kΩ,
V
ΙD
= ±1 V, -40 °C < T < 150 °C
100 mV from rail in comparator, R
L
= 100 kΩ,
V
ΙD
= ±1 V, -40 °C < T < 150 °C
78
73
100
88
12
6
9
5
14
1.4
0.9
2.5
1.1
1
1
105
134
11
9
22
17
1.8
5.5
445
200
4.6
25
80
25
3.5
400
600
25
40
25
40
250
600
6
3
2.6
2.8
2.7
µV
μV/°C pA dB mV mA
µA kHz degrees dB
V/ms
V/ms
µs nV/√Hz
µVpp
µs
DS14162 - Rev 1 page 6/31
Symbol
T startup
Parameter
Startup time (time between V supply min operating and V io
final value)
reaching
1. Guaranteed by design.
Conditions
G = 1, V in
= 0.2 V
TSU111H
Electrical characteristics
Min.
Typ.
330
Max.
Unit
µs
DS14162 - Rev 1 page 7/31
TSU111H
Electrical characteristics
Table 6. Electrical characteristics at (V
CC +
) = 5 V with (V
CC -
) = 0 V, V icm
= V
CC
/2, T to V
CC
/2 (unless otherwise specified).
amb
= 25 °C, and R
L
= 1 MΩ connected
Min.
Typ.
Max.
Unit Symbol
ΔV io
I
V
I
I io io ib s n
/ΔT
CMR t
SVR
I
A
V
V source
I vd
OH
OL sink
CC
GBP
Φ m
G m
SR
SR
T e ʃe n p n recP
Input offset voltage
Input offset voltage drift
Input offset current
Input bias current
Common mode rejection ratio,
20 log (ΔV icm
/ΔV io
),V icm
= 0 to 5 V
Supply voltage rejection ratio,
V
CC
= 1.5 to 5.5 V, V icm
= 0 V
Large signal voltage gain,
V out
= 0.2 V to (V
CC+
) - 0.2 V
High-level output voltage, (drop from
V
CC+
), V
ID
Parameter
= 200 mV
Low-level output voltage,
V
ID
= - 200 mV
Output sink current,
V out
= V
CC
, V
ΙD
= - 200 mV
Output source current,
V out
= 0 V, V
ΙD
= 200 mV
Supply current (per channel), no load, V out
= V
CC
/2
Conditions
DC performance
T = 25 °C
-40 °C < T < 150 °C
-40 °C < T < 25 °C
25 °C < T < 150 °C
T = 25 °C
T = 25 °C
T = 25 °C
-40 °C < T < 150 °C
T = 25 °C
-40 °C < T < 150 °C
R
L
= 100 kΩ, T = 25 °C
R
L
= 100 kΩ, -40 °C < T < 150 °C
R
L
= 10 kΩ, T = 25 °C
RL= 10 kΩ, -40 °C < T < 150 °C
R
L
= 10 kΩ, T = 25 °C
RL= 10 kΩ, -40 °C < T < 150 °C
T = 25 °C
-40 °C < T < 150 °C
T = 25 °C
-40 °C < T < 150 °C
T = 25 °C
-40 °C < T < 150 °C
-40 °C < T < 125 °C
Gain bandwidth product
Phase margin
Gain margin
Slew rate (10 % to 90 %) R
L
= 1 MΩ,
C
L
= 60 pF, V
0.3 V out
= 0.3 V to (V
CC+
) -
Slew rate (10 % to 90 %) R
L
= 1 MΩ,
C
L
= 60 pF, V
0.3 V out
= 0.3 V to (V
CC+
) -
Settling time
Equivalent input noise voltage
Low-frequency, peak-to-peak input noise
Overload recovery time
(from positive rail)
R
L
= 1 MΩ, C
L
= 60 pF
T = 25 °C
-40 °C < T < 150 °C
T = 25 °C
-40 °C < T < 150 °C
1 V step, G = +1, 0.1% f = 100 Hz
Bandwidth: f = 0.1 to 10 Hz
100 mV from rail in comparator,
R
L
= 100 kΩ, V
ΙD
= ±1 V, 25 °C
76
73
89
78
105
86
30
15
25
18
14
1.4
0.9
2.5
1.1
1
1
107
110
139
12
7
45
39
2
25
81
24
3.8
5.5
430
200
4.4
550
25
40
25
40
250
600
6
3
3
4.4
3.5
µV
μV/°C pA dB mV mA
µA kHz degrees dB
V/ms
V/ms
µs nV/√Hz
µVpp
µs
DS14162 - Rev 1 page 8/31
Symbol t recN
Parameter
Overload recovery time (from negative rail)
T startup
Startup time (time between V supply reaching min operating and V io
final value)
1. Guaranteed by design.
Conditions
100 mV from rail in comparator,
R
L
= 100 kΩ, V
ΙD
= ±1 V, 25 °C
G = 1, V in
= 0.2 V
TSU111H
Electrical characteristics
Min.
Typ.
900
Max.
Unit
µs
350
DS14162 - Rev 1 page 9/31
TSU111H
Typical performance characteristics
4 Typical performance characteristics
Figure 2. Supply current vs. supply voltage at low V icm
Figure 3. Supply current vs. supply voltage at high V icm
Figure 4. Supply current vs. supply voltage at mid V icm
Figure 5. Supply current vs. common mode voltage at
1.8 V supply voltage
DS14162 - Rev 1 page 10/31
TSU111H
Typical performance characteristics
Figure 6. Supply current vs. common mode voltage at
3.3 V supply voltage
Figure 7. Supply current vs. common mode voltage at 5 V supply voltage
Figure 8. Input offset voltage vs. common mode voltage at 1.8 V supply voltage
Figure 9. Input offset voltage vs. common mode voltage at 3.3 V supply voltage
Figure 10. Input offset voltage vs. common mode voltage at 5 V supply voltage
Figure 11. Input offset voltage vs. supply voltage at mid
V icm
DS14162 - Rev 1 page 11/31
Figure 12. High level output voltage (drop from V cc+
)
TSU111H
Typical performance characteristics
Figure 13. Low level output voltage
Figure 14. Output characteristics at 1.8 V supply voltage and mid V icm
Figure 15. Output characteristics at 3.3 V supply voltage and mid V icm
Figure 16. Output characteristics at 5 V supply voltage and mid V icm
Figure 17. Output saturation with a sine wave on the input at F = 1 Hz
DS14162 - Rev 1 page 12/31
TSU111H
Typical performance characteristics
Figure 18. Output saturation with a sine wave on the input at F = 100 Hz
Figure 19. Output saturation with a sine wave on the input at F = 500 Hz
Figure 20. Output saturation with a square wave on the input at F = 100 Hz
Figure 21. Phase reversal free
Figure 22. Output swing vs. input signal frequency
Figure 23. Triangulation of a sine wave at f = 1 kHz
DS14162 - Rev 1 page 13/31
TSU111H
Typical performance characteristics
Figure 24. Large signal response at 3.3 V supply voltage at f = 100 Hz
Figure 25. Small signal response at 3.3 V supply voltage at f = 1 kHz
Figure 26. Overshoot vs. capacitive load at 3.3 V supply voltage
Figure 27. Recovery time from negative saturation vs.
supply voltage
Figure 28. Recovery time from positive saturation vs.
supply voltage
Figure 29. Slew rate vs. supply voltage at mid V icm
DS14162 - Rev 1 page 14/31
TSU111H
Typical performance characteristics
Figure 30. Negative overshoot vs. input common-mode voltage at 1.8 V supply voltage
Figure 31. Positive overshoot vs. input common-mode voltage at 1.8 V supply voltage
Figure 32. Negative overshoot vs. input common-mode voltage at 3 V supply voltage
Figure 33. Positive overshoot vs. input common-mode voltage at 3 V supply voltage
Figure 34. Negative overshoot vs. input common-mode voltage at 5 V supply voltage
Figure 35. Positive overshoot vs. input common-mode voltage at 5 V supply voltage
DS14162 - Rev 1 page 15/31
Figure 36. Bode diagram at 1.8 V supply voltage
TSU111H
Typical performance characteristics
Figure 37. Bode diagram at 3.3 V supply voltage
Figure 38. Bode diagram at 5 V supply voltage
Figure 39. Crosstalk diagram at 1.8 V supply voltage
Figure 40. Crosstalk diagram at 5 V supply voltage Figure 41. PSRR diagram at 1.8 V supply voltage
DS14162 - Rev 1 page 16/31
Figure 42. PSRR diagram at 5 V supply voltage
TSU111H
Typical performance characteristics
Figure 43. Input referred voltage noise density for different power supply voltages at mid Vicm
Figure 44. Noise amplitude on 0.1 to 10 Hz freq. range at
1.8 V supply voltage
Figure 45. Noise amplitude on 0.1 to 10 Hz freq. range at
3.3 V supply voltage
Figure 46. Noise amplitude on 0.1 to 10 Hz freq. range at
5 V supply voltage
Figure 47. Input offset voltage distribution at 1.8 V supply voltage
DS14162 - Rev 1 page 17/31
TSU111H
Typical performance characteristics
Figure 48. Input offset voltage distribution at 3.3 V supply voltage
Figure 49. Input offset voltage distribution at 5 V supply voltage
Figure 50. Input offset voltage temperature coefficient distribution from - 40 °C to 25 °C at 1.8 V supply voltage
Figure 51. Input offset voltage temperature coefficient distribution from - 40 °C to 25 °C at 5 V supply voltage
Figure 52. Input offset voltage temperature coefficient distribution from 25 °C to 150 °C at 1.8 V supply voltage
Figure 53. Input offset voltage temperature coefficient distribution from 25 °C to 150 °C at 5 V supply voltage
DS14162 - Rev 1 page 18/31
Figure 54. Input offset voltage vs. temperature at 1.8 V supply voltage
TSU111H
Typical performance characteristics
Figure 55. Input offset voltage vs. temperature at 5 V supply voltage
DS14162 - Rev 1 page 19/31
5
5.1
5.1.1
5.1.2
TSU111H
Ordering information
Ordering information
Nanopower applications
The TSU111H can operate from 1.5 V to 5.5 V. The parameters are fully specified at 1.8 V, 3.3 V, and 5 V supply voltages and are very stable in the full VCC range. Additionally, the main specifications are guaranteed on the temperature range from -40 to 150 °C.
Schematic optimization aiming for nanopower
To benefit from the full performance of the TSU111IY, the impedances must be maximized so that current consumption is not lost where it is not required.
For example, an aluminum electrolytic capacitance can have significantly high leakage. This leakage may be greater than the current consumption of the op amp. For this reason, ceramic type capacitors are preferred.
For the same reason, big resistor values should be used in the feedback loop. However, there are two main limitations to be considered when choosing a resistor.
1.
Noise generated: a 100 kΩ resistor generates 40 nV/√Hz, a bigger resistor value generates even more noise.
2.
Leakage on the PCB: leakage can be generated by moisture. This can be improved by using a specific coating process on the PCB.
PCB layout considerations
For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible to the power supply pins.
Minimizing the leakage from sensitive high impedance nodes on the inputs of the TSU111H can be performed with a guarding technique. The technique consists of surrounding high impedance tracks by a low impedance track (the ring). The ring is at the same electrical potential as the high impedance node.
Therefore, even if some parasitic impedance exists between the tracks, no leakage current can flow through them
as they are at the same potential (see Figure 56. Guarding on the PCB
).
Figure 56. Guarding on the PCB
5.2
Rail-to-rail input
The TSU111H is built with two complementary PMOS and NMOS input differential pairs. Thus, the device has a rail-to-rail input, and the input common mode range is extended from (V
CC-
) - 0.1 V to (V
CC+
) + 0.1 V.
The TSU111H has been designed to prevent phase reversal behavior.
DS14162 - Rev 1 page 20/31
5.3
5.4
5.5
5.6
TSU111H
Input offset voltage drift overtemperature
Input offset voltage drift overtemperature
The maximum input voltage drift variation overtemperature is defined as the offset variation related to the offset value measured at 25 °C. The operational amplifier is one of the main circuits of the signal conditioning chain, and the amplifier input offset is a major contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated during production at application level. The maximum input voltage drift overtemperature enables the system designer to anticipate the effect of temperature variations.
The maximum input voltage drift overtemperature is computed using
ΔVIO
ΔT = max
Vio T − Vio 25°C
T − 25°C
(1)
Where T = -40 °C and 150 °C
The TSU111H datasheet maximum values are guaranteed by measurements on a representative sample size ensuring a C pk
(process capability index) greater than 1.3.
Using the TSU111H with sensors
The TSU111H has MOS inputs, thus input bias currents can be guaranteed down to 10 pA maximum at ambient temperature. This is an important parameter when the operational amplifier is used in combination with high impedance sensors.
The TSU111H is perfectly suited for trans-impedance configuration. This configuration allows a current to be converted into a voltage value with a gain set by the user. It is an ideal choice for portable electrochemical gas sensing or photo/UV sensing applications. The TSU111H, using trans-impedance configuration, is able to provide a voltage value based on the physical parameter sensed by the sensor.
Fast desaturation
When the TSU111H goes into saturation mode, it takes a short period of time to recover, typically 500 µs. When recovering after saturation, the TSU111H does not exhibit any voltage peaks that could generate issues (such as false alarms) in the application (see
We can observe that this circuit still exhibits good gain even close to the rails, that is, A vd
greater than 100 dB for V
CC
= 3.3 V with V out
varying from 200 mV up to a supply voltage minus 200 mV. With a trans-impedance schematic, a voltage reference can be used to keep the signal away from the supply rails.
Using the TSU111H in comparator mode
The TSU111H can be used as a comparator. In this case, the output stage of the device always operates in saturation mode. In addition,
,
,
Figure 7 , show that the current consumption is not higher and
even decreases smoothly close to the rails. The TSU111H is obviously an operational amplifier and is therefore optimized for use in linear mode. We recommend using the TS88 series of nanopower comparators if the primary function is to perform a signal comparison only.
DS14162 - Rev 1 page 21/31
5.7
TSU111H
ESD structure of the TSU111H
ESD structure of the TSU111H
The TSU111H is protected against electrostatic discharge (ESD) with dedicated diodes (see
). These diodes must be considered at application level especially when signals applied on the input pins go beyond the power supply rails (V
CC+
) or (V
CC-
).
Figure 57. ESD structure
-
TSU111H
+
5.8
Current through the diodes must be limited to a maximum of 10 mA, as stated in
. A serial resistor on the inputs can be used to limit this current.
EMI robustness of nanopower devices
Nanopower devices exhibit higher impedance nodes and consequently they are more sensitive to EMI. To improve the natural robustness of the TSU111H device, we recommend adding three capacitors of around 22 pF each between the two inputs, and between each input and ground. These capacitors lower the impedance of the input at high frequencies and therefore reduce the impact of the radiation.
DS14162 - Rev 1 page 22/31
6
6.1
TSU111H
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
SOT23-5L package information
Figure 58. SOT23-5L package outline
DS14162 - Rev 1
θ page 23/31
TSU111H
SOT23-5L package information
Table 7. SOT23-5L mechanical data
Symbol
D
E b c
E1 e
A
A1
A2
θ
N e1
L
Min.
0.00
0.90
0.30
0.08
mm
Typ.
1.15
Max.
1.45
0.15
1.30
0.50
0.22
0.30
0
1.90
0.45
4
5
2.90
2.80
1.60
0.95
0.60
8
1. Values in inches are converted from mm and rounded to 4 decimal digits.
Min.
0.000
0.035
0.012
0.003
0.012
0
Figure 59. SOT23-5L recommended footprint
Typ.
0.045
0.114
0.110
0.063
0.037
0.075
0.018
4
5
Max.
0.057
0.006
0.051
0.020
0.009
0.024
8
DS14162 - Rev 1 page 24/31
TSU111H
Ordering information
7 Ordering information
Table 8. Order codes
Order code
TSU111HYLT
Temperature range
-40 °C to +150 °C
1. All devices are delivered in tape and reel packing.
Package
SOT23-5
Marking
K1J
DS14162 - Rev 1 page 25/31
Revision history
Date
06-Dec-2022
Table 9. Document revision history
Revision
1 Initial release.
Changes
TSU111H
DS14162 - Rev 1 page 26/31
TSU111H
Contents
Contents
DS14162 - Rev 1 page 27/31
TSU111H
List of tables
List of tables
Table 4. Electrical characteristics at (V
Table 5. Electrical characteristics at (V
Table 6. Electrical characteristics at (V
DS14162 - Rev 1 page 28/31
TSU111H
List of figures
List of figures
Figure 2. Supply current vs. supply voltage at low V icm
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 3. Supply current vs. supply voltage at high V icm
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 4. Supply current vs. supply voltage at mid V icm
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 11. Input offset voltage vs. supply voltage at mid V icm
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 12. High level output voltage (drop from V cc+
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 14. Output characteristics at 1.8 V supply voltage and mid V icm
Figure 15. Output characteristics at 3.3 V supply voltage and mid V icm
Figure 16. Output characteristics at 5 V supply voltage and mid V icm
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 29. Slew rate vs. supply voltage at mid V icm
DS14162 - Rev 1 page 29/31
TSU111H
List of figures
DS14162 - Rev 1 page 30/31
TSU111H
IMPORTANT NOTICE – READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgment.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, refer to www.st.com/trademarks . All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2022 STMicroelectronics – All rights reserved
DS14162 - Rev 1 page 31/31
Download
Offentligt link opdateret
Det offentlige link til din chat er blevet opdateret. You may view and manage your chat links after registration here.
Dokument offentligt link
Annonce