STMicroelectronics STL90N10F7 Datasheet
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STL90N10F7
Datasheet
N-channel 100 V, 7 mΩ typ., 70 A STripFET F7 Power MOSFET in a PowerFLAT 5x6 package
G(4)
PowerFLAT 5x6
D(5, 6, 7, 8)
S(1, 2, 3)
8 7 6 5
Features
Order code
STL90N10F7
V
DS
100 V
R
DS(on)
max.
8 mΩ
• Among the lowest R
DS(on)
on the market
• Excellent FoM (figure of merit)
• Low C rss
/C iss
ratio for EMI immunity
• High avalanche ruggedness
Applications
• Switching applications
I
D
70 A
P
TOT
100 W
1 2 3 4
Top View
AM15540v2
Description
This N-channel Power MOSFET utilizes STripFET F7 technology with an enhanced trench gate structure that results in very low on-state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching.
Product status link
STL90N10F7
Product summary
Order code
Marking
Package
Packing
STL90N10F7
90N10F7
PowerFLAT 5x6
Tape and reel
DS9621 - Rev 7 - February 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
STL90N10F7
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
DS
V
GS
Drain-source voltage
Parameter
I
I
D
D
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (continuous) at T pcb
= 25 °C
Drain current (continuous) at T pcb
= 100 °C
Drain current (pulsed) I
DM
I
DM
P
TOT
P
TOT
E
AS
T stg
T
J
Drain current (pulsed)
Total power dissipation at T
Total power dissipation at T
Storage temperature range
C
= 25 °C pcb
Single pulse avalanche energy
= 25 °C
Operating junction temperature range
1. This value is rated according to R thj-c
.
2. This value is rated according to R thj-pcb
.
3. Pulse width is limited by safe operating area.
4. Starting T
J
= 25 °C, I
D
= 10 A, V
DD
= 50 V.
Table 2. Thermal data
Symbol
R thj-case
R thj-pcb
Thermal resistance junction-case
Thermal resistance junction-pcb
Parameter
1. When mounted on 1 inch², 2 Oz. Cu FR-4 board.
64
100
5
300
Value
100
±20
70
50
16
11
280
- 55 to 175
A
W
W
A
A
A
A
A
Unit
V
V mJ
°C
°C
Value
1.5
31
Unit
°C/W
DS9621 - Rev 7 page 2/16
2
STL90N10F7
Electrical characteristics
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Table 3. Static
Parameter Test conditions
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 250 µA
V
GS
= 0 V, V
DS
= 100 V
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 100 V, T
C
= 125 °C
Gate-body leakage current V
DS
= 0 V, V
GS
= 20 V
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA
Static drain-source on-resistance V
GS
= 10 V, I
D
= 8 A
Min.
Typ.
Max.
Unit
100
1
V
µA
2.5
3.5
7
100
100
4.5
8
µA nA
V mΩ
Symbol
C iss
C oss
C rss
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Table 4. Dynamic
Test conditions
V
DS
= 50 V, f = 1 MHz, V
GS
= 0 V
V
DD
= 50 V, I
D
= 16 A, V
GS
= 10 V
(see
Figure 13. Test circuit for gate charge behavior )
Min.
Typ.
Max.
Unit
-
-
-
-
-
3100
700
45
45
18
4030
910
58
60 pF pF pF nC nC
13 nC
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Table 5. Switching times
Test conditions
V
DD
= 50 V, I
D
= 8 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see
Figure 12. Test circuit for resistive load switching times
and
Figure 17. Switching time waveform )
Min.
Typ.
Max.
Unit
19 ns
32 ns
-
36
13 -
ns ns
Table 6. Source-drain diode
Symbol
V
SD
t rr
I
Q rr
RRM
Parameter
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Test conditions
V
GS
= 0 V, I
SD
= 16 A
I
SD
= 16 A, di/dt = 100 A/µs,
V
DD
= 80 V, T
J
= 150 °C
(see
Figure 14. Test circuit for inductive load switching and diode recovery times )
1. Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
Min.
Typ.
Max.
Unit
1.1
V
-
70
125
90 ns nC
3.6
A
DS9621 - Rev 7 page 3/16
2.1
STL90N10F7
Electrical characteristics (curves)
Electrical characteristics (curves)
I
D
(A)
Figure 1. Safe operating area
GIPG170320151415ALS
10
10
2
1
10 0
10 -1
R
DS(on)
in this area is
by max.
T j
T c
= 175 °C
= 25 °C single pulse
10 0 10 1 10 2
1 μs
10 μs
100 μs
1 ms
V
DS
(V)
I
D
(A)
300
Figure 3. Output characteristics
AM18089v1
V GS =10V
9V
250
8V
200
7V
150
100
6V
50
0
0 2 4 6 8
5V
V
DS
(V)
Figure 5. Gate charge vs gate-source voltage
AM18091v1 V
GS
(V)
12
V
DD
=50V
I
D
=16A
10
8
6
4
2
0
0 10 20 30 40 50 Q g
(nC)
K
Figure 2. Thermal impedance
GIPG170320151230ALS
δ = 0.5
10 -1
δ = 0.2
δ = 0.1
δ = 0.05
δ = 0.02
δ = 0.01
single pulse
10 -2
10 -5 10 -4 10 -3 10 -2 10 -1 c t p
(s)
200
150
100
50
0
2
I
D
(A)
300
Figure 4. Transfer characteristics
AM18090v1
V
DS
=9V
250
4 6 8 10 V
GS
(V)
Figure 6. Static drain-source on-resistance
R
DS(on)
(mΩ)
V
GS
=10V
AM18092v1
7.60
7.20
6.80
6.40
6.00
0 5 10 15 20 I D (A)
DS9621 - Rev 7 page 4/16
DS9621 - Rev 7
STL90N10F7
Electrical characteristics (curves)
C
(pF)
3500
3000
2500
2000
1500
1000
500
0
0
Figure 7. Capacitance variations
AM18093v1
20 40 60
C iss
80
C oss
C
V
DS
(V) rss
Figure 8. Normalized gate threshold voltage vs temperature
V
GS(th)
(norm)
1.2
I
D
=250µA
AM18094v1
1.0
0.8
0.6
0.4
0.2
0
-55 -5 45 95 145 T
J
(°C)
Figure 9. Normalized on-resistance vs temperature
R DS(on)
(norm)
AM18095v1
2.0
V
GS
=10V
1.5
1.0
0.5
0
-55 -5 45 95 145 T
J
(°C)
Figure 10. Normalized V
(BR)DSS
vs temperature
AM18096v1 V
(BR)DSS
(norm)
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
-55 -5
I
D
=250µA
45 95 145 T
J
(°C)
Figure 11. Source-drain diode forward characteristics
AM18097v1
V
SD
(V)
T j
=-55°C
0.9
T j
=25°C
0.8
0.7
T j
=175°C
0.6
0.5
5 10 15 20 25 30 I
SD
(A) page 5/16
STL90N10F7
Test circuits
3
Test circuits
Figure 12. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 14. Test circuit for inductive load switching and diode recovery times
Figure 13. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
I
G
= CONST
2.7 kΩ
47 kΩ
1 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 15. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 16. Unclamped inductive waveform
V (BR)DSS
V D
I DM
I D
V DD V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF
V
DD
D.U.T.
AM01471v1
0
Figure 17. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS9621 - Rev 7 page 6/16
4
4.1
STL90N10F7
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
PowerFLAT 5x6 type R package information
Figure 18. PowerFLAT 5x6 type R package outline
DS9621 - Rev 7
A0ER_8231817_Rev20 page 7/16
DS9621 - Rev 7
Dim.
E7
K
L
L1
θ
E2
E3
E4
E5
E6 e
E
D2
D3
D4
D5
D6
A
A1
A2 b
C
D
STL90N10F7
PowerFLAT 5x6 type R package information
5.95
3.50
2.35
0.40
0.08
0.20
0.75
1.275
0.60
0.05
0°
Table 7. PowerFLAT 5x6 type R mechanical data mm
Typ.
Min.
0.80
0.02
0.25
0.30
5.80
5.00
4.15
4.05
4.80
0.25
0.15
6.00
5.20
4.20
5.00
0.40
0.30
1.27
6.15
0.325
0.90
0.15
Max.
1.00
0.05
0.50
6.20
5.40
4.45
4.35
5.20
0.55
0.45
6.35
3.70
2.55
0.60
0.28
0.45
1.05
1.575
0.80
0.25
12° page 8/16
4.2
STL90N10F7
PowerFLAT 5x6 type R SUBCON package information
PowerFLAT 5x6 type R SUBCON package information
Figure 19. PowerFLAT 5x6 type R SUBCON package outline
DS9621 - Rev 7 page 9/16
DS9621 - Rev 7
STL90N10F7
PowerFLAT 5x6 type R SUBCON package information
Dim.
E5
H
K
L
L1
L2
P
θ
D1
D2 e
E
E1
E2
E4
A
A1 b b1 c
D
Table 8. PowerFLAT 5x6 type R SUBCON package mechanical data
Min.
0.90
0.35
0.21
mm
Typ.
0.95
0.02
0.40
0.30
0.25
Max.
1.00
0.45
0.06
0.51
1.10
0.51
0.06
4.80
3.91
1.17
5.90
5.70
3.34
0.15
4.90
4.01
1.27
6.00
5.75
3.44
0.25
0.16
0.61
0.61
0.13
0.34
5.10
5.00
4.11
1.37
6.10
5.80
3.54
0.35
0.26
0.71
1.00
8°
1.10
10°
0.71
0.20
0.10
1.20
12° page 10/16
DS9621 - Rev 7
STL90N10F7
PowerFLAT 5x6 type R SUBCON package information
Figure 20. PowerFLAT 5x6 recommended footprint (dimensions are in mm)
8231817_FOOTPRINT_simp_Rev_20 page 11/16
4.3
STL90N10F7
PowerFLAT 5x6 packing information
PowerFLAT 5x6 packing information
Figure 21. PowerFLAT 5x6 tape (dimensions are in mm)
Pin 1 identification
(I) Measured from centreline of sprocket hole
to centreline of pocket.
(II) Cumulative tolerance of 10 sprocket
holes is ±0.20.
(III) Measured from centreline of sprocket
hole to centreline of pocket
Base and bulk quantity 3000 pcs
All dimensions are in millimeters
8234350_Tape_rev_C
Figure 22. PowerFLAT 5x6 package orientation in carrier tape
DS9621 - Rev 7 page 12/16
Figure 23. PowerFLAT 5x6 reel
STL90N10F7
PowerFLAT 5x6 packing information
DS9621 - Rev 7 page 13/16
STL90N10F7
Revision history
Date
16-Apr-2013
06-Mar-2014
16-Dec-2014
17-Mar-2015
01-Aug-2017
29-Aug-2017
10-Feb-2020
Revision
1
2
3
4
5
6
7
Table 9. Document revision history
Changes
First release.
– Modified: R
DS(on)
value in cover page
– Modified: V
GS(th)
values in Table 4
– Modified: R
DS(on)
typ. and max values in Table 4
– Modified: typical values in Table 5, 6 and 7
– Updated: Section 4: Package mechanical data
– Added: Section 2.1: Electrical characteristics (curves)
– Updated: Section 4: Package mechanical data
– Document status promoted from preliminary data to production data
– Updated title, features and description in cover page.
– Updated R
DS(on)
values and Figure 7: Static drain-source onresistance.
–Text edits throughout document
–Updated cover page title description
–Updated cover page features table
–In table 2. Absolute maximum ratings , added "E
AS
" information and footnote 4
–In table 3. Thermal data, added footnote 1
–Renamed table 4. Static (was On/off states)
–Updated table 5. Dynamic
–Updated table 7. Source drain diode
–In Section 2.1 Electrical characteristics (curves) , updated figures 2, 3, 10 and 11
–Updated and renamed Section 4 Package information
Updated Absolute maximum ratings.
Updated Static and Source-drain diode.
Updated Internal schematic diagram.
Minor text changes.
Updated Table 3. Static .
Minor text changes.
Updated
.
Minor text changes.
DS9621 - Rev 7 page 14/16
STL90N10F7
Contents
Contents
DS9621 - Rev 7 page 15/16
STL90N10F7
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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© 2020 STMicroelectronics – All rights reserved
DS9621 - Rev 7 page 16/16
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