STL60N10F7
Datasheet
N-channel 100 V, 14.5 mΩ typ., 12 A, STripFET F7 DeepGATE Power MOSFET in a PowerFLAT 5x6 package
G(4)
PowerFLAT 5x6
D(5, 6, 7, 8)
S(1, 2, 3)
8 7 6 5
Features
Order code
STL60N10F7
V
DS
100 V
R
DS(on)
max.
18 mΩ
• Among the lowest R
DS(on)
on the market
• Excellent FoM (figure of merit)
• Low C rss
/C iss
ratio for EMI immunity
• High avalanche ruggedness
Applications
• Switching applications
I
D
12 A
P
TOT
5 W
1 2 3 4
Top View
AM15540v2
Description
This N-channel Power MOSFET utilizes STripFET F7 technology with an enhanced trench gate structure that results in very low on-state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching.
Product status link
STL60N10F7
Product summary
Order code
Marking
Package
Packing
STL60N10F7
60N10F7
PowerFLAT 5x6
Tape and reel
DS9584 - Rev 4 - February 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
STL60N10F7
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
DS
V
GS
Drain-source voltage
Parameter
I
I
D
(1)
D
(2)
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (continuous) at T pcb
= 25 °C
Drain current (continuous) at T pcb
= 100 °C
Drain current (pulsed) I
DM
(2)(3)
P
TOT
(1)
P
TOT
(2)
T stg
T
J
Total power dissipation at T
Total power dissipation at T
Storage temperature range
C
= 25 °C pcb
= 25 °C
Operating junction temperature range
1. This value is rated according to R thj-c
.
2. This value is rated according to R thj-pcb
.
3. Pulse width is limited by safe operating area.
Table 2. Thermal data
Symbol
R thj-case
R thj-pcb
(1)
Thermal resistance junction-case
Thermal resistance junction-pcb
Parameter
1. When mounted on a 1-inch² FR-4 board, 2oz Cu, t < 10 s.
Value
100
20
46
33
12
9
48
72
5
- 55 to 175
W
W
°C
°C
A
A
A
A
A
Unit
V
V
Value
2.08
31
Unit
°C/W
DS9584 - Rev 4 page 2/17
2
STL60N10F7
Electrical characteristics
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Table 3. On/off states
Parameter Test conditions
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, V
DS
= 100 V
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 100 V, T
C
= 125 °C
Gate-body leakage current V
DS
= 0 V, V
GS
= 20 V
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA
Static drain-source on-resistance V
GS
= 10 V, I
D
= 6 A
Min.
Typ.
Max.
Unit
100
1
V
µA
2.5
14.5
100
100
4.5
18
µA nA
V mΩ
Symbol
C iss
C oss
C rss
Q g
Q gs
Q gd
Q oss
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Output charge
Table 4. Dynamic
Test conditions
V
DS
= 50 V, f = 1 MHz, V
GS
= 0 V
V
DD
= 50 V, I
D
= 12 A, V
GS
= 10 V
(see
Figure 13. Test circuit for gate charge behavior )
V
DD
= 40 V, V
GS
= 0 V
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
-
-
-
-
Min.
Typ.
Max.
Unit
-
-
-
1640
360
25
-
-
pF pF pF
25
12
5
28
-
-
-
nC nC nC nC
Table 5. Switching times
Test conditions
V
DD
= 50 V, I
D
= 6 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see
Figure 12. Test circuit for resistive load switching times
and
Figure 17. Switching time waveform )
Min.
Typ.
Max.
Unit
15 ns
-
-
-
17
24
8
-
-
ns ns ns
DS9584 - Rev 4 page 3/17
STL60N10F7
Electrical characteristics
Table 6. Source-drain diode
Symbol
I
SD
I
SDM
(1)
V
I
SD
(2)
t
Q rr rr
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Test conditions
V
GS
= 0 V, I
SD
= 16 A
I
SD
= 12 A, di/dt = 100 A/µs,
V
DD
= 50 V, T
J
= 150 °C
(see
Figure 14. Test circuit for inductive load switching and diode recovery times )
1. Pulse width limited by safe operating area.
2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
-
-
-
Min.
Typ.
Max.
Unit
12 A
48 A
1.1
53
67
V ns nC
2.5
A
DS9584 - Rev 4 page 4/17
2.1
STL60N10F7
Electrical characteristics (curves)
Electrical characteristics (curves)
I
D
(A)
Figure 1. Safe operating area
AM16122v1
10
1 era tio n i n th
Op
Lim ite d b is y m ax
R are a i s
DS
(on
)
0.1
0.01
0.1 1
Tj=175°C
Tpcb=25°C
S ingle puls e
10 V DS (V)
10ms
100ms
1s
I D (A)
Figure 3. Output characteristics
AM16124v1
V
GS
=7, 8, 9, 10V
40
6V
30
20
10
0
0 2 4 6
5V
8
4V
V DS (V)
Figure 2. Thermal impedance
K
δ=0.5
AM16123v1
10 -1
0.2
0.1
0.05
0.02
0.01
pcb
10 -2
S ingle puls e
10 -3
10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t p (s )
30
20
10
0
3
I D
(A)
Figure 4. Transfer characteristics
AM16125v1
V
DS
=8V
40
4 5 6 V
GS
(V)
Figure 5. Gate charge vs gate-source voltage
AM16126v1 V GS
(V)
12
V
DD
=50V
I D =12A
10
8
6
4
2
0
0 5 10 15 20 25 30 Q g
(nC)
Figure 6. Static drain-source on-resistance
AM16127v1 R
DS (on)
(m Ω )
14.8
V GS =10V
14.7
14.6
14.5
14.4
14.3
14.2
2 4 6 8 10 12 I D (A)
DS9584 - Rev 4 page 5/17
DS9584 - Rev 4
STL60N10F7
Electrical characteristics (curves)
C
(pF)
Figure 7. Capacitance variations
AM16114v1
Cis s
1000
Cos s
100
0
0 20 40 60 80
Crs s
V DS (V)
Figure 8. Normalized gate threshold voltage vs temperature
V GS (th)
(norm)
AM16129v1
I
D
=250µA
1.2
1.0
1
0.8
0.6
0.4
0.2
-75 -50 -25 0 25 50 75 100 125 150 T
J
(°C)
Figure 9. Normalized on-resistance vs temperature
R DS (on)
(norm)
AM16130v1
2.0
2
I
D
=6A
V GS =10V
Figure 10. Normalized V
(BR)DSS
vs temperature
AM16132v1 V DS
(norm)
1.04
1.03
1.02
I D =1mA
1.5
0.5
0
-75 -50 -25 0 25 50 75 100 125 150 T
J
(°C)
1.00
1
0.99
0.98
0.97
0.96
-75 -50 -25 0 25 50 75 100 125 150 T
J
(°C)
Figure 11. Source-drain diode forward characteristics
AM16131v1
V
S D
(V)
1.1
T J =-55°C
T
J
=25°C
0.7
0.6
0.5
0.4
0.3
0.2
0 2 4 6
T
J
=175°C
8 10 12 I S D (A) page 6/17
STL60N10F7
Test circuits
3
Test circuits
Figure 12. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 14. Test circuit for inductive load switching and diode recovery times
Figure 13. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
I
G
= CONST
2.7 kΩ
47 kΩ
1 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 15. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 16. Unclamped inductive waveform
V (BR)DSS
V D
I DM
I D
V DD V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF
V
DD
D.U.T.
AM01471v1
0
Figure 17. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS9584 - Rev 4 page 7/17
4
4.1
STL60N10F7
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
PowerFLAT 5x6 type R package information
Figure 18. PowerFLAT 5x6 type R package outline
DS9584 - Rev 4
A0ER_8231817_Rev20 page 8/17
DS9584 - Rev 4
Dim.
E7
K
L
L1
θ
E2
E3
E4
E5
E6 e
E
D2
D3
D4
D5
D6
A
A1
A2 b
C
D
STL60N10F7
PowerFLAT 5x6 type R package information
5.95
3.50
2.35
0.40
0.08
0.20
0.75
1.275
0.60
0.05
0°
Table 7. PowerFLAT 5x6 type R mechanical data mm
Typ.
Min.
0.80
0.02
0.25
0.30
5.80
5.00
4.15
4.05
4.80
0.25
0.15
6.00
5.20
4.20
5.00
0.40
0.30
1.27
6.15
0.325
0.90
0.15
Max.
1.00
0.05
0.50
6.20
5.40
4.45
4.35
5.20
0.55
0.45
6.35
3.70
2.55
0.60
0.28
0.45
1.05
1.575
0.80
0.25
12° page 9/17
4.2
STL60N10F7
PowerFLAT 5x6 type R SUBCON package information
PowerFLAT 5x6 type R SUBCON package information
Figure 19. PowerFLAT 5x6 type R SUBCON package outline
DS9584 - Rev 4 page 10/17
DS9584 - Rev 4
STL60N10F7
PowerFLAT 5x6 type R SUBCON package information
Dim.
E5
H
K
L
L1
L2
P
θ
D1
D2 e
E
E1
E2
E4
A
A1 b b1 c
D
Table 8. PowerFLAT 5x6 type R SUBCON package mechanical data
Min.
0.90
0.35
0.21
mm
Typ.
0.95
0.02
0.40
0.30
0.25
Max.
1.00
0.45
0.06
0.51
1.10
0.51
0.06
4.80
3.91
1.17
5.90
5.70
3.34
0.15
4.90
4.01
1.27
6.00
5.75
3.44
0.25
0.16
0.61
0.61
0.13
0.34
5.10
5.00
4.11
1.37
6.10
5.80
3.54
0.35
0.26
0.71
1.00
8°
1.10
10°
0.71
0.20
0.10
1.20
12° page 11/17
DS9584 - Rev 4
STL60N10F7
PowerFLAT 5x6 type R SUBCON package information
Figure 20. PowerFLAT 5x6 recommended footprint (dimensions are in mm)
8231817_FOOTPRINT_simp_Rev_20 page 12/17
4.3
STL60N10F7
PowerFLAT 5x6 packing information
PowerFLAT 5x6 packing information
Figure 21. PowerFLAT 5x6 tape (dimensions are in mm)
Pin 1 identification
(I) Measured from centreline of sprocket hole
to centreline of pocket.
(II) Cumulative tolerance of 10 sprocket
holes is ±0.20.
(III) Measured from centreline of sprocket
hole to centreline of pocket
Base and bulk quantity 3000 pcs
All dimensions are in millimeters
8234350_Tape_rev_C
Figure 22. PowerFLAT 5x6 package orientation in carrier tape
DS9584 - Rev 4 page 13/17
Figure 23. PowerFLAT 5x6 reel
STL60N10F7
PowerFLAT 5x6 packing information
DS9584 - Rev 4 page 14/17
STL60N10F7
Revision history
Date
29-Mar-2013
23-May-2013
28-Oct-2013
13-Feb-2020
Revision
1
2
3
4
Table 9. Document revision history
Changes
First release.
– Document status promoted from target data to production data
– Modified: V
GS(th)
values in Table 4
– Modified: title, R
DS(on)
in cover page
– Modified: R
DS(on)
typical and max values in Table 4 , C iss
typical value in table 5
– Added: Q
SS
in Table 5
– Modified: t d(on)
and T r
typical values
– Modified: T rr
, Q rr
and I
RRM
typical values in Table 7
– Added: Section 2.1: Electrical characteristics (curves)
– Updated: Section 4: Package mechanical data
– Minor text changes
Updated
Section 4 Package information
.
Minor text changes.
DS9584 - Rev 4 page 15/17
STL60N10F7
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
PowerFLAT 5x6 type R package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2
PowerFLAT 5x6 type R SUBCON package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.3
PowerFLAT 5x6 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
DS9584 - Rev 4 page 16/17
STL60N10F7
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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© 2020 STMicroelectronics – All rights reserved
DS9584 - Rev 4 page 17/17
