STL100N8F7
Datasheet
N-channel 80 V, 5.2 mΩ typ., 100 A, STripFET F7 Power MOSFET in a
PowerFLAT 5x6 package
G(4)
PowerFLAT 5x6
D(5, 6, 7, 8)
S(1, 2, 3)
8 7 6 5
1 2 3 4
Top View
NG4D5678S123
Features
Order code
STL100N8F7
V
DS
80 V
R
DS(on)
max
6.1 mΩ
• Among the lowest R
DS(on)
on the market
• Excellent FoM (figure of merit)
• Low C rss
/C iss
ratio for EMI immunity
• High avalanche ruggedness
I
D
100 A
P
TOT
120 W
Applications
• Switching applications
Description
This N-channel Power MOSFET utilizes STripFET F7 technology with an enhanced trench gate structure that results in very low on-state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching.
Product status link
STL100N8F7
Product summary
Order code
Marking
Package
Packing
STL100N8F7
100N8F7
PowerFLAT 5x6
Tape and reel
DS10666 - Rev 4 - November 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
STL100N8F7
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
DS
V
GS
I
D
(1)
I
D
(1)
I
DM
(2) (1)
I
D
(3)
I
D
(3)
I
DM
(3) (2)
P
TOT
(1)
P
TOT
(3)
E
AS
(4)
T
J
T stg
Drain-source voltage
Gate-source voltage
Parameter
Drain current (continuous) at T c
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Drain current (continuous) at T
Drain current (continuous) at T
Drain current (pulsed)
Total power dissipation at T
C
Storage temperature range pcb pcb
= 25 °C
= 100 °C
= 25 °C
Total power dissipation at T pcb
Single pulse avalanche energy
= 25 °C
Operating junction temperature range
1. This value is rated according to R thj-c
.
2. Pulse width limited by safe operating area.
3. This value is rated according to R thj-pcb
.
4. Starting T
J
=25 °C, I
D
=25 A, V
DD
=40 V
Table 2. Thermal data
Symbol
R thj-case
R thj-pcb
(1)
Thermal resistance junction-case
Thermal resistance junction-pcb
Parameter
1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 s.
Value
80
±20
100
71
400
20
14
80
120
4.8
220
-55 to 175
Unit
V
V
A
A
A
A
A
A
W
W mJ
°C
°C
Value
1.25
31.3
Unit
°C/W
°C/W
DS10666 - Rev 4 page 2/18
2
STL100N8F7
Electrical characteristics
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 3. On /off states
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Parameter Test conditions
Drain-source breakdown voltage V
GS
= 0, I
D
= 250 µA
V
GS
= 0, V
DS
= 80 V
Zero gate voltage drain current
Gate-body leakage current
V
GS
= 0, V
DS
= 80 V,
T
C
= 125 °C
(1)
V
DS
= 0, V
GS
= ±20 V
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA
Static drain-source on-resistance V
GS
= 10 V, I
D
= 10 A
1. Defined by design, not subject to production test.
Min.
80
Typ.
Max.
1
Unit
V
µA
2.5
5.2
10
±100
4.5
6.1
µA nA
V mΩ
Symbol
C iss
C oss
C rss
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Table 4. Dynamic
V
GS
Test conditions
= 0, V
DS
= 40 V, f = 1 MHz
V
DD
= 40 V, I
D
= 20 A,
V
GS
= 0 to 10 V
(see
Figure 13. Test circuit for gate charge behavior
Min.
-
-
-
-
-
-
Typ.
3435
653
57
46.8
23.4
11.2
Max.
-
-
-
-
-
-
Unit pF pF pF nC nC nC
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 5. Switching times
Test conditions
V
DD
= 40 V, I
D
= 10 A, R
G
= 4.7 Ω,
V
GS
= 10 V
(see
Figure 12. Test circuit for resistive load switching times and
Figure 17. Switching time waveform
Min.
-
-
-
-
Typ.
49
95
60
32
Max.
-
-
-
-
Unit ns ns ns ns
DS10666 - Rev 4 page 3/18
STL100N8F7
Electrical characteristics
Table 6. Source-drain diode
Symbol
V
SD
(1)
t rr
Q rr
I
RRM
Parameter
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Test conditions
V
GS
= 0, I
SD
= 20 A
I
SD
= 20 A, di/dt = 100 A/µs,
V
DD
= 60 V (see Figure 14. Test circuit for inductive load switching and diode recovery times
.
Min.
-
-
-
-
Typ.
Max.
1.2
48.6
58.6
2.4
Unit
V ns nC
A
DS10666 - Rev 4 page 4/18
STL100N8F7
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
I
D
(A)
Figure 1. Safe operating area
GIPG031120151240SOA limited
10 2
10 1
175
10 0
10 -1 10 0 10 1
I
D
(A)
240
V
GS
= 6 VV
GS
=5 VV
GS
=V
GS
=
Figure 3. Output characteristics
GIPG281020150919OCH
V
GS
=10 V
V
GS
=8 V
200
V
GS
=9 V
160
V
GS
=7 V
120
80
V
GS
=6 V
40
V
GS
=5 V
0
0 0.5
1 1.5
2 2.5
3 3.5
V
DS
(V) t p
= 10 µs t p
= 100 µs t p
= 1 ms t p
= 10 ms
V
DS
(V)
Figure 5. Gate charge vs gate-source voltage
V
GS
(V)
12
V
I
D
DD
=40 V
= 20 A
GIPG281020150856QVG
10
8
6
4
2
0
0 20 40 Q g
(nC)
K
Figure 2. Thermal impedance
GIPG281020150856ZTH
10 -1
10 -2
0.05
10 -3
10 -4
10 -5 10 -4 10 -3 10 -2 10 -1 10 0 t p
(s)
I
D
(A)
240
Figure 4. Transfer characteristics
GIPG281020150851TCH
V
DS
= 3 V
200
160
120
80
40
0
2 3 4 5 6 7 8 9 V
GS
(V)
Figure 6. Static drain-source on-resistance
R
DS(on)
(mΩ)
GIPD281020150943RID
V
GS
= 10 V
5.4
5.3
5.2
5.1
5.0
0 4 8 12 16 20 I
D
(A)
DS10666 - Rev 4 page 5/18
STL100N8F7
Electrical characteristics (curves)
C
(pF)
Figure 7. Capacitance variations
GIPG281020150854CVR
10 4
C
ISS
10 3
C
OSS f = 1 MHz
10 2
10 1
10 -1 10 0 10 1
C
RSS
V
DS
(V)
Figure 9. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
2.0
V
GS
= 10 V
I
D
= 10 A
GIPG281020150910RON
1.8
1.6
1.4
1.2
1.0
0.8
0.6
-75 -25 25 75 125 175 T j
(°C)
Figure 8. Normalized gate threshold voltage vs temperature
V
GS(th)
(norm.)
GIPG281020150910VTH
I
D
= 250 µA
1.1
1.0
0.9
0.8
0.7
0.6
-75 -25 25 75 125 175 T j
(°C)
Figure 10. Normalized V
(BR)DSS
vs temperature
V
(BR)DSS
(norm.)
GIPG281020150944BDV
1.05
I
D
= 1 mA
1.03
1.01
0.99
0.97
0.95
-75 -25 25 75 125 175 T j
(°C)
Figure 11. Source-drain diode forward characteristics
V
SD
(V)
1.0
GIPG281020150913SDF
T j
= -55 °C
0.9
0.8
T j
= 25 °C
0.7
T j
= 175 °C
0.6
0.5
0.4
0 4 8 12 16 20 I
SD
(A)
DS10666 - Rev 4 page 6/18
STL100N8F7
Test circuits
3
Test circuits
Figure 12. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 14. Test circuit for inductive load switching and diode recovery times
Figure 13. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
I
G
= CONST
2.7 kΩ
47 kΩ
1 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 15. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 16. Unclamped inductive waveform
V (BR)DSS
V D
I DM
I D
V DD V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF
V
DD
D.U.T.
AM01471v1
0
Figure 17. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS10666 - Rev 4 page 7/18
4
STL100N8F7
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
DS10666 - Rev 4 page 8/18
4.1
STL100N8F7
PowerFLAT 5x6 type C SUBCON package information
PowerFLAT 5x6 type C SUBCON package information
Figure 18. PowerFLAT 5x6 type C SUBCON package outline
DS10666 - Rev 4 page 9/18
DS10666 - Rev 4
STL100N8F7
PowerFLAT 5x6 type C SUBCON package information
Dim.
E5
H
K
L
L1
L2
P
θ
D1
D2 e
E
E1
E2
E4
A
A1 b b1 c
D
Table 7. PowerFLAT 5x6 type C SUBCON package mechanical data
Min.
0.90
0.35
0.21
mm
Typ.
0.95
0.02
0.40
0.30
0.25
Max.
1.00
0.45
0.26
0.51
0.95
0.51
0.06
4.80
4.01
1.17
5.90
5.70
3.54
0.15
4.90
4.21
1.27
6.00
5.75
3.64
0.25
0.36
0.61
0.61
0.13
0.34
5.10
5.00
4.31
1.37
6.10
5.80
3.74
0.35
0.46
0.71
1.00
8°
1.10
10°
0.71
0.20
0.10
1.20
12° page 10/18
4.2
STL100N8F7
PowerFLAT 5x6 type C package information
PowerFLAT 5x6 type C package information
Figure 19. PowerFLAT 5x6 type C package outline
Bottom view
DS10666 - Rev 4
Side view
Top view
8231817_typeC_Rev18 page 11/18
DS10666 - Rev 4
Dim.
E7
K
L
L1
θ
E2
E3
E4
E5
E6 e
E
D2
D3
D4
D5
D6
A
A1
A2 b
C
D
STL100N8F7
PowerFLAT 5x6 type C package information
Table 8. PowerFLAT 5x6 type C package mechanical data mm
Typ.
Min.
0.80
0.02
0.25
0.30
5.80
5.00
4.15
4.05
4.80
0.25
0.15
6.00
5.20
4.20
5.00
0.40
0.30
1.27
6.15
5.95
3.50
2.35
0.40
0.08
0.20
0.75
1.05
0.725
0.05
0°
0.325
0.90
0.15
Max.
1.00
0.05
0.50
6.20
5.40
4.45
4.35
5.20
0.55
0.45
6.35
3.70
2.55
0.60
0.28
0.45
1.05
1.35
1.025
0.25
12° page 12/18
DS10666 - Rev 4
STL100N8F7
PowerFLAT 5x6 type C package information
Figure 20. PowerFLAT 5x6 recommended footprint (dimensions are in mm)
8231817_FOOTPRINT_simp_Rev_18 page 13/18
4.3
STL100N8F7
PowerFLAT 5x6 packing information
PowerFLAT 5x6 packing information
Figure 21. PowerFLAT 5x6 tape (dimensions are in mm)
Pin 1 identification
(I) Measured from centreline of sprocket hole
to centreline of pocket.
(II) Cumulative tolerance of 10 sprocket
holes is ±0.20.
(III) Measured from centreline of sprocket
hole to centreline of pocket
Base and bulk quantity 3000 pcs
All dimensions are in millimeters
8234350_Tape_rev_C
Figure 22. PowerFLAT 5x6 package orientation in carrier tape
DS10666 - Rev 4 page 14/18
Figure 23. PowerFLAT 5x6 reel
STL100N8F7
PowerFLAT 5x6 packing information
DS10666 - Rev 4 page 15/18
STL100N8F7
Revision history
Table 9. Document revision history
Date
21-Oct-2014
Revision
1 Initial release.
03-Nov-2015
03-Dec-2015
27-Nov-2019
2
3
4
Changes
Modified: Table 2: "Absolute maximum ratings" , Table 5: "Dynamic", Table 6: "Switching times" and
Table 7: "Source drain diode".
Added: Section 4.1: "Electrical characteristics (curves)".
Minor text changes
Document status promoted from preliminary to production data.
Added
Section 4.1 PowerFLAT 5x6 type C SUBCON package information
.
Updated Section 4.2 PowerFLAT 5x6 type C package information
.
Minor text changes.
DS10666 - Rev 4 page 16/18
STL100N8F7
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
PowerFLAT 5x6 type C SUBCON package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2
PowerFLAT 5x6 type C package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.3
PowerFLAT™ 5x6 type C packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
DS10666 - Rev 4 page 17/18
STL100N8F7
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2019 STMicroelectronics – All rights reserved
DS10666 - Rev 4 page 18/18
