STD13N60DM2
Datasheet
N-channel 600 V, 0.310 Ω typ., 11 A MDmesh™ DM2
Power MOSFET in a DPAK package
G(1)
TAB
DPAK
1
2 3
D(2, TAB)
S(3)
AM01475V1
Order codes V
DS
R
DS(on)
max.
STD13N60DM2 600 V 0.365 Ω
• Fast-recovery body diode
• Extremely low gate charge and input capacitance
• Low on-resistance
• 100% avalanche tested
• Extremely high dv/dt ruggedness
• Zener-protected
I
D
11 A
Applications
• Switching applications
Description
This high-voltage N-channel Power MOSFET is part of the MDmesh™ DM2 fastrecovery diode series. It offers very low recovery charge (Q rr
) and time (t rr
) combined with low R
DS(on)
, rendering it suitable for the most demanding high-efficiency converters and ideal for bridge topologies and ZVS phase-shift converters.
Product status links
STD13N60DM2
Product summary
Order code
Marking
Package
Packing
STD13N60DM2
13N60DM2
DPAK
Tape and reel
DS11596 - Rev 3 - November 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
STD13N60DM2
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
GS
Gate-source voltage
Parameter
I
D
Drain current (continuous) at T case
= 25 °C
Drain current (continuous) at T case
= 100 °C
I
DM
(1)
P
TOT dv/dt
(2)
Drain current (pulsed)
Total power dissipation at T case
= 25 °C
dv/dt (3)
T stg
T j
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Storage temperature range
Operating junction temperature range
1. Pulse width limited by safe operating area.
2. I
SD
≤ 11 A, di/dt ≤ 900 A/μs; V
DS peak
< V
(BR)DSS
, V
DD
=400 V.
3. V
DS
≤ 480 V.
Table 2. Thermal data
Symbol
R thj-case
R thj-pcb
(1)
Parameter
Thermal resistance junction-case
Thermal resistance junction-pcb
1. When mounted on FR-4 board of inch², 2oz Cu.
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive
(Pulse width limited by T jmax
)
Single pulse avalanche energy
(starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
±25
11
7
44
110
40
50
-55 to 150
Unit
V
A
A
W
V/ns
°C
Value
1.14
50
Unit
°C/W
Value
2.5
340
Unit
A mJ
DS11596 - Rev 3 page 2/16
2
STD13N60DM2
Electrical characteristics
Electrical characteristics
(T case
= 25 °C unless otherwise specified)
Table 4. Static
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown voltage
V
GS
= 0 V, I
Test conditions
D
= 1 mA
V
R
I
DSS
I
GSS
GS(th)
DS(on)
Zero gate voltage drain current
Gate-body leakage current
Gate threshold voltage
Static drain-source onresistance
1. Defined by design, not subject to production test.
V
GS
= 0 V, V
DS
= 600 V
V
GS
= 0 V, V
DS
= 600 V,
T case
= 125 °C (1)
V
DS
V
DS
= 0 V, V
= V
GS
GS
, I
D
= ±25 V
= 250 µA
V
GS
= 10 V, I
D
= 5.5 A
Min.
Typ.
Max.
Unit
600 V
1.5
µA
100
3 4
±10
5
0.310
0.365
µA
V
Ω
Table 5. Dynamic
Symbol
C iss
C oss
C rss
C oss eq.
(1)
R
G
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
V
DS
Test conditions
= 100 V, f = 1 MHz, V
GS
Equivalent output capacitance V
DS
= 0 to 480 V, V
GS
= 0 V
Intrinsic gate resistance f = 1 MHz, I
D
= 0 A
= 0 V
V
DD
= 480 V, I
D
= 11 A, V
GS
= 0 to 10 V
(see Figure 14. Test circuit for gate charge behavior )
Min.
-
-
-
-
-
-
-
-
Typ.
730
38
0.9
70
5.1
19
4.4
9.9
Max.
-
-
-
-
-
-
-
-
Unit pF pF
Ω nC
1. C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS
increases from 0 to 80% V
DSS
.
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 300 V, I
D
= 5.5 A, R
G
= 4.7 Ω,
V
GS
= 10 V (see
Figure 13. Test circuit for resistive load switching times and
Figure 18. Switching time waveform )
Min.
Typ.
Max.
Unit
-
12.3
4.8
-
ns
-
42.5
10.6
-
-
DS11596 - Rev 3 page 3/16
DS11596 - Rev 3
STD13N60DM2
Electrical characteristics
Table 7. Source-drain diode
Symbol
I
SD
I
SDM
(1)
V
SD
(2)
t rr
Q rr
I
RRM t rr
Q rr
I
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
I
V
(see
T
GS
SD
SD j
1. Pulse width is limited by safe operating area.
2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
Test conditions
= 0 V, I
SD
= 11 A
= 11 A, di/dt = 100 A/µs, V
DD
= 11 A, di/dt = 100 A/µs, V
DD
= 60 V,
= 150 °C (see
Figure 15. Test circuit for inductive load switching and diode recovery times )
= 60 V
Figure 15. Test circuit for inductive load switching and diode recovery times
)
-
-
-
-
-
-
Min.
Typ.
Max.
Unit
11 A
-
44
1.6
A
V
90
252
5.6
170
667
8.6
ns nC
A ns nC
A
Symbol
V
(BR)GSO
Table 8. Gate-source Zener diode
Parameter Test conditions
Gate-source breakdown voltage I
GS
= ±250 μA, I
D
= 0 A
Min.
Typ.
Max.
Unit
±30 V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device.
The Zener voltage facilitates efficient and cost-effective device integrity protection,thus eliminating the need for additional external componentry.
page 4/16
STD13N60DM2
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
I
D
(A) Operation in this area is limited by R
DS(on)
GIPG110420160906SOA t p
=1 µs t p
=10 µs
10 1 t p
=100 µs
10 0
10 -1
10 -1 10 0
T
J
T
C
V
GS
≤150 °C
=25 °C
=10 V single pulse
10 1 10 2 t p
=1 ms t p
=10 ms
V
DS
(V)
10
5
0
0
I
D
(A)
25
Figure 3. Output characteristics
GIPG070420161613OCH
V
GS
= 8, 9, 10 V
20
V
GS
= 7 V
15
4 8
V
GS
= 6 V
12
V
GS
= 5 V
16 V
DS
(V)
Figure 5. Gate charge vs gate-source voltage
V
GS
(V)
12
10
V
DS
GIPG070420161614QVG V
DS
(V)
600
V
DD
I
D
= 480 V
= 11 A
500
8
6
4
2
0
0 4 8 12 16 20
400
300
200
100
Q
0 g
(nC)
K
Figure 2. Thermal impedance
GC20460
10 0
10 -1
10 -2
10 -5 10 -4 10 -3 10 -2 10 -1 t p
(s)
15
10
5
0
0
Figure 4. Transfer characteristics
I
D
(A)
25
V
DS
= 20 V
GIPG070420161613TCH
20
2 4 6 8 10 V
GS
(V)
Figure 6. Static drain-source on-resistance
R
DS(on)
(Ω)
GIPG070420161610RID
0.33
V
GS
=10 V
0.32
0.31
0.3
0.29
0 2 4 6 8 10 I
D
(A)
DS11596 - Rev 3 page 5/16
STD13N60DM2
Electrical characteristics (curves)
C
(pF)
Figure 7. Capacitance variations
GIPG070420161612CVR
10 3
C
ISS
10 2
10 1 f = 1 MHz
C
OSS
C
RSS
10 0
10 -1
10 -1 10 0 10 1 10 2
V
DS
(V)
Figure 9. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
2.2
GIPG070420161233RON
V
GS
= 10 V
1.8
1.4
1.0
0.6
0.2
-75 -25 25 75 125 T j
(°C)
Figure 11. Output capacitance stored energy
E
OSS
(µJ)
5
GIPG070420161614EOS
4
3
2
1
0
0 100 200 300 400 500 600 V
DS
(V)
Figure 8. Normalized gate threshold voltage vs temperature
V
GS(th)
(norm.)
1.1
GIPG060420161230VTH
I
D
= 250 µA
1.0
0.9
0.8
0.7
0.6
-75 -25 25 75 125 T j
(°C)
Figure 10. Normalized V
(BR)DSS
vs temperature
V
(BR)DSS
(norm.)
1.08
GIPG060420161354BDV
I
D
= 1 mA
1.04
1.00
0.96
0.92
0.88
-75 -25 25 75 125 T j
(°C)
Figure 12. Source- drain diode forward characteristics
V
SD
(V)
1.1
GIPG070420161612SDF
T j
= -50 °C
1.0
0.9
0.8
0.7
0.6
0.5
0 2 4
T j
= 25 °C
T j
= 150 °C
6 8 10 I
SD
(A)
DS11596 - Rev 3 page 6/16
STD13N60DM2
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
Figure 14. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 16. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
3.3
µF
S
+
1000
µF
V
DD
AM01470v1
Figure 17. Unclamped inductive waveform
V (BR)DSS
V D
I
DM
I D
V DD V DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF
V
DD
D.U.T.
AM01471v1
0
Figure 18. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS11596 - Rev 3 page 7/16
4
STD13N60DM2
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
. ECOPACK ® is an ST trademark.
DS11596 - Rev 3 page 8/16
4.1
STD13N60DM2
DPAK (TO-252) type A2 package information
DPAK (TO-252) type A2 package information
Figure 19. DPAK (TO-252) type A2 package outline
DS11596 - Rev 3
0068772_type-A2_rev25 page 9/16
DS11596 - Rev 3
Dim.
c2
D
D1
E
E1 e e1
A
A1
A2 b b4 c
L2
L4
R
V2
H
L
L1
STD13N60DM2
DPAK (TO-252) type A2 package information
Table 9. DPAK (TO-252) type A2 mechanical data mm
Typ.
9.35
1.00
2.60
0.65
0.60
4.95
6.40
5.10
2.159
4.445
0.64
5.20
0.45
0.48
6.00
Min.
2.20
0.90
0.03
5.10
5.20
2.286
4.572
2.80
0.80
0.20
0°
10.10
1.50
3.00
0.95
1.00
5.25
6.60
5.30
2.413
4.699
0.90
5.40
0.60
0.60
6.20
Max.
2.40
1.10
0.23
8° page 10/16
DS11596 - Rev 3
STD13N60DM2
DPAK (TO-252) type A2 package information
Figure 20. DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_25 page 11/16
4.2
DPAK (TO-252) packing information
Figure 21. DPAK (TO-252) tape outline
T
Top cover tape
10 pitches cumulative tolerance on tape +/- 0.2 mm
P0 D P2
B1
K0
For machine ref. only including draft and radii concentric around B0
B0
A0 P1
User direction of feed
D1
STD13N60DM2
DPAK (TO-252) packing information
F
E
W
User direction of feed
R
Bending radius
AM08852v1
DS11596 - Rev 3 page 12/16
DS11596 - Rev 3
A
D
B
Figure 22. DPAK (TO-252) reel outline
STD13N60DM2
DPAK (TO-252) packing information
T
40mm min. access hole at slot location
C
N
G measured at hub
Full radius
Tape slot in core for tape start
2.5mm min.width
Dim.
E
F
K0
P0
P1
P2
R
T
W
A0
B0
B1
D
D1
AM06038v1
1.5
1.5
1.65
7.4
2.55
3.9
7.9
1.9
40
0.25
15.7
Table 10. DPAK (TO-252) tape and reel mechanical data
Tape Reel mm
Dim.
Min.
6.8
10.4
Max.
7
10.6
12.1
1.6
N
T
D
G
A
B
C
Min.
1.5
12.8
20.2
16.4
50 1.85
7.6
2.75
4.1
8.1
2.1
0.35
16.3
Base qty.
Bulk qty.
mm
Max.
330
13.2
18.4
22.4
2500
2500 page 13/16
Revision history
Date
11-Apr-2016
07-Dec-2016
29-Nov-2018
Revision
1
2
3
Table 11. Document revision history
Changes
First release.
Document status promoted from preliminary to production data.
Modified
Figure 1. Safe operating area .
Minor text changes.
STD13N60DM2
DS11596 - Rev 3 page 14/16
STD13N60DM2
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
DPAK (TO-252) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2
DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
DS11596 - Rev 3 page 15/16
STD13N60DM2
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS11596 - Rev 3 page 16/16
