STD10NF30
Datasheet
Automotive-grade N-channel 300 V, 0.28 Ω typ., 10 A, MESH OVERLAY™
Power MOSFET in a DPAK package
TAB
Features
Order code
STD10NF30
V
DS
300 V
R
DS(on)
max.
0.33 Ω
I
D
10 A
DPAK
1
2 3
D(2, TAB)
• AEC-Q101 qualified
• 100% avalanche tested
• Low capacitance and gate charge
• 175 °C maximum junction temperature
G(1)
S(3)
Applications
• Switching applications
AM01475v1_noZen
Description
This fully clamped MOSFET is produced using ST’s latest advanced Mesh overlay process, which is based on an innovative strip layout. The inherent benefits of the new technology coupled with the extra clamping capabilities make this product particularly suitable for the harshest operation conditions, such as those encountered in the automotive environment. The device is also well-suited for other applications where extra ruggedness is required.
Product status link
STD10NF30
Product summary
Order code STD10NF30
Marking
Package
Packing
10NF30
DPAK
Tape and reel
DS10271 - Rev 2 - July 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
STD10NF30
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
DS
V
GS
Drain-source voltage
Gate-source voltage
Parameter
I
D
I
DM
(1)
P
TOT dv/dt
(2) .
T stg
T j
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
Storage temperature range
Operating junction temperature range
1. Pulse width limited by safe operating area.
2. I
SD
≤ 10 A, di/dt ≤ 200 A/μs, V
DD
= 80% V
(BR)DSS
Table 2. Thermal data
Symbol Parameter
R thj-case
R thj-pcb
(1)
Thermal resistance junction-case
Thermal resistance junction-pcb
1. When mounted on 1 inch² FR-4, 2 Oz copper board.
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or non-repetitive
(pulse width limited by T
Jmax
)
Single pulse avalanche energy
(starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
300
±20
10
6.3
40
103
12
-55 to 175
A
A
A
Unit
V
V
W
V/ns
°C
Value
1.45
50
Unit
°C/W
°C/W
Value
6
175
Unit
A mJ
DS10271 - Rev 2 page 2/16
2
DS10271 - Rev 2
STD10NF30
Electrical characteristics
Electrical characteristics
T
CASE
= 25 °C unless otherwise specified.
Table 4. On/off states
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown voltage
V
GS
= 0 V, I
Test conditions
D
= 1 mA
V
R
I
DSS
I
GSS
GS(th)
DS(on)
Zero gate voltage drain current
Gate body leakage current
Gate threshold voltage
Static drain-source on-resistance
1. Defined by design, not subject to production test.
V
GS
= 0 V, V
DS
= 300 V
V
GS
= 0 V, V
DS
= 300 V,
T
C
= 125 °C (1)
V
DS
V
DD
= 0 V, V
= V
GS
GS
, I
D
= ±20 V
= 250 µA
V
GS
= 10 V, I
D
= 5 A
Symbol
C iss
C oss
C rss
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Table 5. Dynamic
Test conditions
V
DS
= 25 V, f = 1 MHz,
V
GS
= 0 V
V
DD
= 240 V, I
D
= 10 A
V
GS
= 0 to 10 V
(see Figure 13. Test circuit for gate charge behavior )
Min.
Typ.
Max.
Unit
300 V
1 µA
10 µA
2 3
±100
4
0.28
0.33
nA
V
Ω
Min.
Typ.
Max.
Unit
780 pF
-
110
15
-
pF pF
-
23
3.5
-
nC nC
11.3
nC
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 150 V, I
D
= 5 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 12. Test circuit for resistive load switching times
and
Figure
17. Switching time waveform
)
Symbol
I
SD
I
SDM
(1)
V
SD
(2)
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Table 7. Source-drain diode
Test conditions
I
SD
= 10 A, V
GS
= 0 V
Min.
Typ.
Max.
Unit
-
13.5
9.5
-
ns ns
-
32
9.5
-
ns ns
Min.
Typ.
Max.
Unit
10 A
-
40
1.5
A
V page 3/16
STD10NF30
Electrical characteristics
Symbol
I
I
Q rr
RRM t t rr
Q rr rr
RRM
Parameter
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Test conditions
I
SD
= 10 A, di/dt = 100 A/µs,
V
DD
= 60 V
(see Figure 14. Test circuit for inductive load switching and diode recovery times
)
I
SD
= 10 A, di/dt = 100 A/µs,
V
DD
= 60 V, T
J
= 150 °C
(see Figure 14. Test circuit for inductive load switching and diode recovery times
)
Min.
Typ.
Max.
Unit
145 ns
0.76
μC
-
-
-
10.3
174
1.08
12.5
A ns
μC
A
DS10271 - Rev 2 page 4/16
STD10NF30
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
I D
(A)
10 2
AM18166v1
10 1
10 0
Operation
Limited
in
this area is
by
max
R
DS(on)
10 -1
10 -1 10 0
10µs
100µs
10 1
Tj=175 °C
Tc=25 °C
Single pulse
10 2 V
DS
(V)
1ms
10ms
15
10
5
0
0
Figure 3. Output characteristics
I D (A)
V GS =10V
AM06477v3
25
6V
20
7V
4 8 12
5V
16
4V
V
DS
(V)
Figure 5. Static drain-source on-resistance
AM15981v3
R DS(on)
( Ω )
V
GS
=10V
0.42
0.38
0.34
0.3
0.26
2 6 10 14 18 I
D
(A)
Figure 2. Thermal impedance
10
5
0
0
Figure 4. Transfer characteristics
AM06478v3
I D
(A)
25
V DS =15V
20
15
3 4 5 6 7 V
GS
(V)
Figure 6. Gate charge vs gate-source voltage
6
4
2
0
0
V
GS
(V)
10 V DS
8
5
V
DD
I D
=240V
=10A
AM06479v3 V DS
(V)
250
200
150
10 15 20
100
25
50
0
Q g
(nC)
DS10271 - Rev 2 page 5/16
STD10NF30
Electrical characteristics (curves)
Figure 7. Capacitance variations
AM06481v3
C
(pF)
1000
Ciss
100
10
1
0.1
1 10
Coss
Crss
100 V DS (V)
Figure 8. Normalized gate threshold voltage vs temperature
V GS(th)
(norm)
AM06483v3
I D =250µA
1.1
1.0
0.9
0.8
0.7
0.6
-75 -25 25 75 125 T J (°C)
Figure 9. Normalized on-resistance vs temperature
AM06484v3
R DS(on)
(norm)
2.75
I D =5A
V GS =10V
2.25
1.75
1.25
0.75
0.25
-75 -25 25 75 125 T
J
(°C)
Figure 10. Normalized V
(BR)DSS
vs temperature
AM15982v3
V (BR)DSS
(norm)
I D =1mA
1.1
1.05
1
0.95
0.9
-75 -25 25 75 125 T
J
(°C)
Figure 11. Source-drain diode forward characteristics
AM15720v3
V
SD
(V)
T
J
=-50°C
1
0.9
T J =25°C
0.8
0.7
T J =175°C
0.6
0.5
2 6 10 14 18 I
SD
(A)
DS10271 - Rev 2 page 6/16
STD10NF30
Test circuits
3
Test circuits
Figure 12. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 14. Test circuit for inductive load switching and diode recovery times
Figure 13. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 15. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
3.3
µF
S
+
1000
µF
V
DD
AM01470v1
Figure 16. Unclamped inductive waveform
V (BR)DSS
V D
I
DM
I D
V DD V DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF
V
DD
D.U.T.
AM01471v1
0
Figure 17. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS10271 - Rev 2 page 7/16
4
STD10NF30
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
. ECOPACK ® is an ST trademark.
DS10271 - Rev 2 page 8/16
4.1
STD10NF30
DPAK (TO-252) type A2 package information
DPAK (TO-252) type A2 package information
Figure 18. DPAK (TO-252) type A2 package outline
DS10271 - Rev 2
0068772_type-A2_rev25 page 9/16
DS10271 - Rev 2
Dim.
c2
D
D1
E
E1 e e1
A
A1
A2 b b4 c
L2
L4
R
V2
H
L
L1
STD10NF30
DPAK (TO-252) type A2 package information
Table 8. DPAK (TO-252) type A2 mechanical data mm
Typ.
9.35
1.00
2.60
0.65
0.60
4.95
6.40
5.10
2.159
4.445
0.64
5.20
0.45
0.48
6.00
Min.
2.20
0.90
0.03
5.10
5.20
2.286
4.572
2.80
0.80
0.20
0°
10.10
1.50
3.00
0.95
1.00
5.25
6.60
5.30
2.413
4.699
0.90
5.40
0.60
0.60
6.20
Max.
2.40
1.10
0.23
8° page 10/16
STD10NF30
DPAK (TO-252) type A2 package information
Figure 19. DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_25
DS10271 - Rev 2 page 11/16
4.2
DPAK (TO-252) packing information
Figure 20. DPAK (TO-252) tape outline
T
Top cover tape
10 pitches cumulative tolerance on tape +/- 0.2 mm
P0 D P2
B1
K0
For machine ref. only including draft and radii concentric around B0
B0
A0 P1
User direction of feed
D1
STD10NF30
DPAK (TO-252) packing information
F
E
W
User direction of feed
R
Bending radius
AM08852v1
DS10271 - Rev 2 page 12/16
DS10271 - Rev 2
Dim.
D1
E
F
K0
P0
A0
B0
B1
D
P1
P2
R
T
W
A
D
B
Figure 21. DPAK (TO-252) reel outline
STD10NF30
DPAK (TO-252) packing information
T
40mm min. access hole at slot location
C
N
G measured at hub
Full radius
Tape slot in core for tape start
2.5mm min.width
AM06038v1
2.55
3.9
7.9
1.9
40
0.25
15.7
1.5
1.5
1.65
7.4
Table 9. DPAK (TO-252) tape and reel mechanical data
Tape Reel mm
Dim.
Min.
6.8
10.4
Max.
7
10.6
12.1
1.6
C
D
A
B
G
N
T
Min.
1.5
12.8
20.2
16.4
50 1.85
7.6
2.75
4.1
8.1
2.1
0.35
16.3
Base qty.
Bulk qty.
mm
Max.
330
13.2
18.4
22.4
2500
2500 page 13/16
STD10NF30
Revision history
Date
27-Mar-2014
02-Jul-2018
Version
1
2
Table 10. Document revision history
Changes
Initial release.
Removed maturity status indication from cover page. The document status is production data.
Updated
Section 4.1 DPAK (TO-252) type A2 package information
.
Minor text changes.
DS10271 - Rev 2 page 14/16
STD10NF30
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
DPAK (TO-252) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2
DPAK (TO-252) packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
DS10271 - Rev 2 page 15/16
STD10NF30
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS10271 - Rev 2 page 16/16
