STMicroelectronics STP46N60M6 Datasheet
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STP46N60M6
Datasheet
N-channel 600 V, 68 mΩ typ., 36 A, MDmesh M6
Power MOSFET in a TO
‑
220 package
TAB
G(1)
TO-220
1
2
3
D(2, TAB)
S(3)
AM01475V1
Features
Order code
STP46N60M6
V
DS
600 V
• Reduced switching losses
• Lower R
DS(on)
per area vs previous generation
• Low gate input resistance
• 100% avalanche tested
• Zener-protected
R
DS(on)
max.
80 mΩ
I
D
36 A
Applications
• Switching applications
• LLC converters
• Boost PFC converters
Description
The new MDmesh M6 technology incorporates the most recent advancements to the well-known and consolidated MDmesh family of SJ MOSFETs. STMicroelectronics builds on the previous generation of MDmesh devices through its new M6 technology, which combines excellent R
DS(on)
per area improvement with one of the most effective switching behaviors available, as well as a user-friendly experience for maximum end-application efficiency.
Product status link
STP46N60M6
Product summary
Order code
Marking
Package
Packing
STP46N60M6
46N60M6
TO-220
Tube
DS12394 - Rev 3 - November 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
STP46N60M6
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
I
GS
D
Parameter
Gate-source voltage
Drain current (continuous) at T case
= 25 °C
Drain current (continuous) at T case
= 100 °C
I
D
P
TOT dv/dt
T stg
T j
Drain current (pulsed)
Total power dissipation at T case
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Storage temperature range
Operating junction temperature range
1. Pulse width limited by safe operating area.
2. I
SD
≤ 36 A, di/dt ≤ 400 A/μs, V
DS(peak)
< V
(BR)DSS
, V
DD
= 400 V
3. V
DS
≤ 480 V
Symbol
R thj-case
R thj-amb
Table 2. Thermal data
Parameter
Thermal resistance junction-case
Thermal resistance junction-ambient
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or non-repetitive
(pulse width limited by T
Jmax
)
Single pulse avalanche energy
(starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
±25
36
23
126
250
15
100
-55 to 150
Unit
V
A
A
W
V/ns
°C
Value
0.5
62.5
Unit
°C/W
°C/W
Value
5.2
760
Unit
A mJ
DS12394 - Rev 3 page 2/13
2
STP46N60M6
Electrical characteristics
Electrical characteristics
(T case
= 25 °C unless otherwise specified)
Table 4. On/off states
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Parameter Test conditions
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, V
DS
= 600 V
Zero gate voltage drain current
Gate-body leakage current
V
GS
= 0 V, V
DS
= 600 V,
T case
V
DS
= 0 V, V
GS
= ±25 V
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA
Static drain-source on-resistance V
GS
= 10 V, I
D
= 18 A
1. Defined by design, not subject to production test.
Min.
600
3.25
Typ.
Max.
Unit
V
1
µA
100
4
68
±5
4.75
80
µA
V mΩ
Table 5. Dynamic
Symbol
C iss
C oss
C rss
C oss eq.
R
G
Q g
Q
Q gs gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Equivalent output capacitance
Intrinsic gate resistance
Total gate charge
Gate-source charge
Gate-drain charge
V
DS
Test conditions
= 100 V, f = 1 MHz, V
GS
= 0 V
V
DS
= 0 to 480 V, V
GS
= 0 V f = 1 MHz, I
D
= 0 A
V
DD
= 480 V, I
D
= 36 A,
V
GS
= 0 to 10 V
(see
Figure 14. Test circuit for gate charge behavior
)
Min.
-
-
-
-
-
-
-
-
Typ.
2340
147
3.7
339
1.6
53.5
15.5
23.5
Max.
-
-
-
-
-
-
-
-
Unit pF pF
Ω nC
1. C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss to 80% V
DSS
.
when V
DS
increases from 0
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 300 V, I
D
= 18 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see
Figure 13. Test circuit for resistive load switching times and
Figure 18. Switching time waveform
)
Min.
-
-
-
-
Typ.
20
15.5
48.4
8.5
Max.
-
-
-
-
Unit ns
DS12394 - Rev 3 page 3/13
STP46N60M6
Electrical characteristics
Symbol
I
SD
I
SDM
V
SD
t rr
Q rr
I
RRM t rr
Q rr
I
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Table 7. Source-drain diode
Test conditions
I
SD
= 36 A, V
GS
= 0 V
I
SD
= 36 A, di/dt = 100 A/µs,
V
DD
= 60 V
(see
Figure 15. Test circuit for inductive load switching and diode recovery times
)
I
SD
= 36 A, di/dt = 100 A/µs,
V
DD
= 60 V, T j
= 150 °C
(see
Figure 15. Test circuit for inductive load switching and diode recovery times
)
1. Pulse width is limited by safe operating area.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
-
-
-
Min.
-
-
-
-
-
20.8
440
5.8
26.4
Typ.
Max.
36
126
1.6
267
2.8
Unit
A
A
V ns
µC
A ns
µC
A
DS12394 - Rev 3 page 4/13
STP46N60M6
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
I
D
(A)
Figure 1. Safe operating area
GADG211120191204SOA
I
DM
10 2
10 1
10 0
by
Operation is limited
R
DS(on)
max.
t p
=1µs t p
=10µs t p
=100µs t p
=1ms t p
=10ms
10 -1
10 -1
Single pulse, TC =25°C
TJ ≤150°C, VGS =10V
10 0 10 1
V
(BR)DSS
10 2
V
DS
(V)
80
60
40
20
0
0
Figure 3. Typical output characteristics
I
D
(A)
120
GADG280120191024OCH
V
GS
= 9, 10 V
100 V
GS
= 8 V
3 6 9
V
GS
= 7 V
12 15 18
V
GS
= 6 V
V
DS
(V)
Figure 5. Typical gate charge characteristics
V
DS
(V)
600
500
400
Q gs
I
V
DD
D
= 480 V
= 36 A
Q g
V
DS
GADG280120191025QVG V
GS
(V)
12
10
Q gd
8
300
200
100
0
0
6
4
10 20 30 40 50 60
2
Q
0 g
(nC)
Figure 2. Maximum transient thermal impedance
Zthj-c
(°C/W)
GADG211120191320ZTH
0.4
0.3
duty = 0.5
10 -1
0.2
0.1
0.5
10 -2
Single pulse RthJ-C = 0.5°C/W
10 -3
10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 t p
(s)
80
60
40
20
0
4
Figure 4. Typical transfer characteristics
I
D
(A)
120
V
DS
= 16 V
GADG280120191025TCH
100
5 6 7 8 9 V
GS
(V)
Figure 6. Typical drain-source on-resistance
R
DS(on)
(mΩ)
74
V
GS
=10 V
GADG280120191022RID
72
70
68
66
64
62
0 6 12 18 24 30 36 I
D
(A)
DS12394 - Rev 3 page 5/13
STP46N60M6
Electrical characteristics (curves)
Figure 7. Typical capacitance characteristics
C
(pF)
GADG280120191024CVR
10 4
C
ISS
10 3
10 2
10 1
10 0
10 -1 f = 1 MHz
10 0 10 1 10 2
C
OSS
C
RSS
V
DS
(V)
Figure 8. Normalized gate threshold vs temperature
V
GS(th)
(norm.)
1.1
1.0
0.9
0.8
0.7
0.6
-75 -25
I
D
= 250 µA
25
GADG191220180856VTH
75 125 T j
(°C)
Figure 9. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
2.5
GADG191220180856RON
2.0
1.5
1.0
0.5
0.0
-75 -25
V
GS
= 10 V
25 75 125 T j
(°C)
Figure 10. Normalized breakdown voltage vs temperature
V
(BR)DSS
(norm.)
1.10
GADG191220180856BDV
I
D
= 1 mA 1.05
1.00
0.95
0.90
0.85
-75 -25 25 75 125 T j
(°C)
Figure 11. Typical output capacitance stored energy
E
OSS
(µJ)
18
GIPD280120191305EOS
9
6
15
12
3
0
0 100 200 300 400 500 600 V
DS
(V)
Figure 12. Typical reverse diode forward characteristics
0.8
0.7
0.6
0.5
0
V
SD
(V)
1.1
1.0
0.9
T
T
GADG280120191023SDF j j
= -50 °C
T j
= 25 °C
= 150 °C
6 12 18 24 30 36 I
SD
(A)
DS12394 - Rev 3 page 6/13
STP46N60M6
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF V
DD
D.U.T.
Figure 14. Test circuit for gate charge behavior
V
DD
RL
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
100 Ω D.U.T.
V
G
AM01469v10
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
Figure 16. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
A A fast diode
B
B
G
+
_
R
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 17. Unclamped inductive waveform
V
(BR)DSS
V
D
I
DM
I
D
V
DD
V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF V
DD
D.U.T.
AM01471v1
0
Figure 18. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS12394 - Rev 3 page 7/13
4
STP46N60M6
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
DS12394 - Rev 3 page 8/13
4.1
TO-220 package information
Figure 19. TO-220 type A package outline
STP46N60M6
TO-220 type A package information
DS12394 - Rev 3
0015988_typeA_Rev_22 page 9/13
DS12394 - Rev 3
Dim.
E e e1
F
H1
J1
L b1 c
A b
D
D1
L1
L20
L30
øP
Q
STP46N60M6
TO-220 type A package information
Table 8. TO-220 type A package mechanical data mm
Typ.
Min.
4.40
0.61
1.14
0.48
15.25
1.27
10.00
2.40
4.95
1.23
6.20
2.40
13.00
3.50
16.40
28.90
3.75
2.65
3.85
2.95
10.40
2.70
5.15
1.32
6.60
2.72
14.00
3.93
Max.
4.60
0.88
1.55
0.70
15.75
page 10/13
STP46N60M6
Revision history
Date
10-Jan-2018
01-Feb-2019
22-Nov-2019
2
3
Table 9. Document revision history
Version
1
Changes
Initial release.
Modified Table 1. Absolute maximum ratings, Table 2. Thermal data,
Table 3. Avalanche characteristics, Table 4. On/off states, Table 5. Dynamic,
Table 6. Switching times and Table 7. Source-drain diode.
Modified Figure 14. Test circuit for gate charge behavior.
Minor text changes.
Updated Table 3. Avalanche characteristics ,
and
2.1 Electrical characteristics (curves) .
Minor text changes.
DS12394 - Rev 3 page 11/13
STP46N60M6
Contents
Contents
DS12394 - Rev 3 page 12/13
STP46N60M6
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2019 STMicroelectronics – All rights reserved
DS12394 - Rev 3 page 13/13
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