STW40N60M2-4
Datasheet
N-channel 600 V, 78 mΩ typ., 34 A MDmesh M2 Power MOSFET
in a TO247-4 package
Features
1
2
4
3
TO247-4
Drain(1, TAB)
Order code
VDS
RDS(on) max.
ID
STW40N60M2-4
600 V
88 mΩ
34 A
•
•
•
Excellent switching performance thanks to the extra driving source pin
Extremely low gate charge
Excellent output capacitance (COSS) profile
•
•
100% avalanche tested
Zener-protected
Applications
•
•
Gate(4)
Driver
source (3)
Power
source (2)
Switching applications
LLC resonant converters
Description
AM10177v2Z
This device is an N-channel Power MOSFET developed using MDmesh M2
technology. Thanks to its strip layout and an improved vertical structure, the device
exhibits low on-resistance and optimized switching characteristics, rendering it
suitable for the most demanding high efficiency converters.
Product status link
STW40N60M2-4
Product summary
Order code
STW40N60M2-4
Marking
40N60M2
Package
TO247-4
Packing
Tube
DS13603 - Rev 1 - December 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
STW40N60M2-4
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
Value
Unit
Gate-source voltage
±25
V
Drain current (continuous) at TC = 25 °C
34
Drain current (continuous) at TC = 100 °C
22
IDM(1)
Drain current (pulsed)
136
A
PTOT
Total power dissipation at TC = 25 °C
250
W
dv/dt(2)
Peak diode recovery voltage slope
15
V/ns
dv/dt(3)
MOSFET dv/dt ruggedness
50
V/ns
Tstg
Storage temperature range
VGS
ID
TJ
Parameter
Operating junction temperature range
-55 to 150
A
°C
°C
1. Pulse width limited by safe operating area.
2. ISD < 34 A, di/dt < 400 A/μs, VDS (peak) < V (BR)DSS, VDD = 400 V.
3. VDS = 480 V.
Table 2. Thermal data
Symbol
Parameter
Value
Unit
RthJC
Thermal resistance, junction-to-case
0.5
°C/W
RthJA
Thermal resistance, junction-to-ambient
50
°C/W
Value
Unit
6
A
500
mJ
Table 3. Avalanche characteristics
Symbol
DS13603 - Rev 1
Parameter
IAR
Avalanche current, repetitive or not repetitive (pulse width limited by TJ max)
EAS
Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR, VDD = 50 V)
page 2/12
STW40N60M2-4
Electrical characteristics
2
Electrical characteristics
TC = 25 °C unless otherwise specified
Table 4. On/off states
Symbol
V(BR)DSS
Parameter
Test conditions
Drain-source breakdown voltage
Min.
VGS = 0 V, ID = 1 mA
Typ.
600
Zero gate voltage drain current
IGSS
Gate-body leakage current
VDS = 0 V, VGS = ±25 V
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static drain-source on-resistance
VGS = 10 V, ID = 17 A
VGS = 0 V, VDS = 600 V, TC = 125
Unit
V
VGS = 0 V, VDS = 600 V
IDSS
Max.
1
µA
100
µA
±10
µA
3
4
V
78
88
mΩ
Min.
Typ.
Max.
Unit
-
2500
-
pF
-
117
-
pF
-
2.4
-
pF
°C(1)
2
1. Defined by design, not subject to production test.
Table 5. Dynamic
Symbol
Parameter
Test conditions
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer capacitance
Coss eq.(1)
Equivalent output capacitance
VDS = 0 to 480 V, VGS = 0 V
-
342
-
pF
RG
Intrinsic gate resistance
f = 1 MHz, ID = 0 A
-
4.4
-
Ω
Qg
Total gate charge
-
57
-
nC
Qgs
Gate-source charge
-
10
-
nC
Qgd
Gate-drain charge
-
25.5
-
nC
VDS= 100 V, f = 1 MHz, VGS = 0 V
VDD = 480 V, ID = 34 A, VGS = 0 to 10 V
(see Figure 14. Test circuit for gate
charge behavior)
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0
to 80% VDSS.
Table 6. Switching times
Symbol
td(on)
tr
td(off)
tf
DS13603 - Rev 1
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Turn-on delay time
VDD = 300 V, ID = 17 A,
-
16
-
ns
Rise time
RG = 4.7 Ω, VGS = 10 V
-
7
-
ns
Turn-off delay time
(see Figure 13. Test circuit for
resistive load switching times and
Figure 18. Switching time waveform)
-
81
-
ns
-
9
-
ns
Fall time
page 3/12
STW40N60M2-4
Electrical characteristics
Table 7. Source-drain diode
Symbol
ISD
ISDM
(1)
VSD (2)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Source-drain current
-
34
A
Source-drain current (pulsed)
-
136
A
1.6
V
Forward on voltage
VGS = 0 V, ISD = 34 A
-
trr
Reverse recovery time
ISD = 34 A, di/dt = 100 A/µs,
-
440
ns
Qrr
Reverse recovery charge
-
8.2
µC
IRRM
Reverse recovery current
VDD = 60 V
(see Figure 15. Test circuit for inductive
load switching and diode recovery times)
-
37
A
trr
Reverse recovery time
ISD = 34 A, di/dt = 100 A/µs,
-
568
ns
Qrr
Reverse recovery charge
VDD = 60 V, TJ = 150 °C
-
11.5
µC
IRRM
Reverse recovery current
(see Figure 15. Test circuit for inductive
load switching and diode recovery times)
-
40.5
A
1. Pulse width is limited by safe operating area.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
DS13603 - Rev 1
page 4/12
STW40N60M2-4
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 2. Thermal impedance
Figure 1. Safe operating area
ID
(A)
GC18460
AM16099v1
10 2
ea
ar
is n)
th DS(o
in R
n y
tio d b
a
r te
pe i
O s lim
i
10 1
10µs
100µs
1ms
10ms
10 0
TJ = 150 °C
TC = 25 °C
Single pulse
10 -1
10 -1
10 0
10 1
VDS (V)
10 2
Figure 3. Output characteristics
Figure 4. Transfer characteristics
AM16101v1
ID
(A)
VDS=18V
80
70
60
50
40
30
20
10
0
0
Figure 5. Gate charge vs gate-source voltage
VGS
(V)
AM16102v1
12
VDD=480V
ID=34A
VDS
VDS
(V)
2
4
6
8
VGS(V)
10
Figure 6. Static drain-source on-resistance
AM16103v1
RDS(on)
mΩ
VGS
500
10
400
8
300
6
200
4
100
2
0
DS13603 - Rev 1
0
10
20
30
40
50
60
0
Qg(nC)
D
page 5/12
STW40N60M2-4
Electrical characteristics (curves)
Figure 8. Output capacitance stored energy
Figure 7. Capacitance variations
Eoss
(µJ)
AM16104v1
C
(pF)
10000
AM16105v1
15
Ciss
1000
10
100
Coss
5
10
Crss
1
0.1
1
10
100
VDS(V)
Figure 9. Normalized gate thereshold voltage vs
temperature
AM15718v1
VGS(th)
(norm)
0
0
100 200 300
400
500 600
VDS(V)
Figure 10. Normalized on-resistance vs temperature
AM15719v1
RDS(on)
(norm)
ID=17 A
1.1
2.1
ID=250µA
1.0
1.7
0.9
1.3
0.8
0.9
0.7
0.6
-50
50
0
100
TJ(°C)
Figure 11. Normalized V(BR)DSS vs temperature
AM15714v1
V(BR)DSS
(norm)
D
0.5
-50
100
50
0
TJ(°C)
Figure 12. Source-drain diode forward characteristics
GIPD240920132025FSR
VSD
(V)
TJ= -50°C
1.0
0.9
TJ= 25°C
0.8
0.7
TJ= 150°C
0.6
0.90
-50
DS13603 - Rev 1
TJ(°C)
0.5
0
6
12
18
24
30
ISD(A)
page 6/12
STW40N60M2-4
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
Figure 14. Test circuit for gate charge behavior
VDD
12 V
2200
+ μF
3.3
μF
VDD
VD
VGS
1 kΩ
100 nF
RL
IG= CONST
VGS
RG
47 kΩ
+
pulse width
D.U.T.
2.7 kΩ
2200
μF
pulse width
D.U.T.
100 Ω
VG
47 kΩ
1 kΩ
AM01469v1
AM01468v1
Figure 15. Test circuit for inductive load switching and
diode recovery times
D
G
A
D.U.T.
S
25 Ω
A
L
A
VD
100 µH
fast
diode
B
B
B
3.3
µF
D
G
+
Figure 16. Unclamped inductive load test circuit
RG
1000
+ µF
2200
+ µF
VDD
3.3
µF
VDD
ID
D.U.T.
S
D.U.T.
Vi
_
pulse width
AM01471v1
AM01470v1
Figure 18. Switching time waveform
Figure 17. Unclamped inductive waveform
ton
V(BR)DSS
td(on)
toff
td(off)
tr
tf
VD
90%
90%
IDM
VDD
10%
0
ID
VDD
VGS
AM01472v1
0
VDS
10%
90%
10%
AM01473v1
DS13603 - Rev 1
page 7/12
STW40N60M2-4
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
4.1
TO247-4 package information
Figure 19. TO247-4 package outline
8405626_2
DS13603 - Rev 1
page 8/12
STW40N60M2-4
TO247-4 package information
Table 8. TO247-4 mechanical data
Dim.
mm
Min.
Typ.
Max.
A
4.90
5.00
5.10
A1
2.31
2.41
2.51
A2
1.90
2.00
2.10
b
1.16
b1
1.15
b2
0
0.20
c
0.59
0.66
c1
0.58
0.60
0.62
D
20.90
21.00
21.10
D1
16.25
16.55
16.85
D2
1.05
1.20
1.35
D3
24.97
25.12
25.27
E
15.70
15.80
15.90
E1
13.10
13.30
13.50
E2
4.90
5.00
5.10
E3
2.40
2.50
2.60
e
2.44
2.54
2.64
e1
4.98
5.08
5.18
L
19.80
19.92
20.10
P
3.50
3.60
3.70
1.29
1.20
P1
7.40
P2
2.40
Q
5.60
S
DS13603 - Rev 1
1.25
2.50
2.60
6.00
6.15
T
9.80
10.20
U
6.00
6.40
page 9/12
STW40N60M2-4
Revision history
Table 9. Document revision history
DS13603 - Rev 1
Date
Version
10-Dec-2020
1
Changes
First release.
page 10/12
STW40N60M2-4
Contents
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
TO247-4 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
DS13603 - Rev 1
page 11/12
STW40N60M2-4
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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2020 STMicroelectronics – All rights reserved
DS13603 - Rev 1
page 12/12
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