STD6N62K3
Datasheet
N-channel 620 V, 0.95 Ω typ., 5.5 A MDmesh™ K3
Power MOSFET in DPAK package
TAB
DPAK
1
2 3
D(2, TAB)
G(1)
S(3)
AM01475V1
Features
Order codes
STD6N62K3
V
DS
620 V
R
DS(on) max.
1.2 Ω
• 100% avalanche tested
• Extremely high dv/dt capability
• Very low intrinsic capacitance
• Improved diode reverse recovery characteristics
• Zener-protected
I
D
5.5 A
P
TOT
90 W
Applications
• Switching applications
Description
This MDmesh™ K3 Power MOSFET is the result of improvements applied to
STMicroelectronics’ MDmesh™ technology, combined with a new optimized vertical structure. This device boasts an extremely low on-resistance, superior dynamic performance and high avalanche capability, rendering it suitable for the most demanding applications.
Product status
STD6N62K3
Product summary
Order code STD6N62K3
Marking
Package
Packing
6N62K3
DPAK
Tape and reel
DS8813 - Rev 2 - April 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
STD6N62K3
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol Parameter
V
DS
V
GS
I
D
I
D
I
DM
(1)
P
TOT
I
AR
(2)
E
AS
(3)
ESD
Drain-source voltage
Gate- source voltage
Drain current (continuous) at T
C
Drain current (continuous) at T
C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
= 25 °C
= 100 °C
Avalanche current, repetitive or not-repetitive
Single pulse avalanche energy dv/dt
(4)
T stg
T j
Gate-source human body model (R = 1.5 kΩ, C = 100 pF)
Peak diode recovery voltage slope
Storage temperature range
Operating junction temperature range
1. Pulse width limited by safe operating area.
2. Pulse width limited by Tj max.
3. Starting Tj = 25 °C, I
D
= I
AR
, V
DD
= 50 V.
4. I
SD
≤ 5.5 A, di/dt ≤ 400 A/µs, V
DD
= 80% V
(BR)DSS.
Table 2. Thermal data
Symbol
R thj-case
R thj-pcb
(1)
Thermal resistance junction-case
Thermal resistance junction-pcb
1. When mounted on 1inch² FR-4 board, 2 oz Cu.
Parameter
22
90
5.5
140
2.5
12
Value
620
± 30
5.5
3
-55 to 150
A
W
A mJ kV
V/ns
Unit
V
V
A
A
°C
Value
1.39
50
Unit
°C/W
°C/W
DS8813 - Rev 2 page 2/19
2
STD6N62K3
Electrical characteristics
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 3. On /off states
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown voltage
I
D
Test conditions
= 1 mA, V
GS
= 0 V
I
I
DSS
GSS
Zero gate voltage drain current
Gate body leakage current
V
GS
= 0 V, V
DS
= 620 V
V
GS
= 0 V, V
DS
= 620 V
T
C
= 125 °C (1)
V
GS
= ±20 V,
V
DS
= 0 V
V
DS
= V
GS
, I
D
= 50 µA V
R
GS(th)
DS(on)
Gate threshold voltage
Static drain-source on resistance
V
GS
1. Defined by design, not subject to production test.
= 10 V, I
D
= 2.8 A
Min.
620
3
Typ.
3.75
0.95
Max.
0.8
50
± 9
4.5
1.2
Table 4. Dynamic
Symbol
C
C
C iss
C oss
C rss o(er) o(tr)
R
G
Q g
Q gs
Q gd
(1)
(2)
Parameter Test conditions
Input capacitance
Output capacitance
V
DS
= 50 V, f = 1 MHz,
V
GS
= 0 V
Reverse transfer capacitance
Equivalent output capacitance energy related
Equivalent output capacitance time related
V
GS
= 0 V,
V
DS
= 0 to 480 V
Intrinsic gate resistance
Total gate charge
Gate-source charge
Gate-drain charge f = 1 MHz open drain
V
DD
= 496 V, I
D
= 5.5 A,
V
GS
= 0 to 10 V
(see Figure 15. Test circuit for gate charge behavior
)
Min.
-
-
-
-
Typ.
875
100
17
28
63
3.5
34
4
22
Max.
-
-
-
-
Unit pF pF
Ω nC
1. C o(er)
is a constant capacitance value that gives the same stored energy as C oss
while V
DS
is rising from 0 to 80% V
DSS
.
2. C o(tr)
is a constant capacitance value that gives the same charging time as C oss
while V
DS
is rising from 0 to 80% V
DSS
.
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 5. Switching times
Test conditions
V
DD
= 310 V, I
D
= 2.75 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 14. Test circuit for resistive load switching times
and
Figure 19. Switching time waveform )
Min.
-
Typ.
22
12
49
20
Max.
-
Unit ns
Unit
V
µA
µA
µA
V
Ω
DS8813 - Rev 2 page 3/19
DS8813 - Rev 2
STD6N62K3
Electrical characteristics
Table 6. Source drain diode
Symbol
I
SD
I
SDM
(1)
V
SD
I
I t
Q
RRM t
Q rr rr rr rr
(2)
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Test conditions
I
SD
= 5.5 A, V
GS
= 0 V
I
SD
= 5.5 A, di/dt = 100 A/µs
V
DD
= 60 V (see
Figure
16. Test circuit for inductive load switching and diode recovery times )
I
SD
= 5.5 A, di/dt = 100 A/µs
V
DD
= 60 V, T j
= 150 °C
(see Figure 16. Test circuit for inductive load switching and diode recovery times
)
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
Min.
-
-
-
-
Symbol
V
(BR)GSO
Parameter
Gate-source breakdown voltage
Table 7. Gate-source Zener diode
Test conditions Min.
I
D
= 0 A, I
GS
= ±1 mA ±30
290
1.9
13.5
335
2.4
14.5
Typ.
Max.
5.5
27
1.5
Unit
A
A ns
μC
V ns
μC
A
Typ.
-
Max.
Unit
V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device.
The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry.
page 4/19
STD6N62K3
Electrical characteristics curves
2.1
Electrical characteristics curves
Figure 1. Safe operating area
AM09052v1
I
D
(A)
Tj=150°C
Tc=25°C
Single pulse
10 1
10 0
is
in this area
by max RDS(on)
10µs
100µs
1ms
10ms
10 -1
10 -1 10 0 10 1 10 2 V
DS
(V)
4
2
0
0
Figure 3. Output characteristics
AM09054v1
I
D
(A)
12
V
GS
=10V
10
8
6
6V
10 20
5V
V
DS
(V)
Figure 5. Gate charge vs gate-source voltage
V
GS
(V)
12
AM09057v1
V
DS ( V)
500
V
DS
V
DD
=496V
I
D
=5.5A
10
400
8
300
6
200
4
2
100
0
0 10 20 30
0
Q g
(nC)
K
Figure 2. Thermal impedance
GC20460
10 0
10 -1
10 -2
10 -5 10 -4 10 -3 10 -2 10 -1 t p
(s)
4
3
2
6
5
1
0
0
Figure 4. Transfer characteristics
AM09055v1
I
D
(A)
8
7
V
DS
=15V
2 4 6 8 10 V
GS
(V)
Figure 6. Static drain-source on resistance
AM09056v1
R
DS(on)
( W )
1.15
V
GS
=10V
1.10
1.05
1.00
0.95
0.90
0.85
0 1 2 3 4 5 6 I
D
(A)
DS8813 - Rev 2 page 5/19
Figure 7. Capacitance variations
AM09058v1
C
(pF)
1000
Ciss
100
10
1
0.1
Coss
Crss
1 10 100 V
DS
(V)
Figure 9. Normalized gate threshold voltage vs temperature
AM09061v1
V
GS(th)
(norm)
1.10
I
D
=50µA
1.00
0.90
0.80
0.70
-75 -25 25 75 125 T
J
(°C)
Figure 11. Normalized B
VDSS
vs temperature
AM09060v1
BV
DSS
(norm)
I
D
=1mA
1.10
1.05
1.00
0.95
0.90
-75 -25 25 75 125 T
J
(°C)
STD6N62K3
Electrical characteristics curves
Figure 8. Output capacitance stored energy
AM09059v1
E oss
(µJ)
5
4
3
2
1
0
0 100 200 300 400 500 V
DS
(V)
Figure 10. Normalized on resistance vs temperature
AM09062v1
R
DS(on)
(norm)
2.5
I
D
=2.8A
V
GS
=10V
2.0
1.5
1.0
0.5
0.0
-75 -25 25 75 125 T
J
(°C)
Figure 12. Source-drain diode forward characteristics
AM09063v1
V
SD
(V)
1.0
T
J
=-50°C
T
J
=25°C
0.8
0.6
0.4
0.2
0
0 1
T
J
=150°C
2 3 4 5 6 I
SD
(A)
DS8813 - Rev 2 page 6/19
Figure 13. Maximum avalanche energy vs temperature
AM09064v1
E
AS
(mJ)
160
140
I
D
=5.5 A
V
DD
=50 V
120
100
80
60
40
20
0
0 20 40 60 80 100 120 140 T
J
(°C)
STD6N62K3
Electrical characteristics curves
DS8813 - Rev 2 page 7/19
STD6N62K3
Test circuits
3
Test circuits
Figure 14. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 16. Test circuit for inductive load switching and diode recovery times
Figure 15. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 17. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 18. Unclamped inductive waveform
V (BR)DSS
V
D
I DM
I D
V DD V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF V
DD
D.U.T.
AM01471v1
Figure 19. Switching time waveform
0 t d(on) t on t r
90%
10%
V
GS
V
DS
90% t d(off) t off t f
90%
10%
0
10%
AM01473v1
DS8813 - Rev 2 page 8/19
4
STD6N62K3
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
. ECOPACK ® is an ST trademark.
DS8813 - Rev 2 page 9/19
4.1
STD6N62K3
DPAK (TO-252) type A2 package information
DPAK (TO-252) type A2 package information
Figure 20. DPAK (TO-252) type A2 package outline
DS8813 - Rev 2
0068772_type-A2_rev24 page 10/19
DS8813 - Rev 2
Dim.
c2
D
D1
E
E1 e e1
A
A1
A2 b b4 c
L2
L4
R
V2
H
L
L1
STD6N62K3
DPAK (TO-252) type A2 package information
Table 8. DPAK (TO-252) type A2 mechanical data mm
Typ.
9.35
1.00
2.60
0.65
0.60
4.95
6.40
5.10
2.16
4.40
0.64
5.20
0.45
0.48
6.00
Min.
2.20
0.90
0.03
5.10
5.20
2.28
2.80
0.80
0.20
0°
10.10
1.50
3.00
0.95
1.00
5.25
6.60
5.30
2.40
4.60
0.90
5.40
0.60
0.60
6.20
Max.
2.40
1.10
0.23
8° page 11/19
4.2
STD6N62K3
DPAK (TO-252) type C2 package information
DPAK (TO-252) type C2 package information
Figure 21. DPAK (TO-252) type C2 package outline
DS8813 - Rev 2
0068772_C2_24 page 12/19
DS8813 - Rev 2
Dim.
L
L1
L2
L3
L4
L6
θ1
θ2
V2 c2
D
D1
E
E1 e
H
A
A1
A2 b b4 c
STD6N62K3
DPAK (TO-252) type C2 package information
Table 9. DPAK (TO-252) type C2 mechanical data
0.72
5.13
0.47
0.47
6.00
Min.
2.20
0.90
0.00
5.10
6.50
5.20
2.186
9.80
1.40
mm
Typ.
2.30
1.01
5.33
6.10
6.60
2.286
10.10
1.50
2.90 REF
0.90
0.60
5°
5°
0°
0.51 BSC
0.80
1.80 BSC
7°
7°
1.00
9°
9°
8°
0.85
5.46
0.60
0.60
6.20
Max.
2.38
1.10
0.10
5.60
6.70
5.50
2.386
10.40
1.70
1.25
page 13/19
DS8813 - Rev 2
STD6N62K3
DPAK (TO-252) type C2 package information
Figure 22. DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_24 page 14/19
4.3
DPAK (TO-252) packing information
Figure 23. DPAK (TO-252) tape outline
T
Top cover tape
10 pitches cumulative tolerance on tape +/- 0.2 mm
P0 D P2
B1
K0
For machine ref. only including draft and radii concentric around B0
B0
A0 P1
User direction of feed
D1
STD6N62K3
DPAK (TO-252) packing information
F
E
W
User direction of feed
R
Bending radius
AM08852v1
DS8813 - Rev 2 page 15/19
DS8813 - Rev 2
Dim.
D1
E
F
K0
P0
A0
B0
B1
D
P1
P2
R
T
W
A
D
B
Figure 24. DPAK (TO-252) reel outline
STD6N62K3
DPAK (TO-252) packing information
T
40mm min. access hole at slot location
C
N
G measured at hub
Full radius
Tape slot in core for tape start
2.5mm min.width
AM06038v1
2.55
3.9
7.9
1.9
40
0.25
15.7
1.5
1.5
1.65
7.4
Table 10. DPAK (TO-252) tape and reel mechanical data
Tape Reel mm
Dim.
Min.
6.8
10.4
Max.
7
10.6
12.1
1.6
C
D
A
B
G
N
T
Min.
1.5
12.8
20.2
16.4
50 1.85
7.6
2.75
4.1
8.1
2.1
0.35
16.3
Base qty.
Bulk qty.
mm
Max.
330
13.2
18.4
22.4
2500
2500 page 16/19
STD6N62K3
Revision history
Table 11. Document revision history
Date
21-Dec-2011
Revision Changes
1 First release.
10-Apr-2018 2
The part number STB6N62K3 has been moved to a separate datasheet.
Removed maturity status indication from cover page. The document status is production data.
Updated title and features in cover page.
Updated
Section 1 Electrical ratings ,
Section 2 Electrical characteristics ,
Section 2.1 Electrical characteristics curves
and
Section 4 Package information .
Minor text changes.
DS8813 - Rev 2 page 17/19
STD6N62K3
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4.1
DPAK (TO-252) type A2 package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2
DPAK (TO-252) type C2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3
DPAK (TO-252) packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
DS8813 - Rev 2 page 18/19
STD6N62K3
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
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Purchasers’ products.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS8813 - Rev 2 page 19/19
