STD7NM64N
N-channel 640 V, 5 A, 0.88 Ω typ., MDmesh™ II Power MOSFET
in a DPAK package
Datasheet
-
production data
Features
TAB
DPAK
1
3
Order code
STD7NM64N
V
DS
640 V
R
DS(on)
max.
1.05 Ω
• 100% avalanche tested
• Low input capacitance and gate charge
• Low gate input resistance
I
D
5 A
Applications
•
Switching applications
Figure 1. Internal schematic diagram
*
'7$%
Description
This device is an N-channel Power MOSFET developed using the second generation of
MDmesh™ technology. This revolutionary Power
MOSFET associates a vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters.
6
$0Y
Order code
STD7NM64N
Table 1. Device summary
Marking Packages
7NM64N DPAK
Packaging
Tape and reel
August 2013
This is information on a product in full production.
DocID025081 Rev 1 1/16 www.st.com
5
6
3
4
1
2
Contents
Contents
STD7NM64N
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16 DocID025081 Rev 1
STD7NM64N Electrical ratings
Symbol
Table 2. Absolute maximum ratings
Parameter
V
DS
V
GS
I
D
I
D
I
DM
(1)
P
TOT dv/dt
(2) dv/dt
(3)
Drain-source voltage
Gate-source voltage
Drain current (continuous) at T
C
Drain current (continuous) at T
C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
= 25 °C
= 100 °C
T stg
T j
Storage temperature
Max. operating junction temperature
1.
Pulse width limited by safe operating area
2.
I
SD
≤ 5 A, di/dt ≤ 400 A/µs, V
DS(peak)
< V
(BR)DSS
3.
V
DS
≤
512 V
Value
640
± 25
5
3
20
60
15
50
- 55 to 150
150
Symbol
Table 3. Thermal data
Parameter
R thj-case
R thj-pcb
(1)
Thermal resistance junction-case max
Thermal resistance junction-pcb max
1.
When mounted on 1 inch² FR-4, 2 Oz copper board
Value
2.08
50
Symbol
I
AR
E
AS
Table 4. Thermal data
Parameter
Avalanche current, repetitive or notrepetitive (pulse width limited by T j
max)
Single pulse avalanche energy
(starting T j
= 25°C, I
D
= I
AR
, V
DD
= 50 V)
Value
2
119
Unit
°C/W
°C/W
Unit
A mJ
Unit
A
A
W
V
V
A
V/ns
V/ns
°C
°C
DocID025081 Rev 1 3/16
16
Electrical characteristics STD7NM64N
(T
C
= 25 °C unless otherwise specified).
Symbol Parameter
Table 5. On /off states
Test conditions
V
(BR)DSS
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Drain-source breakdown voltage
(V
GS
= 0)
I
D
= 1 mA
Zero gate voltage drain current
V
DS
= 640 V
V
DS
= 640 V, T
C
=125 °C
Gate-body leakage current (V
DS
= 0)
V
GS
= ± 20 V
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA
Static drain-source on-resistance
V
GS
= 10 V, I
D
= 2.5 A
Min.
Typ.
Max.
Unit
640
2
V
1 µA
100 µA
±100 nA
3 4
0.88
1.05
V
Ω
Symbol Parameter
Table 6. Dynamic
Test conditions Min.
Typ.
Max.
Unit
C
C
C iss oss rss
Input capacitance
Output capacitance
Reverse transfer capacitance
V
V
DS
GS
= 50 V, f = 1 MHz,
= 0
-
-
-
363
24.6
1.1
-
-
pF pF pF
C oss eq.
(1)
Equivalent output capacitance
V
DS
= 0 to 480 V, V
GS
= 0 130 pF
R
G
Intrinsic gate resistance f = 1 MHz, I
D
=0 5.4
Ω
Q g
Q gs
Q gd
Total gate charge
Gate-source charge
Gate-drain charge
V
V
DD
GS
= 480 V, I
= 10 V
(see Figure 14
D
)
= 5 A,
-
-
14
2.7
7.7
-
-
-
1.
C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss increases from 0 to 80% V
DS
.
when V
DS nC nC nC
4/16 DocID025081 Rev 1
STD7NM64N Electrical characteristics
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Table 7. Switching times
Test conditions
V
DD
= 300 V, I
D
= 2.5 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 13
)
Min.
Typ.
Max Unit
-
-
-
-
7
10
26
12
-
-
-
ns ns ns ns
Symbol Parameter
Table 8. Source drain diode
Test conditions
I
SD
I
SDM
(1)
V
SD
(2) t rr
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
I
SD
= 5 A, V
GS
= 0
Q rr
I
RRM t
Q rr rr
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
I
SD
V
= 5 A, di/dt = 100 A/µs
DD
I
RRM
Reverse recovery current
1.
Pulse width limited by safe operating area
2.
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
= 60 V (see
Figure 18
I
SD
= 5 A, di/dt = 100 A/µs
V
DD
= 60 V, T j
= 150 °C
(see Figure 18
)
)
-
-
-
-
-
-
-
-
-
Min.
Typ.
Max.
Unit
5
20
1.3
213
1.5
14
265
1.8
14
A
A
V ns
μ
C
A ns
μ
C
A
DocID025081 Rev 1 5/16
16
Electrical characteristics STD7NM64N
2.1
I
D
(A)
Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance
AM15980v1
10
1 y max R
Operation in this ar
Limit ed b ea is
DS(on)
10µs
100µs
0.1
Tj=150°C
Tc=25°C
Single pulse
100 V
DS
(V)
1ms
10ms
0.01
0.1
1 10
Figure 4. Output characteristics
AM06477v1
I
D
(A)
9
8
7
6
5
4
3
2
1
0
0
V
GS
=10V
10 20
6V
30
5V
V
DS
(V)
Figure 5. Transfer characteristics
AM06478v1
I
D
(A)
10
9
8
7
6
5
4
3
2
1
0
0 2
V
DS
=20V
4 6 8 10 V
GS
(V)
Figure 6. Gate charge vs gate-source voltage
V
GS
(V)
AM06479v1
V
DS
(V)
12
V
DD
=480V
I
D
=5A 500
10
V
DS
400
8
300
6
200
4
2
100
Figure 7. Static drain-source on-resistance
AM15981v1
R
DS(on)
( Ω )
0.940
V
GS
=10V
0.920
0.900
0.880
0.860
0
0 2 4 6 8 10 12 14 16
0
Q g
(nC)
0.840
0.820
0 1 2 3 4 5 I
D
(A)
6/16 DocID025081 Rev 1
STD7NM64N Electrical characteristics
Figure 8. Capacitance variations
C
(pF)
AM06481v1
Figure 9. Output capacitance stored energy
AM06482v1
E oss
(µJ)
2.5
1000
Ciss 2.0
100 1.5
1.0
Coss
10
1
0.1
1 10 100
Crss
V
DS
(V)
Figure 10. Normalized gate threshold voltage vs temperature
AM06483v1
V
GS(th)
(norm)
1.10
I
D
=250µA
1.00
0.90
0.80
0.70
-50 -25 0 25 50 75 100 T
J
(°C)
Figure 12. Normalized V
DS
vs temperature
AM15982v1
V
DS
(norm)
1.10
I
D
=1mA
1.08
1.06
1.04
1.02
1.00
0.98
0.96
0.94
0.92
-50 -25 0 25 50 75 100 T
J
(°C)
0.5
0
0 100 200 300 400 500 600 V
DS
(V)
Figure 11. Normalized on-resistance vs temperature
AM06484v1
R
DS(on)
(norm)
2.1
I
D
=2.5A
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
-50 -25 0 25 50 75 100 T
J
(°C)
DocID025081 Rev 1 7/16
16
Test circuits
3 Test circuits
STD7NM64N
Figure 13. Switching times test circuit for resistive load
Figure 14. Gate charge test circuit
V
DD
12V
47k
Ω
100nF
1k
Ω
V
GS
V
D
R
G
R
L
D.U.T.
2200
μ
F
3.3
μ
F
V
DD
V i
=20V=V
GMAX
2200
μ
F
I
G
=CONST
2.7k
Ω
100
Ω
D.U.T.
V
G
P
W
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
47k
Ω
P
W
1k
Ω
AM01469v1
Figure 16. Unclamped inductive load test circuit
25 Ω
G
D
A
D.U.T.
S
B
R
G
A
FAST
DIODE
A
B
B
G
D
S
L=100 μ H
3.3
μ
F
1000
μ
F
V
DD
V i
AM01470v1
Figure 17. Unclamped inductive waveform
V
(BR)DSS
V
D
V
D
I
D
L
2200
μ
F
3.3
μ
F
V
DD
D.U.T.
P w
AM01471v1
Figure 18. Switching time waveform t on td on t r t off td off t f
I
DM
90%
90%
10%
I
D 0
10% V
DS
V
DD
V
DD
90%
V
GS
AM01472v1
0
10%
AM01473v1
8/16 DocID025081 Rev 1
STD7NM64N
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
DocID025081 Rev 1 9/16
16
Dim.
E1 e e1
H
L
(L1)
L2
L4
R
V2 b4 c c2
D
D1
E
A
A1
A2 b
Package mechanical data STD7NM64N
Table 9. DPAK (TO-252) mechanical data mm
Typ.
Min.
2.20
0.90
0.03
0.64
5.20
0.45
0.48
6.00
5.10
6.40
4.70
2.28
4.40
9.35
1.00
2.80
0.80
0.60
0.20
0°
4.60
10.10
1.50
Max.
2.40
1.10
0.23
0.90
5.40
0.60
0.60
6.20
6.60
1.00
8°
10/16 DocID025081 Rev 1
STD7NM64N
Figure 19. DPAK (TO-252) drawing
Package mechanical data
DocID025081 Rev 1
0068772_K_type_A
11/16
16
Package mechanical data
Figure 20. DPAK footprint
(a)
STD7NM64N
Footprint_REV_K
12/16 a.
All dimensions are in millimeters
DocID025081 Rev 1
STD7NM64N
5 Packaging mechanical data
Dim.
E
F
K0
P0
P1
P2
R
T
W
A0
B0
B1
D
D1
Packaging mechanical data
Min.
6.8
10.4
1.5
1.5
1.65
7.4
2.55
3.9
7.9
1.9
40
0.25
15.7
Table 10. DPAK (TO-252) tape and reel mechanical data
Tape Reel mm mm
Dim.
1.85
7.6
2.75
4.1
8.1
2.1
Max.
7
10.6
12.1
1.6
0.35
16.3
C
D
G
A
B
N
T
Min.
1.5
12.8
20.2
16.4
50
Base qty.
Bulk qty.
Max.
330
13.2
18.4
22.4
2500
2500
DocID025081 Rev 1 13/16
16
Packaging mechanical data
T
Top cover tape
Figure 21. Tape for DPAK (TO-252)
10 pitches cumulative tolerance on tape +/- 0.2 mm
P0 D P2
B1
K0
For machine ref. only including draft and radii concentric around B0
B0
A0 P1
User direction of feed
D1
STD7NM64N
F
E
W
14/16
R
A
User direction of feed
REEL DIMENSIONS
Figure 22. Reel for DPAK (TO-252)
40mm min.
Access hole
At slot location
B
D
C
Bending radius
AM08852v1
T
N
Full radius
DocID025081 Rev 1
Tape slot in core for tape start 25 mm min.
width
G measured at hub
AM08851v2
STD7NM64N
Date
02-Aug-2013
Revision
Table 11. Document revision history
Changes
1 First release.
Revision history
DocID025081 Rev 1 15/16
16
STD7NM64N
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