STFH18N60M2
Datasheet
N-channel 600 V, 0.255 Ω typ., 13 A MDmesh M2
Power MOSFET in a TO-220FP wide creepage package
G(1)
TO-220 FP wide creepage
D(2)
S(3)
Features
Order code
STFH18N60M2
V
DS
@T
Jmax
650 V
• Extremely low gate charge
• Excellent output capacitance (C
OSS
) profile
• 100% avalanche tested
• Zener-protected
• Wide distance of 4.25 mm between the pins
R
DS(on)
max.
0.280 Ω
I
D
13 A
Applications
• Switching applications
• LCC converters
• Resonant converters
AM15572v1_no_tab
Description
This device is an N-channel Power MOSFET developed using MDmesh M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters.
The TO-220FP wide creepage package provides increased surface insulation for
Power MOSFETs to prevent failure due to arcing, which can occur in polluted environments.
Product status link
STFH18N60M2
Packing
Product summary
Order code
Marking
Package
STFH18N60M2
18N60M2
TO-220FP wide creepage
Tube
DS11693 - Rev 3 - June 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
1
STFH18N60M2
Electrical ratings
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
I
V
D
GS
(1)
Parameter
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
I
DM
(2)
P
TOT dv/dt
(3)
dv/dt
(4)
Drain current (pulsed)
Total power dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
V
ISO
Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; T
C
= 25 °C)
Storage temperature range T stg
T j
Operating junction temperature range
1. Limited by maximum junction temperature.
2. Pulse width limited by safe operating area.
3. I
SD
≤ 13 A, di/dt ≤ 400 A/µs; V
DS(peak)
< V
(BR)DSS
, V
DD
= 400 V
4. V
DS
≤ 480 V
Symbol
R thj-case
R thj-amb
Table 2. Thermal data
Parameter
Thermal resistance junction-case
Thermal resistance junction-ambient
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive (pulse width limited by
T jmax
)
Single pulse avalanche energy (starting T j
=25 °C, I
D
= I
AR
, V
DD
=50 V)
Value
±25
13
8
52
25
15
50
2.5
-55 to 150
Value
5
62.5
Value
3
135
Unit
°C/W
°C/W
Unit
A mJ
Unit
V
A
A
A
W
V/ns
V/ns kV
°C
DS11693 - Rev 3 page 2/12
2
STFH18N60M2
Electrical characteristics
Electrical characteristics
(T
C
= 25 °C unless otherwise specified).
Table 4. On /off states
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown voltage
I
D
Test conditions
= 1 mA, V
GS
= 0 V
I
DSS
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 600 V
V
GS
= 0 V, V
DS
= 600 V,
T
C
= 125 °C
(1)
V
R
I
GSS
GS(th)
DS(on)
Gate-body leakage current
Gate threshold voltage
Static drain-source on-resistance
V
V
V
DS
DS
GS
1. Defined by design, not subject to production test.
= 0 V, V
GS
= V
GS
, I
= 10 V, I
D
D
= ± 25 V
= 250 µA
= 6.5 A
Min.
600
2
Typ.
Max.
3
0.255
1
100
±10
4
0.280
Table 5. Dynamic
Symbol
C iss
C oss
C rss
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
V
V
DS
GS
Test conditions
= 100 V, f = 1 MHz,
= 0 V
C oss eq.
(1)
Equivalent output capacitance V
DS
= 0 to 480 V, V
GS
= 0 V
R
G
Q g
Intrinsic gate resistance
Total gate charge f = 1 MHz, I
D
= 0 A
Q
Q gs gd
Gate-source charge
Gate-drain charge
V
DD
= 480 V, I
D
= 13 A,
V
GS
= 0 to 10 V (see
Figure 14. Test circuit for gate charge behavior )
Min.
-
-
-
-
-
-
-
-
Typ.
791
40
1.3
164.5
5.6
21.5
3.2
11.3
Max.
-
-
-
-
-
-
-
-
Unit pF pF pF pF
Ω nC nC nC
1. C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS
increases from 0 to 80% V
DSS
.
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 300 V, I
D
= 6.5 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 13. Test circuit for resistive load switching times
and
Figure 18. Switching time waveform )
Min.
-
-
-
-
Typ.
12
9
47
10.6
Max.
-
-
-
-
Unit ns ns ns ns
µA
V
Ω
Unit
V
µA
µA
DS11693 - Rev 3 page 3/12
STFH18N60M2
Electrical characteristics
Table 7. Source drain diode
Symbol
I
SD
I
SDM
(1)
V
SD
I
I
Q rr
RRM t t rr
Q rr rr
(2)
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Test conditions
I
SD
= 13 A, V
GS
= 0 V
I
SD
= 13 A, di/dt = 100 A/µs
V
DD
= 60 V (see
Figure 15. Test circuit for inductive load switching and diode recovery times
)
I
SD
= 13 A, di/dt = 100 A/µs
V
DD
= 60 V, T j
= 150 °C
(see Figure 15. Test circuit for inductive load switching and diode recovery times
)
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%.
-
-
-
Min.
-
-
-
-
-
-
305
3.3
22
417
4.6
22
Typ.
Max.
13
52
1.6
V ns
µC
Unit
A
A
A ns
µC
A
DS11693 - Rev 3 page 4/12
STFH18N60M2
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
I
D
(A)
10
1 Operation in
Limited
by max R
0.1
0.01
0.1
1
AM15834v1
10
Tj=150°C
Tc=25°C
Single pulse
100 V
DS
(V)
10µs
100µs
1ms
10ms
10
5
0
0
I D
(A)
30
Figure 3. Output characteristics
V
GS
=7, 8, 9, 10V
25
AM15837v1
6V
20
15
5 10 15
5V
20
4V
V
DS
(V)
Figure 5. Gate charge vs gate-source voltage
V
GS
(V)
12 V DS
V
DD
=480V
I D =13A
AM15839v1
V
DS
(V)
500
10
400
8
300
6
200
4
2
100
0
0 5 10 15 20 25
0
Q g
(nC)
10 -1
10 -2
K
Figure 2. Thermal impedance
GC20940
10 -3
10 -4 10 -3 10 -2 10 -1 10 0 t p
(s)
Figure 4. Transfer characteristics
I
D
(A)
V
DS
=18V
30
AM15838v1
25
20
15
10
5
0
0 2 4 6 8 10 V
GS
(V)
Figure 6. Static drain-source on-resistance
AM15840v1
R
DS(on)
(Ω)
0.270
V
GS
=10V
0.265
0.260
0.255
0.250
0.245
0 2 4 6 8 10 12 I
D
(A)
DS11693 - Rev 3 page 5/12
STFH18N60M2
Electrical characteristics (curves)
C
(pF)
Figure 7. Capacitance variations
AM15841v1
1000
Ciss
100
Coss
10
1
0.1
1 10 100
Crss
V
DS
(V)
Figure 9. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
2.4
GIPG070815BQ6KLRON
V
GS
= 10 V
2.0
1.6
1.2
0.8
0.4
0.0
-75 -25 25 75 125 T j
(°C)
Figure 11. Normalized V
(BR)DSS
vs temperature
V
(BR)DSS
(norm.)
1.12
I
D
= 1 mA
GIPG070815BQ6KLBDV
1.08
1.04
1.00
0.96
0.92
0.88
-75 -25 25 75 125 T j
(°C)
Figure 8. Normalized gate threshold voltage vs.
temperature
V
GS(th)
(norm.)
GIPG070815BQ6KLVTH
I
D
= 250 µA
1.1
1.0
0.9
0.8
0.7
0.6
-75 -25 25 75 125 T j
(°C)
Figure 10. Source-drain diode forward characteristics
AM15842v1
V
SD
(V)
1.4
1.2
1.0
T
J
=-50°C
0.8
0.6
0.4
0.2
0.0
0 2 4
T
J
=150°C
6 8
T
J
=25°C
10 12 I
SD
(A)
Figure 12. Output capacitance stored energy
AM15843v1
Eoss (µJ)
6
5
4
3
2
1
0
0 100 200 300 400 500 600 V DS (V)
DS11693 - Rev 3 page 6/12
STFH18N60M2
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
Figure 14. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
I
G
= CONST
2.7 kΩ
47 kΩ
1 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 16. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 17. Unclamped inductive waveform
V (BR)DSS
V D
I DM
I D
V DD V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF
V
DD
D.U.T.
AM01471v1
0
Figure 18. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS11693 - Rev 3 page 7/12
4
4.1
STFH18N60M2
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
TO-220FP wide creepage package information
Figure 19. TO-220FP wide creepage package outline
DS11693 - Rev 3
DM00260252_1 page 8/12
DS11693 - Rev 3
Dim.
F2
G
G1
H
L2
L3
L4
L5
L6
L7
Dia
D
E
A
B
F
F1
STFH18N60M2
TO-220FP wide creepage package information
Table 8. TO-220FP wide creepage package mechanical data
4.15
10.90
15.25
28.70
10.00
2.55
16.00
9.05
3.00
0.46
0.76
0.96
1.11
8.40
Min.
4.60
2.50
2.49
8.50
4.25
11.00
15.40
29.00
10.20
2.70
16.10
9.15
3.10
mm
Typ.
4.70
2.60
2.59
4.35
11.10
15.55
29.30
10.40
2.85
16.20
9.25
3.20
0.59
0.89
1.25
1.40
8.60
Max.
4.80
2.70
2.69
page 9/12
STFH18N60M2
Revision history
Date
08-Jun-2016
16-Jun-2016
06-Jun-2019
Revision
1
2
3
Table 9. Document revision history
Changes
First release.
Document status promoted from preliminary data to production data.
Minor text changes.
Modified
Figure 8. Normalized gate threshold voltage vs. temperature
,
Figure 9. Normalized on-resistance vs temperature
and
Figure 11. Normalized
V
(BR)DSS
vs temperature .
Minor text changes.
DS11693 - Rev 3 page 10/12
STFH18N60M2
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
TO-220FP wide creepage package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
DS11693 - Rev 3 page 11/12
STFH18N60M2
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DS11693 - Rev 3 page 12/12
