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STS4DNF60L
N-channel 60 V, 0.045
Ω
, 4 A, SO-8
STripFET™ Power MOSFET
Features
Type
STS4DNF60L
V
DSS
60V
R
DS(on)
<0.055
Ω
I
D
4A
■
■
Standard outline for easy automated surface mount assembly
Low threshold drive
Application
■ Switching applications
Description
This Power MOSFET is the latest development of
STMicroelectronics unique “single feature size” strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
SO-8
Figure 1.
Internal schematic diagram
Table 1.
Device summary
Order code
STS4DNF60L
Marking
4DF60L
Package
SO-8
Packaging
Tape & reel
March 2010 Doc ID 6121 Rev 9 1/12 www.st.com
12
Contents
Contents
STS4DNF60L
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2/12 Doc ID 6121 Rev 9
STS4DNF60L Electrical ratings
Table 2.
Symbol
Absolute maximum ratings
Parameter
V
DS
V
GS
I
D
I
D
I
DM
(1)
P
TOT
(2)
E
AS
(3)
T j
T stg
Drain-source voltage (V
Gate- source voltage
Total dissipation at T
C
= 25 °C
Single pulse avalanche energy
Storage temperature
GS
= 0)
Drain current (continuous) at T
Drain current (continuous) at T
Drain current (pulsed)
Operating junction temperature
1.
Pulse width limited by safe operating area
2.
P
TOT
=1.6 W for single operation
3.
Starting T
J
= 25 °C, I
D
= 4 A, V
DD
= 30 V
C
C
= 25 °C
= 100 °C
Table 3.
Symbol
Thermal data
Parameter
Rthj-pcb Thermal resistance junction-pcb D.O.
(1)
1.
When mounted on inch² FR-4 board, 2 Oz Cu, t < 10sec, dual operation
Value
60
± 15
4
2.5
16
2
80
- 55 to 150
Value
62.5
Unit
°C/W
Unit
A
A
W mJ
V
V
A
°C
Doc ID 6121 Rev 9 3/12
Electrical characteristics STS4DNF60L
(T
C
= 25 °C unless otherwise specified)
Table 4.
Symbol
On /off states
Parameter Test conditions
V
(BR)DSS
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Drain-source breakdown voltage
I
D
= 250 µA, V
GS
= 0
Zero gate voltage drain current (V
GS
= 0)
Gate-body leakage current (V
DS
= 0)
V
V
V
DS
DS
GS
= Max rating
= Max rating, T
= ± 15 V
C
=125 °C
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA
Static drain-source on resistance
V
GS
= 10 V, I
D
= 2 A
V
GS
= 4.5 V, I
D
= 2 A
Min.
Typ.
Max. Unit
60
1
1
10
± 100 nA
1.7
0.045
0.050
2.5
0.055
0.065
V
Ω
Ω
V
µA
µA
Table 5.
Symbol g fs
C iss
C oss
C rss
Q g
Q gs
Q gd
Dynamic
Parameter
Forward transconductance
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Test conditions
V
DS
=25 V, I
D
=2 A
V
DS
= 25 V, f = 1 MHz, V
GS
= 0
V
DD
= 48 V, I
D
= 4 A,
V
GS
= 4.5 V
(see
Min.
Typ.
Max.
Unit
25 S
-
-
1030
140
40
15
4
4
-
pF pF pF nC nC nC
4/12 Doc ID 6121 Rev 9
STS4DNF60L Electrical characteristics
Table 6.
Symbol t d(on) t r t d(off) t f
Switching times
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
V
DD
= 30 V, I
D
= 2.2 A,
R
G
= 4.7
Ω,
V
GS
= 10 V
(see
Min. Typ.
Max. Unit
-
-
15
28
45
10
-
ns ns ns ns
Table 7.
Symbol
Source drain diode
Parameter Test conditions
I
I
SD
(1)
SDM
V
SD
(2) t rr
Q rr
I
RRM
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1.
Pulse width limited by safe operating area
2.
Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
I
SD
= 4 A, V
GS
= 0
I
SD
= 4 A, di/dt = 100 A/µs
V
DD
= 20 V
)
Min.
Typ. Max. Unit
-
-
4
16
1.2
-
85
85
2
A
A
V ns nC
A
Doc ID 6121 Rev 9 5/12
Electrical characteristics
Figure 2.
Safe operating area Figure 3.
Thermal impedance
STS4DNF60L
Figure 4.
Output characteristics Figure 5.
Transfer characteristics
Figure 6.
Source-drain diode forward characteristics
Figure 7.
Static drain-source on resistance
6/12 Doc ID 6121 Rev 9
STS4DNF60L Electrical characteristics
Figure 8.
Gate charge vs gate-source voltage Figure 9.
Capacitance variations
Figure 10. Normalized gate threshold voltage vs temperature
Figure 11. Normalized on resistance vs temperature
Doc ID 6121 Rev 9 7/12
Test circuits
3 Test circuits
STS4DNF60L
Figure 12. Switching times test circuit for resistive load
Figure 13. Gate charge test circuit
V
DD
12V
47k
Ω
100nF
1k Ω
V
D
R
G
R
L
2200
µ
F
3 .
3
µ
F
V
G S
D.U.T.
V
DD
V i
=20V=V
GMAX
2200
µ F
I
G
=CON S T
2.7k
Ω
100
Ω
D.U.T.
V
G
P
W
47k
Ω
P
W
1k
Ω
AM0146 8 v1 AM01469v1
Figure 14. Test circuit for inductive load switching and diode recovery times
Figure 15. Unclamped Inductive load test circuit
25 Ω
G
A
D
D.U.T.
S
B
R
G
A
FA S T
DIODE
A
B
B
G
D
S
L=100 µ H
3 .
3
µ F
1000
µ F
V
DD
V i
V
D
I
D
L
D.U.T.
2200
µ F
3 .
3
µ F
V
DD
P w
AM01470v1
Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform
V
D
V
(BR)D SS t on td on t r t off td off t f
AM01471v1
I
DM
90 %
90 %
10 %
I
D 0
10 % V
D S
V
DD
V
DD
90 %
V
G S
AM01472v1
0
10 %
AM0147 3 v1
8/12 Doc ID 6121 Rev 9
STS4DNF60L
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
Doc ID 6121 Rev 9 9/12
Package mechanical data STS4DNF60L
DIM.
M
S
F
L
D
E e e3 b b1
C c1
A a1 a2 a3
MIN.
0.1
0.65
0.35
0.19
0.25
4.8
5.8
3.8
0.4
SO-8 MECHANICAL DATA mm.
TYP MAX.
1.75
0.25
1.65
0.85
0.48
0.25
0.5
5.0
6.2
MIN.
0.003
0.025
0.013
0.007
0.010
45 (typ.)
0.188
0.228
1.27
3.81
4.0
1.27
0.6
8 (max.)
0.14
0.015
inch
TYP.
0.050
0.150
MAX.
0.068
0.009
0.064
0.033
0.018
0.010
0.019
0.196
0.244
0.157
0.050
0.023
10/12 Doc ID 6121 Rev 9
STS4DNF60L Revision history
Table 8.
Date
Document revision history
30-May-2005
29-Mar-2006
16-May-2006
29-Aug-2007
30-Mar-2010
Revision
5
6
7
8
9
Changes
Initial electronic version
Modified
Modified internal schematic diagram
Marking has been updated
Inserted E
AS
value in
Table 2: Absolute maximum ratings
Doc ID 6121 Rev 9 11/12
STS4DNF60L
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12/12 Doc ID 6121 Rev 9
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