STP16CPP05
Low voltage 16-bit constant current LED sink driver
Datasheet - production data
Features
16 constant current output channels
Adjustable output current through external resistor
Output current: 3-40 mA
Serial data in/parallel data ouT
3.3 V or 5 V supply voltage
Max clock frequency 30 MHz
Schmitt-trigger input
ESD protection 2 kV HBM
Thermal shutdown
Order code
Table 1: Device summary
Package
Description
The STP16CPP05 is a monolithic, low voltage, low current power 16-bit shift register designed for LED panel displays. The STP16CPP05 contains a 16-bit serial-in, parallel-out shift register that feeds a 16-bit, D-type storage register. In the output stage, sixteen regulated current sources provide from 3 mA to 40 mA constant current to drive the LEDs. The output current setup time is 40 ns (typ), thus improving the system performance. The LEDs' brightness can be controlled by using an external resistor to adjust the STP16CPP05 output current. The
STP16CPP05 guarantees a 20 V output driving capability, allowing users to connect more LEDs in series. The high clock frequency, 30 MHz, makes the device suitable for high data rate transmission. The 3.3 V voltage supply is useful in applications that interface with a 3.3 V micro controller.
Packing
STP16CPP05MTR
STP16CPP05TTR
STP16CPP05XTTR
STP16CPP05PTR
SO-24
TSSOP24
TSSOP24 exposed pad
QSOP-24
1000 parts per reel
2500 parts per reel
2500 parts per reel
2500 parts per reel
March 2017 DocID15379 Rev 5
This is information on a product in full production.
1/31 www.st.com
Contents
Contents
STP16CPP05
1 Summary description ...................................................................... 3
1.1
Pin connection and description ......................................................... 3
2 Electrical ratings ............................................................................. 4
2.1
2.2
2.3
Absolute maximum ratings ................................................................ 4
Thermal data ..................................................................................... 4
Recommended operating conditions ................................................. 5
3 Electrical characteristics ................................................................ 6
4 Equivalent circuit and outputs ....................................................... 8
5 Timing diagrams ............................................................................ 11
6 Typical characteristics .................................................................. 14
7 Tast circuits ................................................................................... 17
8 Package information ..................................................................... 20
8.1
8.2
8.3
8.4
8.5
QSOP-24 package information ....................................................... 21
SO-24 package information ............................................................ 23
TSSOP24 package information ....................................................... 24
TSSOP24 exposed pad package information ................................ 26
TSSOP24, TSSOP24 exposed pad and ............................................
SO-24 packing information .............................................................. 28
9 Revision history ............................................................................ 30
2/31 DocID15379 Rev 5
STP16CPP05
1
1.1
Summary description
Summary description
Output voltage
≥ 1.3 V
Table 2: Typical current accuracy
Current accuracy
Output current
Between bits Between ICs
± 1.5% ± 5% ≥ 5 to 40 mA
V
DD
3.3 V to 5 V
Temperature
25 °C
Pin connection and description
Figure 1: Pin connection
The exposed pad should be electrically connected to a metal land electrically isolated or connected to ground.
Pin n° Symbol
Table 3: Pin description
Name and function
1
2
GND
SDI
Ground terminal
Serial data input terminal
3
4
CLK
LE
Clock input terminal
Latch input terminal
5-20 OUT 0-15 Output terminal
21 OE Input terminal of output enable (active low)
22
23
24
SDO
R-EXT
V
DD
Serial data out terminal
Input terminal for an external resistor for constant current programming
Supply voltage terminal
DocID15379 Rev 5 3/31
Electrical ratings
2
2.1
2.2
Electrical ratings
STP16CPP05
Absolute maximum ratings
Stressing the device above the rating listed in the “absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Symbol
Table 4: Absolute maximum ratings
Parameter Value Unit
V
DD
V
O
I
O
V
I
I
GND f
CLK
Supply voltage
Output voltage
Output current
Input voltage
GND terminal current
Clock frequency
0 to 7
-0.5 to 20
50
V
V mA
-0.4 to V
DD
+ 0.4 V
800 mA
50 MHz
Thermal data
Symbol
Table 5: Thermal data
Parameter
T
OPR
Operating temperature range
T
STG
Storage temperature range
R thJA
Thermal resistance junction-ambient
SO-24
TSSOP24
TSSOP24 (1)
exposed pad
QSOP-24
Notes:
(1)
The exposed pad should be soldered directly to the PCB to realize the thermal benefits.
Value
-40 to +125
-55 to +150
60
85
37.5
72
Unit
°C
°C
°C/W
°C/W
°C/W
°C/W
4/31 DocID15379 Rev 5
STP16CPP05
2.3 Recommended operating conditions
Symbol
Table 6: Recommended operating conditions at 25 °C
Parameter Test conditions Min. Typ.
Electrical ratings
Max. Unit
V
DD
V
O
I
O
I
OH
I
OL
V
IH
V
IL t wLAT t wCLK
Supply voltage
Output voltage
Output current
Output current
Output current
Input voltage
Input voltage
LE/DM1 pulse width
CLK pulse width
OUTn
SERIAL-OUT
SERIAL-OUT
3.0
3
0.7 V
DD
-0.3
20
16
5.5
20
40
+1
-1
V
DD
+ 0.3
0.3 V
DD t wEN
OE pulse width 70
V
DD
= 3.3 V to 5.0 V t
SETUP(D)
Setup time for DATA t
HOLD(D)
Hold time for DATA t
SETUP(L)
Setup time for LATCH f
CLK
Clock frequency
Cascade operation (1)
5
5
15
30
Notes:
(1)
If the device is connected in cascade, it may not be possible achieve the maximum data transfer. Please consider the timings carefully.
ns ns ns ns
MHz
V
V mA mA mA
V
V ns ns
DocID15379 Rev 5 5/31
Electrical characteristics STP16CPP05
3 Electrical characteristics
Symbol
V
IH
V
IL
I
OH
V
OL
V
OH
I
OL1
I
OL2
I
OL3
ΔI
OL1
ΔI
OL2
ΔI
OL3
V
DD
= 3.3 V to 5 V, T
A
= 25 °C, unless otherwise specified.
Parameter
Table 7: Electrical characteristics
Test conditions Min.
Input voltage high level
Input voltage low level
Output leakage current V
OH
= 20 V
Output voltage (serial-OUT) I
OL
= 1 mA
Output voltage (serial-OUT) I
OH
= -1 mA
V
O
= 0.3 V, R ext
= 4 kΩ
Output current V
O
= 0.3 V, R ext
= 980 Ω
V
O
= 1.3 V, R ext
= 490 Ω
V
O
= 0.3 V, I
O
= 5 mA,
R ext
= 4 kΩ
Output current error between bit (all output ON)
V
O
= 0.3 V, I
O
= 20 mA,
R ext
= 980 Ω
0.7 V
DD
GND
V
DD
-0.4V
4.75
19
38
V
O
= 1.3 V, I
O
= 40 mA,
R ext
= 490 Ω
R
SIN(up)
Pull-up resistor
R
SIN(down)
Pull-down resistor
I
DD(OFF1)
I
DD(OFF2)
Supply current (OFF)
I
DD(ON1)
Supply current (ON)
I
DD(ON2)
Thermal Thermal protection
R ext
= 980 OUT 0 to 15 = OFF
R ext
= 490 OUT 0 to 15 = OFF
R ext
= 980, OUT 0 to 15 = ON
R ext
= 490, OUT 0 to 15 = ON
150
100
Typ.
0.15
5
20
40
± 1.2
± 0.5
± 1.0
300
200
5.4
8.0
5.5
8.1
170
Max.
V
DD
0.3 V
DD
1
0.4
Unit
V
V
μA
V
V
5.25
21
42
mA
± 5
± 3
± 3
600
400
7.5
9.5
7.5
9.5
% kΩ kΩ
mA
°C
6/31 DocID15379 Rev 5
STP16CPP05
V
DD
= 5 V, T
A
= 25 °C, unless otherwise specified.
Symbol Parameter
Table 8: Switching characteristics
Test conditions
t
PLH1
Propagation delay time,
CLK- OUTn , LE = H,
V
DD
= 3.3 V
V
DD
= 5 V
Electrical characteristics
Min. Typ. Max. Unit
- 44 58
- 24 32 ns
OE = L
t
PLH2
t
PLH3
t
PLH
t
PHL1
Propagation delay time,
LE- OUTn , OE = L
Propagation delay time,
OE - OUTn , LE = H
Propagation delay time,
CLK-SDO
Propagation delay time,
CLK- OUTn , LE = H,
OE = L
V
IH
= V
DD
V
IL
= GND C
L
= 10 pF
I
O
= 20 mA V
L
= 3.0 V
R ext
= 1 KΩ R
L
= 60 Ω
V
DD
= 3.3 V
V
DD
= 5 V
V
DD
= 3.3 V
V
DD
= 5 V
V
DD
= 3.3 V
V
DD
= 5 V
V
DD
= 3.3 V
V
DD
= 5 V
t
PHL2
Propagation delay time,
LE- OUTn , OE = L
V
DD
= 3.3 V
V
DD
= 5 V
t
PHL3
Propagation delay time,
OE - OUTn , LE = H
V
DD
= 3.3 V
V
DD
= 5 V
t
PHL
t
ON
t
OFF
Propagation delay time,
CLK-SDO
Output rise time 10~90% of voltage waveform
Output fall time 90~10% of voltage waveform t r t f
CLK rise time (1)
CLK fall time (1)
Notes:
(1)
In order to achieve high cascade data transfer, please consider tr/tf timings carefully.
V
DD
= 3.3 V
V
DD
= 5 V
V
DD
= 3.3 V
V
DD
= 5 V
V
DD
= 3.3 V
V
DD
= 5 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
43
24
63
37
17
11
22
16
19
15
16
13
21
13
26
12
4
3
56
32
82
48
22
14
28
21 ns ns ns ns
25
20 ns
21
17 ns
27 ns
17
35 ns
16
6 ns
5
5000 ns
5000 ns
7/31 DocID15379 Rev 5
Equivalent circuit and outputs
4 Equivalent circuit and outputs
Figure 2: OE terminal
STP16CPP05
Figure 3: LE terminal
8/31 DocID15379 Rev 5
STP16CPP05
Figure 4: CLK, SDI terminal
Equivalent circuit and outputs
Figure 5: SDO terminal
DocID15379 Rev 5 9/31
Equivalent circuit and outputs
Figure 6: Block diagram
STP16CPP05
10/31 DocID15379 Rev 5
STP16CPP05
5
Timing diagrams
Timing diagrams
CLOCK LE OE SERIAL-IN
Table 9: Truth table
OUT0 ............. OUT7 ................ OUT15
_|¯
_|¯
_|¯
¯|_
¯|_
H
L
H
X
X
L
L
L
L
H
Dn
Dn + 1
Dn + 2
Dn + 3
Dn + 3
Dn ..... Dn - 7 ..... Dn -15
No change
Dn + 2 ..... Dn - 5 ..... Dn -13
Dn + 2 ..... Dn - 5 ..... Dn -13
OFF
OUTn = ON when Dn = H OUTn = OFF when Dn = L.
SDO
Dn - 15
Dn - 14
Dn - 13
Dn - 13
Dn - 13
Figure 7: Timing diagram
The latches circuit holds data when the LE terminal is Low.
1 When LE terminal is at high level, latch circuit does not hold the data it passes from the input to the output.
2 When OE terminal is at low level, output terminals OUT0 to OUT15 respond to the data, either ON or OFF.
3 When OE terminal is at high level, it switches off all the data on the output terminal.
DocID15379 Rev 5 11/31
Timing diagrams
Figure 8: Clock, serial-in, serial-out
STP16CPP05
12/31 DocID15379 Rev 5
STP16CPP05
Figure 9: Clock, serial-in, latch, enable, outputs
Timing diagrams
Figure 10: Outputs
DocID15379 Rev 5 13/31
Typical characteristics
6 Typical characteristics
Figure 11: Output current vs Rext resistor
STP16CPP05
Rext (Ω)
23700
11730
6930
4090
2025
1000
667
497
331
Table 10: Output current vs Rext resistor
Output current (mA)
1
2
3
5
10
20
30
40
60
14/31 DocID15379 Rev 5
STP16CPP05 Typical characteristics
Figure 12
: Output current vs ± ΔI
OL
(%) (temp. = 25 °C, V dd
= 5 V, pin = all outputs)
Figure 13: I
SET
vs drop out voltage (V drop
)
DocID15379 Rev 5 15/31
Typical characteristics
Vdd
(V)
3.3
Iset
(mA)
3
5
10
20
40
60
Min
(mV)
35
71
162
347
724
1080
Max
(mV)
Table 11: I
SET
vs drop out voltage (V drop
)
Avg
(mV)
Vdd
(V)
Iset
(mA)
Min
(mV)
37
72
165
348
724
1090
36
71
163
347
724
1080
5.0
3
5
10
20
40
60
37
72
162
345
725
1090
STP16CPP05
Max
(mV)
37
73
164
347
728
1140
Avg
(mV)
37
72
163
346
726
1110
16/31 DocID15379 Rev 5
STP16CPP05
7 Tast circuits
Figure 14: DC characteristic
Tast circuits
Figure 15: AC characteristic
DocID15379 Rev 5 17/31
Tast circuits
Figure 16: Typical application schematic
STP16CPP05
V
L
will be determined by the V
F
of the LEDs.
Test condition:
Temp. = 25 °C, V
DD
= 3.3 V, V
IN
= V
DD
, C
L
= 10 pF, Freq. = 1 MHz, Ch1 = CLK, Ch2 = SDI,
Ch3 = OUTn, Ch4 = V
OUT
Figure 17: Turn ON output current setup
18/31 DocID15379 Rev 5
STP16CPP05
Figure 18: Turn OFF output current setup
Tast circuits
DocID15379 Rev 5 19/31
Package information
8 Package information
STP16CPP05
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
20/31 DocID15379 Rev 5
STP16CPP05
8.1 QSOP-24 package information
Figure 19: QSOP-24 package outline
Package information
DocID15379 Rev 5 21/31
Package information
Dim. c
D
E
E1
A
A1
A2 b e
L h
<
Table 12: QSOP-24 mechanical data mm
Min. Typ.
1.54
0.10
1.62
0.15
1.47
0.20
0.17
8.56
5.80
3.80
0.40
0.25
0°
8.66
6.00
3.91
0.635
0.635
0.33
STP16CPP05
Max.
1.73
0.25
0.31
0.254
8.76
6.20
4.01
0.89
0.41
8°
22/31 DocID15379 Rev 5
STP16CPP05
8.2 SO-24 package information
Figure 20: SO-24 package outline
Package information
DocID15379 Rev 5 23/31
Package information
8.3
Dim.
D
E e
H
A
A1
B
C h
L k ddd
Table 13: SO-24 mechanical data mm
Min. Typ.
2.35
0.10
0.33
0.23
15.20
7.40
1.27
10.00
0.25
0.40
0
TSSOP24 package information
Figure 21: TSSOP24 package outline
STP16CPP05
Max.
2.65
0.30
0.51
0.32
15.60
7.60
10.65
0.75
1.27
8
0.10
24/31 DocID15379 Rev 5
STP16CPP05
Dim. c
D
E e
A
A1
A2 b
H
K
L
0.05
0.19
0.09
7.7
4.3
6.25
0°
0.50
Table 14: TSSOP24 mechanical data mm
Min. Typ.
0.9
0.65 BSC
Package information
Max.
1.1
0.15
0.30
0.20
7.9
4.5
6.5
8°
0.70
DocID15379 Rev 5 25/31
Package information
8.4 TSSOP24 exposed pad package information
Figure 22: TSSOP24 exposed pad package outline
STP16CPP05
26/31 DocID15379 Rev 5
STP16CPP05
Dim.
E1
E2 e
L
L1 k aaa c
D
D1
E
A
A1
A2 b
Package information
Table 15: TSSOP24 exposed pad mechanical data mm
Min. Typ. Max.
0.80
0.19
0.09
7.70
4.80
6.20
4.30
3.00
0.45
1.00
7.80
5.00
6.40
4.40
3.20
0.65
060
1.00
1.20
0.15
1.05
0.30
0.20
7.90
5.2
6.60
4.50
3.40
075
0° 8°
0.10
DocID15379 Rev 5 27/31
Package information
8.5
STP16CPP05
TSSOP24, TSSOP24 exposed pad and SO-24 packing information
Figure 23: TSSOP24, TSSOP24 exposed pad and SO-24 reel outline
28/31
Table 16: TSSOP24 and TSSOP24 exposed pad tape and reel mechanical data mm
Dim.
Min. Typ. Max.
A
C
D
N
T
Ao
Bo
Ko
Po
P
12.8
20.2
60
6.8
8.2
1.7
3.9
11.9
-
-
-
-
-
-
-
-
-
-
330
13.2
22.4
7
8.4
1.9
4.1
12.1
DocID15379 Rev 5
STP16CPP05
Dim.
T
Ao
Bo
Ko
A
C
D
N
Po
P
Table 17: SO-24 tape and reel mechanical data mm
Package information
Min. Typ. Max.
12.8
20.2
60
10.8
15.7
2.9
3.9
11.9
-
-
-
-
-
-
-
-
-
-
330
13.2
30.4
11.0
15.9
3.1
4.1
12.1
DocID15379 Rev 5 29/31
Revision history
9
STP16CPP05
Revision history
Date Revision
Table 18: Document revision history
Changes
11-Feb-2009
22-Oct-2009
10-Jun-2014
08-Apr-2016
09-Mar-2017
1
2
3
4
5
First release
Updated Figure 11 on page 14 and Figure 10 on page 14.
Updated Section 8: Package mechanical data . Added Section 9:
Packaging mechanical data . Minor text changes.
Updated Section 8.1: "QSOP-24 package information" . Minor text changes.
Updated Figure 5: "SDO terminal" ,
Figure 8: "Clock, serial-in, serial-out" and Figure 9: "Clock, serial-in, latch, enable, outputs" .
Minor text changes.
30/31 DocID15379 Rev 5
STP16CPP05
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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2017 STMicroelectronics
– All rights reserved
DocID15379 Rev 5 31/31
