STF16N60M2
Nchannel 600 V, 0.28 Ω typ., 12 A MDmesh™ M2
Power MOSFET in a TO-220FP package
Datasheet - production data
1
2
3
TO-220FP
Figure 1: Internal schematic diagram
D(2)
G(1)
Features
Order code
STF16N60M2
V
DS
600 V
R
DS(on)
max.
0.32 Ω
I
D
12 A
•
Extremely low gate charge
•
Excellent output capacitance (C
OSS
) profile
•
100% avalanche tested
•
Zener-protected
Applications
•
Switching applications
Description
This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology.
Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters.
Order code
STF16N60M2
S(3)
AM15572v1_no_tab
Table 1: Device summary
Marking Package
16N60M2 TO-220FP
Packing
Tube
March 2015 DocID027170 Rev 1
This is information on a product in full production.
1/13 www.st.com
Contents
Contents
STF16N60M2
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 8
4 Package mechanical data ............................................................... 9
4.1
TO-220FP package information ...................................................... 10
5 Revision history ............................................................................ 12
2/13 DocID027170 Rev 1
STF16N60M2
1 Electrical ratings
Symbol
Table 2: Absolute maximum ratings
Parameter
V
GS
I
D
(1)
I
D
(1)
I
DM
(2)
P
TOT
dv/dt
(3) dv/dt
(4)
V
ISO
T stg
T j
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s, T
C
= 25 °C)
Storage temperature
Max. operating junction temperature
Notes:
(1)
Limited only by maximum temperature allowed.
(2)
Pulse width limited by safe operating area.
(3)
I
SD
≤ 12 A, di/dt ≤ 400 A/µs; V
DS peak
< V
(BR)DSS
, V
DD
= 80% V
(BR)DSS.
(4)
V
DS
≤ 480 V.
Symbol
Table 3: Thermal data
Parameter
R thj-case
R thj-amb
Thermal resistance junction-case max.
Thermal resistance junction-ambient max.
Symbol
I
AR
E
AS
Table 4: Avalanche characteristics
Parameter
Avalanche current, repetetive or not repetetive
(pulse width limited by T jmax
)
Single pulse avalanche energy (starting T j
= 25 °C,
I
D
= I
AR
, V
DD
= 50 V)
Electrical ratings
Value
± 25
12
7.6
48
25
15
50
2500
- 55 to 150
150
Unit
V
A
A
A
W
V/ns
V/ns
V
°C
Value
5
62.5
Unit
°C/W
°C/W
Value
2.9
130
Unit
A mJ
DocID027170 Rev 1 3/13
Electrical characteristics
2 Electrical characteristics
(T
C
= 25 °C unless otherwise specified).
Symbol Parameter
Table 5: Static
Test conditions
V
(BR)DSS
I
DSS
I
GSS
Drain-source breakdown voltage
V
GS
= 0 V, I
D
= 1 mA
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 600 V
V
GS
= 0 V, V
DS
= 600 V,
T
C
= 125 °C
Gate-body leakage current V
DS
= 0 V, V
GS
= ±25 V
V
DS
= V
GS
, I
D
= 250 µA V
GS(th)
Gate threshold voltage
R
DS(on)
Static drain-source onresistance
V
GS
= 10 V, I
D
= 6 A
Symbol Parameter
Table 6: Dynamic
Test conditions
C
C
C
R oss
Q iss rss
G g
Q gs
Q gd
C
oss eq.
(1)
Input capacitance
Output capacitance
Reverse transfer capacitance
Equivalent output capacitance
Intrinsic gate resistance
Total gate charge
Gate-source charge
Gate-drain charge
V
DS
= 100 V, f = 1 MHz,
V
GS
= 0 V
V
DS
= 0 V to 480 V, V
GS
= 0 V f = 1 MHz open drain
V
DD
= 480 V, I
D
= 12 A,
V
GS
= 10 V (see Figure 15:
"Gate charge test circuit" )
-
-
-
-
-
STF16N60M2
Min. Typ. Max. Unit
600 V
1 µA
100 µA
3
±10 µA
4 V
0.28 0.32
Ω
2
Min. Typ. Max. Unit
-
-
700
38
-
- pF pF
- 1.2 - pF
140
5.3
19
3.3
9.5
-
-
-
-
-
Notes:
(1)
C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS increases from 0 to 80% V
DSS
.
Symbol Parameter
Table 7: Switching times
Test conditions Min. Typ. Max. Unit t d(on) t r t d(off) t f
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
V
DD
= 300 V, I
D
= 6 A
R
G
= 4.7
Ω, V
GS
= 10 V (see
Figure 14: "Switching times test circuit for resistive load" and Figure 19: "Switching time waveform" )
- 10.5
-
-
9.5
58
- 18.5
-
-
-
- ns ns ns ns pF
Ω nC nC nC
4/13 DocID027170 Rev 1
STF16N60M2
Symbol Parameter
I
SD
Source-drain current
I
SDM
(1)
Source-drain current
(pulsed)
V
SD
(2)
Forward on voltage t rr
Q rr
Reverse recovery time
Reverse recovery charge
I
I
RRM t
Q rr rr
RRM
Reverse recovery current
Reverse recovery time
Table 8: Source-drain diode
Test conditions
Reverse recovery charge
Reverse recovery current
V
GS
= 0 V, I
SD
= 12 A
I
SD
= 12 A, di/dt = 100 A/µs,
V
DD
= 60 V (see Figure 16:
"Test circuit for inductive load switching and diode recovery times" )
I
SD
= 12 A, di/dt = 100 A/µs,
V
DD
= 60 V, T j
= 150 °C (see
Figure 16: "Test circuit for inductive load switching and diode recovery times" )
Electrical characteristics
Min. Typ. Max. Unit
-
-
-
- 316
- 3.25
12
48
1.6
A
A
V ns
µC
- 20.5
-
-
-
454
4.8
21
A ns
µC
A
Notes:
(1)
Pulse width is limited by safe operating area.
(2)
Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
DocID027170 Rev 1 5/13
Electrical characteristics
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area
STF16N60M2
Figure 3: Thermal impedance
Figure 4: Output characteristics
Figure 5: Transfer characteristics
6/13
Figure 6: Normalized gate threshold voltage vs. temperature
Figure 7: Normalized V(BR)DSS vs. temperature
DocID027170 Rev 1
STF16N60M2
Figure 8: Static drain-source on-resistance
Electrical characteristics
Figure 9: Normalized on-resistance vs. temperature
Figure 10: Gate charge vs. gate-source voltage
Figure 11: Capacitance variations
Figure 12: Output capacitance stored energy
Figure 13: Source- drain diode forward characteristics
DocID027170 Rev 1 7/13
Test circuits
3 Test circuits
Figure 14: Switching times test circuit for resistive load
STF16N60M2
Figure 15: Gate charge test circuit
12 V
47 k
Ω
100 nF
1 k
Ω
V
DD
I
G
= CONST
V i
≤ V
GS
100 Ω
D.U.T.
2.7 k
Ω V
G
2200 μ F
47 k
Ω
1 k
Ω
P
W
AM01469v 1
Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit
25
Ω
G
A
D
D.U.T.
S
B
R
G
A
FAST
DIODE
A
B
B
L=100 µH
G
D
D.U.T.
S
3.3
µF
1000
µF
V
DD
AM01470v1
Figure 18: Unclamped inductive waveform
V
(BR)DSS
V
D
V
DD
I
D
I
DM
V
DD
AM01472v 1
0
Figure 19: Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
10% V
DS
V
GS
90%
0
10% AM01473v 1
8/13 DocID027170 Rev 1
STF16N60M2
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
DocID027170 Rev 1 9/13
Package mechanical data
4.1 TO-220FP package information
Figure 20: TO-220FP package outline
STF16N60M2
10/13 DocID027170 Rev 1
7012510_Rev_K_B
STF16N60M2
Dim.
L4
L5
L6
L7
G1
H
L2
L3
Dia
F
F1
F2
G
A
B
D
E
Table 9: TO-220FP mechanical data mm
Min. Typ.
Package mechanical data
Max.
4.4
2.5
2.5
0.45
0.75
1.15
1.15
4.95
2.4
10
16
4.6
2.7
2.75
0.7
1
1.70
1.70
5.2
2.7
10.4
28.6
9.8
2.9
15.9
9
3
30.6
10.6
3.6
16.4
9.3
3.2
DocID027170 Rev 1 11/13
Revision history
5
STF16N60M2
Revision history
Date
24-Mar-2015
Table 10: Document revision history
Revision
1
Changes
Initial release.
12/13 DocID027170 Rev 1
STF16N60M2
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