EMIF08-LCD04M16
8-line L-C IPAD™, EMI filter and ESD protection in Micro QFN
Features
■
■
■
■
■
■
■
■
High cut off frequency low-pass filter:
F
C
= 400 MHz at -6 dB
High efficiency in EMI filtering: better than -35 dB from 900 MHz to 2 GHz
Very low PCB space consuming with plastic micro-package 3.3 x 1.35 mm
Very thin package: 0.55 mm
High efficiency in ESD (IEC 61000-4-2 level 4)
High reliability offered by monolithic integration
High reducing of parasitic elements through integration
ECOPACK
®
2 compliant component
Complies with the following standards
■ IEC 61000-4-2 level 4:
– 15 kV (air discharge)
– 8 kV (contact discharge)
Applications
■
■
■
■
Where EMI filtering in ESD sensitive equipment is required:
LCD and camera for mobile phones
Computers and printers
Communication systems
MCU boards
Micro QFN
3.3 x 1.35 16L
Figure 1.
Device configuration
Low-pass Filter
0 0 0 0
Input
GND GND GND
Output
Description
The EMIF08-LCD04M16 is a 8-line inductorcapacitor (LC) EMI filter designed to suppress
EMI/RFI noise in all systems subjected to electromagnetic interferences requiring a large bandwidth.
This filter includes an ESD protection circuitry, which prevents damage to the application when subjected to ESD surges up 15 kV contact discharge.
November 2009
TM : IPAD is a trademark of STMicroelectronics.
Doc ID 15673 Rev 2 1/10 www.st.com
10
Electrical characteristics EMIF08-LCD04M16
Table 1.
Symbol
V
PP
T op
T j
T stg
Absolute maximum ratings (T amb
Parameter
= 25 °C)
ESD discharge IEC 61000-4-2, contact discharge
Operating temperature range
Maximum junction temperature
Storage temperature range
Figure 2.
Electrical characteristics (definitions)
Symbol
V
BR
I
RM
V
RM
V
CL
R d
I
PP
I
R
α T
V
F
=
=
=
=
=
=
=
=
=
Parameter
Breakdown voltage
Leakage current @ V
RM
Stand-off voltage
Clamping voltage
Dynamic impedance
Peak pulse current
Breakdown current
Voltage temperature coefficient
Forward voltage drop
I I
I I
Value
± 15
-40 to 85
125
-55 to 150
Unit kV
°C
°C
°C
I I
I I
I I
V
BR
I
RM
L
C line
R
F
C
Table 2.
Symbol
Electrical characteristics (T amb
= 25 °C)
Test conditions
I
R
= 1 mA
V
RM
= 3 V per line
Inductance
V
R
= 3 V DC, F = 1 MHz, V osc
= 30 mV
Parasitic resistance of the inductance
50 Ω source and 50 Ω load termination at -6 dB
Min.
17
9
-
6
-
-
Typ.
18
12.5
400
-
-
12
Max.
19
20
-
-
100
-
Unit
V nA nH pF
Ω
MHz
2/10 Doc ID 15673 Rev 2
EMIF08-LCD04M16 Electrical characteristics
Figure 3.
S21 attenuation measurements
0
-30
-35
-40
-45
-50
-55
-60
-65
-5
-10
-15
-20
-25
-70 dB
I2 - O2 #1
I3 O3 #1
I4 O4 #1
I5 O5 #1
I6 - O6 #1
I7 - O7 #1
I8 - O8 #1
100k 1M 10M 100M 1G
F/Hz
Figure 5.
ESD response to IEC 61000-4-2
(+15 kV air discharge)
5V/Div
Figure 4.
Analog crosstalk measurements
F/Hz
Figure 6.
ESD response to IEC 61000-4-2
(-15 kV air discharge)
C2
5V/Div
IN
IN
C2
C3 OUT
OUT
C3
2V/Div
Figure 7.
Line capacitance versus applied voltage
35
C(pF)
30
25
20
15
10
5
0
0 1 2 3 4 5
2V/Div
Doc ID 15673 Rev 2 3/10
Ordering information scheme
2 Ordering information scheme
Figure 8.
Ordering information scheme
EMIF08-LCD04M16
EMIF yy - xxxzz Mxx
EMI Filter
N u m b er of line s
Inform a tion xxx = a pplic a tion zz = ver s ion
P a ck a ge
Mxx = Micro QFN - xx le a d s
4/10 Doc ID 15673 Rev 2
EMIF08-LCD04M16 Package information
Note:
●
●
Epoxy meets UL94, V0
Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
Table 3.
INDEX AREA
(D/2 x E/2)
A
Micro QFN 3.3x1.35 16L dimensions
INDEX AREA
(D/2 x E/2) 1
PIN # 1 ID
L
16
TOP VIEW
D
SIDE VIEW
BOTTOM VIEW e b
D2
8
EXPOSED PAD
9
A1
K
E
E2
Millimeters
Dimensions
Inches Ref.
Min.
Typ.
Max.
Min.
Typ.
Max.
A 0.45
0.50
0.55
0.018
0.020
0.022
A1 0.00
0.02
0.05
0.00
0.0008 0.002
b
D
0.15
0.20
0.25
0.006
0.008
0.010
3.30
0.13
-
D2 2.65
2.80
2.90
0.104
0.110
0.114
E 1.35
0.053
-
E2 0.25
0.40
0.50
0.010
0.016
0.020
e 0.40
0.016
k
L
0.20
0.15
-
0.25
-
0.35
0.008
0.006
-
0.010
-
0.014
Figure 9.
Footprint Figure 10.
Marking
0.40
0.20
0.45
0.40
2.80
3.00
0.85 1.75
XX
WW
Y P
Dot: Pin 1
XX: Marking
WW: Assembly week
Y: Assembly year
P: Assembly plant
Product marking may be rotated by 90° for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin
1 mark is to be used for this purpose.
Doc ID 15673 Rev 2 5/10
Recommendation on PCB assembly
4 Recommendation on PCB assembly
4.1
EMIF08-LCD04M16
Stencil opening design
1.
General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness).
Figure 11.
Stencil opening dimensions
L
T
W b) General design rule
Stencil thickness (T) = 75 ~ 125 µm
Aspect Ratio =
Aspect Area =
W
1.5
T
≥
L ×
2T L
W
+ W
)
≥
0.66
a) Stencil opening thickness: 100 µm b) Stencil opening for central exposed pad: Opening to footprint ratio is 50%.
c) Stencil opening for leads: Opening to footprint ratio is 90%.
Figure 12.
Recommended stencil window position
4 µm 4 µm
14 µm
T=100 µm
6/10
400 µm
400 µm
192 µm
200 µm
2800 µm
14
µm
60 µm
2000 µm
400 µm
60 µm
Doc ID 15673 Rev 2
Footprint
Stencil window
Footprint
EMIF08-LCD04M16 Recommendation on PCB assembly
1.
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste is recommended.
3. Offers a high tack force to resist component movement during high speed.
4. Solder paste with fine particles: powder particle size is 20-45 µm.
4.3 Placement
1.
Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering.
3. Standard tolerance of ± 0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools.
1.
To control the solder paste amount, the closed via is recommended instead of open vias.
2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away.
Doc ID 15673 Rev 2 7/10
Recommendation on PCB assembly EMIF08-LCD04M16
Figure 13.
ST ECOPACK
®
recommended soldering reflow profile for PCB mounting
3°C/s max
3°C/s max
2°C/s recommended
6°C/s max
Note: Minimize air convection currents in the reflow oven to avoid component movement.
8/10 Doc ID 15673 Rev 2
EMIF08-LCD04M16 Ordering information
Table 4.
Ordering information
Order code
EMIF08-LCD04M16
Marking
JA
(1)
Package
µQFN
Weight
6.74 mg
1.
The marking can be rotated by 90° to differentiate assembly location
Base qty Delivery mode
3000 Tape and reel
Table 5.
Date
Document revision history
20-May-2009
10-Nov-2009
Revision
1
2
Changes
Initial release.
Updated
Features on page 1
. Added Figure 2 on page 2 .
Doc ID 15673 Rev 2 9/10
EMIF08-LCD04M16
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