STL200N45LF7
Nchannel 45 V, 1.4 mΩ typ., 120 A STripFET ™ F7
Power MOSFET in a PowerFLAT™ 5x6 package
Datasheet - production data
Figure 1: Internal schematic diagram
Features
Order code V
DS
R
DS(on)
max. I
D
STL200N45LF7 45 V 1.8 mΩ 120 A
Among the lowest R
DS(on)
on the market
Excellent FoM (figure of merit)
Low C rss
/C iss
ratio for EMI immunity
High avalanche ruggedness
Applications
Switching applications
Description
This N-channel Power MOSFET utilizes
STripFET™ F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching.
Order code
STL200N45LF7
Table 1: Device summary
Marking
200N45F7
Package
PowerFLAT™ 5x6
Packing
Tape and reel
June 2016 DocID027980 Rev 4
This is information on a product in full production.
1/14 www.st.com
Contents
Contents
STL200N45LF7
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 8
4 Package information ....................................................................... 9
4.1
4.2
PowerFLAT™ 5x6 type C package information ................................ 9
Pow erFLAT™ 5x6 packing information ........................................... 11
5 Revision history ............................................................................ 13
2/14 DocID027980 Rev 4
STL200N45LF7
1 Electrical ratings
Symbol
V
DS
V
GS
I
D
(1)
I
D
(1)
I
DM
(1)(2)
I
D
(3)
I
D
(3)
I
DM
(2)(3)
P
TOT
(1)
P
TOT
(3)
T stg
T j
Table 2: Absolute maximum ratings
Parameter
Drain-source voltage
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Drain current (continuous) at T pcb
= 25 °C
Drain current (continuous) at T pcb
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Total dissipation at T pcb
= 25 °C
Storage temperature range
Operating junction temperature range
Notes:
(1)
This value is rated according to R thj-case
and limited by package
(2)
Pulse width limited by safe operating area
(3)
This value is rated according to R thj-pcb
Symbol
Table 3: Thermal data
Parameter
R thj-case
R
thj-pcb
(1)
Thermal resistance junction-case
Thermal resistance junction-pcb
Notes:
(1)
When mounted on FR-4 board of 1 inch², 2 oz Cu
Electrical ratings
Value
36
25.7
144
150
4.8
45
± 20
120
120
480
-55 to 175
Unit
A
A
A
W
W
V
V
A
A
A
°C
Value
1
31.3
Unit
°C/W
°C/W
DocID027980 Rev 4 3/14
Electrical characteristics
2 Electrical characteristics
STL200N45LF7
T
C
= 25 °C unless otherwise specified
Symbol Parameter
Table 4: On/off-state
Test conditions
V
(BR)DSS
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 250 µA 45
V
I
I
DSS
GSS
GS(th)
Zero gate voltage drain current
Gate body leakage current
Gate threshold voltage
V
GS
= 0 V, V
DS
= 45 V
V
DS
= 0, V
GS
= 20 V
V
DS
= V
GS
, I
D
= 250 µA 1.2
R
DS(on)
Static drain-source on-resistance
V
GS
= 10 V, I
D
= 18 A
V
GS
= 4.5 V, I
D
= 18 A
Symbol Parameter
Table 5: Dynamic
Test conditions
1.4
2
1
V
µA
100 nA
V
1.8 mΩ
2.5 mΩ
Min. Typ. Max. Unit
C iss
C oss
C rss
R g
Q g
Q gs
Q gd
Input capacitance
Output capacitance
Reverse transfer capacitance
Intrinsic gate resistance
Total gate charge
Gate-source charge
Gate-drain charge
V
DS
= 25 V, f = 1 MHz,
V
GS
= 0 V f = 1 MHz, I
D
= 0 A
V
DD
= 22.5 V, I
D
= 36 A
V
GS
= 4.5 V,
see Figure 14: "Test circuit for gate charge behavior"
Min. Typ. Max. Unit
-
-
5170
1190
- 68
0.5 0.9
-
-
33
15
- 10
-
-
-
2
-
-
- pF pF pF
Ω nC nC nC
Symbol Parameter t d(on)
Turn-on delay time t r
Rise time t d(off)
Turn-off delay time t f
Fall time
Table 6: Switching times
Test conditions
V
DD
= 22.5 V, I
D
= 18 A,
R
G
= 4.7 Ω
V
GS
= 10 V (see Figure
13: "Test circuit for resistive load switching times" and Figure 18:
"Switching time waveform" )
Min. Typ. Max. Unit
-
-
-
25
6
58
-
-
- ns ns ns
- 7 - ns
4/14 DocID027980 Rev 4
STL200N45LF7
Symbol Parameter
V
SD
(1)
Forward on voltage t rr
Reverse recovery time
Table 7: Source-drain diode
Test conditions
I
SD
= 36 A, V
GS
= 0 V
I
D
= 36 A, di/dt = 100 A/µs,
Q rr
I
RRM
Reverse recovery charge
Reverse recovery current
V
DD
= 36 V, (see Figure 15: "Test circuit for inductive load switching and diode recovery times" )
Electrical characteristics
Min. Typ. Max. Unit
-
-
-
-
48
55
2.3
1.1 V ns nC
A
Notes:
(1)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
DocID027980 Rev 4 5/14
Electrical characteristics
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area
STL200N45LF7
Figure 3: Thermal impedance
Figure 4: Output characteristics Figure 5: Transfer characteristics
6/14
Figure 6: Gate charge vs gate-source voltage
Figure 7: Static drain-source on-resistance
DocID027980 Rev 4
STL200N45LF7
Figure 8: Capacitance variations
Electrical characteristics
Figure 9: Normalized gate threshold voltage vs temperature
Figure 10: Normalized on-resistance vs temperature
Figure 11: Normalized V(BR)DSS vs temperature
Figure 12: Source-drain diode forward characteristics
DocID027980 Rev 4 7/14
Test circuits
3 Test circuits
Figure 13: Test circuit for resistive load switching times
STL200N45LF7
Figure 14: Test circuit for gate charge behavior
8/14
Figure 15: Test circuit for inductive load switching and diode recovery times
Figure 16: Unclamped inductive load test circuit
Figure 17: Unclamped inductive waveform
Figure 18: Switching time waveform
DocID027980 Rev 4
STL200N45LF7
4
4.1
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
PowerFLAT™ 5x6 type C package information
Figure 19
: PowerFLAT™ 5x6 type C package outline
Bottom view
Side view
DocID027980 Rev 4
Top view
8231817_typeC_A0ER_Rev14
9/14
Package information
Dim.
D4
D5
D6 e
E
E2
E3
C
D
D2
D3
A
A1
A2 b
E4
E5
E6
E7
K
L
L1
θ
Table 8: PowerFLAT™ 5x6 type C package mechanical data
STL200N45LF7 mm
Min. Typ. Max.
0.80
0.02
0.25
1.00
0.05
0.30
5.80
5.00
4.15
4.05
4.80
0.25
0.15
6.00
5.20
4.20
5.00
0.40
0.30
1.27
6.15
0.50
6.20
5.40
4.45
4.35
5.20
0.55
0.45
5.95
3.50
2.35
0.40
0.08
0.20
0.75
1.05
0.725
0.05
0°
0.325
0.90
0.15
6.35
3.70
2.55
0.60
0.28
0.45
1.05
1.35
1.025
0.25
12°
10/14 DocID027980 Rev 4
STL200N45LF7 Package information
Figure 20
: PowerFLAT™ 5x6 recommended footprint (dimensions are in mm)
4.2
8231817_FOOTPRINT_rev14
PowerFLAT™ 5x6 packing information
Figure 21 : PowerFLAT™ 5x6 tape (dimensions are in mm)
DocID027980 Rev 4 11/14
Package information STL200N45LF7
Figure 22
: PowerFLAT™ 5x6 package orientation in carrier tape
Figure 23 : PowerFLAT™ 5x6 reel
12/14 DocID027980 Rev 4
STL200N45LF7
5 Revision history
Date
17-Jun-2015
03-Mar-2016
01-May-2016
10-Jun-2016
Revision
1
2
3
4
Table 9: Document revision history
Changes
Revision history
First release.
Modified: title, R
DS(on) max
and I
D
value in cover page.
Modified: Table 2: "Absolute maximum ratings", Table 4: "On/offstate", Table 5: "Dynamic", Table 6: "Switching times" and Table 7:
"Sourcedrain diode".
Added: Section 3.1: "Electrical characteristics (curves)".
Modified: Section 5.1: "PowerFLAT™ 5x6 type C package information".
Minor text changes
Updated Table 4: "On/off-state" , Table 5: "Dynamic" , Table 6:
"Switching times" and Table 7: "Source-drain diode" .
Minor text changes.
Document status promoted from preliminary to production data.
DocID027980 Rev 4 13/14
STL200N45LF7
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14/14 DocID027980 Rev 4
