STD36P4LLF6
Pchannel 40 V, 0.0175 Ω typ.,36 A, STripFET™ F6
Power MOSFET in a DPAK package
Datasheet - production data
Features
Order code
STD36P4LLF6
V
DS
R
40 V
DS(on)
max. I
D
P
TOT
0.0205 Ω
36 A 60 W
•
Very low on-resistance
•
Very low gate charge
•
High avalanche ruggedness
•
Low gate drive power loss
Figure 1: Internal schematic diagram
D(2, TAB)
G(1)
Order code
STD36P4LLF6
S(3)
Applications
•
Switching applications
Description
This device is a P-channel Power MOSFET developed using the STripFET™ F6 technology, with a new trench gate structure. The resulting
Power MOSFET exhibits very low R
DS(on)
in all packages.
For the P-channel Power MOSFET, current polarity of voltages and current have to be reversed.
AM11258v1
Table 1: Device summary
Marking Package Packaging
36P4LLF6 DPAK Tape and reel
March 2015 DocID025616 Rev 2
This is information on a product in full production.
1/16 www.st.com
Contents
Contents
STD36P4LLF6
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 8
4 Package information ....................................................................... 9
4.1
4.2
DPAK (TO-252) type A2 package information................................. 10
Packing information ......................................................................... 13
5 Revision history ............................................................................ 15
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STD36P4LLF6
1
Electrical ratings
Electrical ratings
Symbol
Table 2: Absolute maximum ratings
Parameter
V
DS
V
GS
I
D
I
D
I
DM
(1)
P
TOT
T stg
T j
Drain-source voltage
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T c
= 25 °C
Storage temperature
Maximum junction temperature
Value
40
± 20
36
26
144
60
-55 to 175
175
Notes:
(1)
Pulse width limited by safe operating area.
Symbol
Table 3: Thermal data
Parameter
R thj-case
Thermal resistance junction-case max
Value
2.5
Unit
°C/W
For the P-channel Power MOSFET, current polarity of voltages and current have to be reversed.
Unit
V
V
A
A
A
W
°C
°C
DocID025616 Rev 2 3/16
Electrical characteristics
2
STD36P4LLF6
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Symbol Parameter
Table 4: Static
Test conditions
V
(BR)DSS
Drain-source breakdown voltage
V
GS
= 0 V, I
D
= 250 µA
I
DSS
Zero gate voltage Drain current
V
GS
= 0 V, V
DS
= 40 V
V
GS
= 0 V, V
DS
= 40 V,
T
C
= 125 °C
I
GSS
Gate-body leakage current
V
GS(th)
Gate threshold voltage
V
DS
= 0 V, V
GS
= ± 20 V
R
DS(on)
Static drain-source onresistance
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 18 A
V
GS
= 4.5 V, I
D
= 18 A
Table 5: Dynamic
Test conditions Symbol
C iss
C oss
C
Q
Q
Q rss g gs gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
V
DS
= 25 V, f = 1 MHz,
V
GS
= 0 V
V
DD
= 20 V, I
D
= 36 A,
V
GS
= 4.5 V (see Figure 14:
"Gate charge test circuit" )
R
G
Gate input resistance
I
D
= 0 A, gate DC bias = 0 V, f = 1 MHz, magnitude of alternative signal = 20 mV
Table 6: Switching times
Test conditions
Min. Typ.
40
1
Max. Unit
1
10
±100 nA
2.5
0.0175 0.0205
V
Ω
0.024 0.029
Min. Typ.
-
-
2850
270
-
-
-
-
-
180
22
9.4
7.3
1.4
Max. Unit
-
- pF pF
-
-
-
-
-
V
µA
µA pF nC nC nC
Ω
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
V
DD
= 20 V, I
D
= 18 A
R
G
= 4.7
Ω, V
GS
= 10 V
(see Figure 13: "Switching times test circuit for resistive load" )
Min. Typ.
-
-
-
-
43
47
148
19
Max. Unit
-
-
-
- ns ns ns ns
For the P-channel Power MOSFET, current polarity of voltages and current have to be reversed.
4/16 DocID025616 Rev 2
STD36P4LLF6
Symbol Parameter
V
SD
(1)
Forward on voltage t rr
Q rr
Reverse recovery time
Reverse recovery charge
I
RRM
Table 7: Source drain diode
Test conditions
Reverse recovery current
V
GS
= 0 V, I
SD
= 18 A
I
SD
= 36 A, di/dt = 100 A/µs,
V
DD
= 32 V, T j
= 150 °C
(see Figure 15: "Test circuit for inductive load switching and diode recovery times" )
Electrical characteristics
Min. Typ.
-
-
-
26
21
- 1.7
Max. Unit
1.1 V ns nC
A
Notes:
(1)
Pulse test: pulse duration = 300 µs, duty cycle 1.5%
For the P-channel Power MOSFET, current polarity of voltages and current have to be reversed.
DocID025616 Rev 2 5/16
Electrical characteristics
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area
STD36P4LLF6
Figure 3: Thermal impedance
Figure 4: Output characteristics Figure 5: Transfer characteristics
6/16
Figure 6: Normalized gate threshold voltage vs temperature
Figure 7: Normalized V(BR)DSS vs temperature
DocID025616 Rev 2
STD36P4LLF6
Figure 8: Static drain-source on-resistance
Electrical characteristics
Figure 9: Normalized on-resistance vs. temperature
Figure 10: Gate charge vs gate-source voltage
Figure 11: Capacitance variations voltage
Figure 12: Source-drain diode forward characteristics
DocID025616 Rev 2 7/16
Test circuits
3 Test circuits
Figure 13: Switching times test circuit for resistive load
STD36P4LLF6
Figure 14: Gate charge test circuit
Figure 15: Test circuit for inductive load switching and diode recovery times
8/16 DocID025616 Rev 2
STD36P4LLF6
4
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
DocID025616 Rev 2 9/16
Package information
4.1 DPAK (TO-252) type A2 package information
Figure 16: DPAK (TO-252) type A2 package outline
STD36P4LLF6
10/16 DocID025616 Rev 2
STD36P4LLF6
Dim. e1
H
L
L1
D1
E
E1 e
L2
L4
R
V2 b4 c c2
D
A
A1
A2 b
Table 8: DPAK (TO-252) type A2 mechanical data
Package information mm
Min. Typ. Max.
4.95
6.40
5.10
2.16
4.40
9.35
1.00
2.60
0.65
0.60
2.20
0.90
0.03
0.64
5.20
0.45
0.48
6.00
0°
5.10
5.20
2.28
2.80
0.80
0.20
5.25
6.60
5.30
2.40
4.60
10.10
1.50
3.00
0.95
1.00
2.40
1.10
0.23
0.90
5.40
0.60
0.60
6.20
8°
DocID025616 Rev 2 11/16
Package information STD36P4LLF6
Figure 17: DPAK (TO-252) recommended footprint (dimensions are in mm)
12/16 DocID025616 Rev 2
STD36P4LLF6
4.2 Packing information
Figure 18: Tape for DPAK (TO-252)
T
Top cover tape
10 pitches cumulative tolerance on tape +/- 0.2 mm
P0 D P2
Package information
F
E
W
B1
K0
B0
For machine ref. only including draft and radii concentric around B0
A0 P1
User direction of feed
D1
User direction of feed
R
Bending radius
AM08852v1
DocID025616 Rev 2 13/16
Package information
Figure 19: Reel for DPAK (TO-252)
STD36P4LLF6
T
40mm min.
access hole at slot location
D
B
C
A
N
G measured at hub
Full radius
Tape slot in core for tape start
2.5mm min.width
Dim.
K0
P0
P1
P2
R
T
W
A0
B0
B1
D
D1
E
F
1.5
1.5
1.65
7.4
2.55
3.9
7.9
1.9
40
0.25
15.7
Table 9: DPAK (TO-252) tape and reel mechanical data
Tape Reel mm
Dim.
Min.
6.8
10.4
Max.
7
10.6
12.1
1.6
1.85
7.6
2.75
4.1
8.1
2.1
A
B
C
D
G
N
T
Base qty.
Bulk qty.
Min.
1.5
12.8
20.2
16.4
50
0.35
16.3 mm
AM06038v1
Max.
330
13.2
18.4
22.4
2500
2500
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STD36P4LLF6
5
Revision history
Revision history
Date Revision
Table 10: Document revision history
Changes
10-Dec-2013
24-Mar-2015
1
2
First revision.
Text edits throughout document
On cover page, updated title, applications, description and features table
Updated Table 4: Static
Updated Table 5: Dynamic
Updated Table 6: Switching times
Updated Table 7: Source-drain diode
Added Section 2.1: Electrical characteristics (curves)
Minor text changes
DocID025616 Rev 2 15/16
STD36P4LLF6
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