STMicroelectronics IPS1025HF Datasheet
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IPS1025HF
Datasheet
High efficiency, high-side switch with extended diagnostics, smart driving for capacitive loads and short propagation delay at power-on
Product status link
IPS1025HF
Product label
Features
• 8 V to 60 V operating supply voltage range
• Smart driving of capacitive load
• Under-voltage lock-out
• V
CC
over-voltage protection
• Fast demagnetization of inductive loads
• Overload and over-temperature protection
• Case over-temperature protection
• Overload event diagnostic pin
• Over-temperature event diagnostic pin
• Ground disconnection protection
• Designed to meet IEC 61000-4-2, IEC 61000-4-4, IEC 61000-4-5
• Package PowerSSO-24
Applications
• Programmable logic control
• Vending machines
• Industrial PC peripheral input/output
• Numerical control machines
• General high-side switch applications
Description
The IPS1025HF is a single high-side switch IC able to drive capacitive, resistive or inductive loads with one side connected to ground.
The 60 V operating range and R
DS-ON
= 12 mΩ (typ.), combined with the extended diagnostic (Over Load, Over-temperature) and the < 85 us propagation delay time at startup (enabling Class 3 for interface types C and D), make the IC suitable for applications implementing the proper architectures to address higher SIL levels.
The very low R
DS-ON
(≤ 25 mΩ up to T
J
= 125 °C) makes the IC suitable for the applications with up to 2.4 A/5.6 A steady state operating current.
The output channel is protected against junction over-temperature events by a junction temperature sensor, and a further temperature sensor is included to monitor case temperature, so the overheated output channel can only be turned back ON when the case temperature returns below the reset temperature.
The embedded overload protection circuit monitors the output current and, on triggering of the activation threshold (I
PK
), starts modulating the impedance of the output switch to limit the output current to I
LIM
, for both IC and load protection.
The IC offers two different sets of activation threshold and limitation levels (I
PKH
,
I
LIMH
and I
PKL
, I
LIML
) for smart driving of capacitive loads (such as bulb lamps) and loads with initial peak current requirements.
The IC diagnostics is based on FLT
1
and FLT
2
pins (both current source); activated by respective overload or overtemperature events on the output channel.
DS13869 - Rev 1 - March 2022
For further information contact your local STMicroelectronics sales office.
www.st.com
1
Block diagram
FLT
X
IN
I
PD
X2
CONTROL
LOGIC
Figure 1. IPS1025HF block diagram
V
CC
UNDERVOLTAGE
LOCKOUT
V
CC
CLAMP
OUTPUT CLAMP
CURRENT LIMITATION
JUNCTION TEMP
DETECTION
R
PD
CASE TEMP
DETECTION
GND
IPS1025HF
Block diagram
OUT
DS13869 - Rev 1 page 2/28
2
IPS1025HF
Pin connection
Pin connection
Figure 2. Pin connections (top through view)
VCC
NC
NC
FLT
2
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
8
9
10
11
12
6
7
4
5
1
2
3
V
CC
17
16
15
14
13
21
20
19
18
24
23
22
GND
IN
I
PD
FLT
1
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
Table 1. Pin descriptions
Pin no.
1, exposed pad
Pin name
VCC Supply voltage
2,3
4
5 to 20
21
N.C.
FLT2
OUT
FLT1
Not connected
Overload event diagnostic pin
Power stage output channel
Over-temperature event diagnostic pin
22
23
24
Type
IPD
IN
Initial current duration / level selector.
Connect to GND by a capacitor to set duration of I
PKH
(see Overload and Table 6).
Connect to IN pin by a 220 kΩ resistor to disable initial I
PKH
threshold (the over-current limit is only
I
PKL
).
Connect to GND by a 10 kΩ resistor to disable I
PKL
(the over-current threshold is only I
PKH
).
Note: Leaving I
PD
floating is equivalent to a 1 µs duration for I
PKH
.
Input
GND Device ground
DS13869 - Rev 1 page 3/28
3
IPS1025HF
Absolute maximum ratings
Absolute maximum ratings
Absolute maximum ratings are the values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltages are referenced to GND.
Table 2. Absolute maximum ratings
Symbol
V
CC
I
CC
I
OUT
-I
OUT
V
IN
I
IN
V
PD
I
PD
V
FAULT
I
FAULT
Supply Voltage
Maximum DC reverse current (from GND to V
Output stage current
Reverse current (from OUT to V
IN pin voltage
IN pin current
I
PD
I
PD
pin voltage
pin current
FLT pins voltage
Parameter
CC
)
CC
)
E
AS
P
TOT
T
STG
T
J
T
C
FLT pins current
Single pulse avalanche energy
(T
AMB
= 125 °C, V
CC
= 24 V, I
OUT
= 2 A)
Power Dissipation at T
C
= 25 °C
Storage Temperature Range
Junction Operating Temperature
Case Operating Temperature
1. intended as worst case when IC is in normal operation (no fault)
Value
-0.3 to 65
-250
Internally limited
5
-0.3 to V
CC
-10/+10
-0.3 to 5.5
-1/+10
-0.3 to 5.5
-1
/+10
14
Internally limited
-55 to 150
Internally limited
-40 to 150
Unit
V mA
A
A
V mA
V mA
V mA
J
W
°C
°C
°C
DS13869 - Rev 1 page 4/28
4
IPS1025HF
Thermal data
Thermal data
Table 3. Thermal data
Symbol
R th(JC)
R th(JA)
Parameter
Thermal resistance junction-case per channel
Thermal resistance junction-ambient
1. Rth between the die and the bottom case surface measured by cold plate as per JESD51.
2. JESD51-7.
Value
0.7
22
Unit
°C/W
°C/W
DS13869 - Rev 1 page 5/28
5
IPS1025HF
Electrical characteristics
Electrical characteristics
(8 V < V
CC
< 60 V; -40 °C < T
J
< 125 °C, unless otherwise specified)
Symbol
V
UVON
V
UVOFF
V
UVH
Parameter
Under-voltage ON threshold
Under-voltage OFF threshold
Under-voltage hysteresis
I
SOFF
Supply current in OFF state
I
SON
Supply current in ON state
Table 4. Supply
Test Conditions
-
-
-
V
CC
= 24 V, IN = GND, OUT = open load;
V
CC
= 36 V, IN = GND, OUT = open load;
V
CC
= 60 V, IN = GND, OUT = open load;
V
CC
= 24 V, IN = 5 V, OUT = open load;
V
CC
= 36 V, IN = 5 V, OUT = open load;
V
CC
= 60 V, IN = 5 V, OUT = open load;
Symbol Parameter
R
DSON
On-state resistance
V
OUT(OFF)
I
OUT(OFF)
OFF state output voltage
OFF state output current
Table 5. Output stage
Test Conditions
V
CC
= 24 V, R
LOAD
= 12 Ω,
@ T
J
= 25 °C
V
CC
= 24 V, R
LOAD
= 12 Ω,
@ T
J
= 125 °C
V
IN
= 0 V and I
OUT
= 0 A
V
IN
= 0 V, V
OUT
= 0 V
0.28
0.28
0.29
1.05
Min.
Typ.
Max.
Unit
7.4
8.5
V
6.5
-
0.7
0.95
7.8
-
V
V
1.15
1.35
-
-
-
-
-
-
0.64
0.64
0.685
2.25
2.35
2.55
mA mA mA mA mA mA
-
-
-
Min.
Typ.
Max.
Unit
12 15 mΩ
-
-
25
2
10 mΩ
V
µA
Table 6. Switching
(V
CC
= 24 V; -40 °C < T
J
< 125 °C, R
LOAD
= 12 Ω, input rise time < 0.1 µs)
Symbol Parameter Test Conditions t r t f
Rise time
Fall time t
PD(L-H) t
PD(H-L)
Propagation delay time IN to OUT, low to high
Propagation delay time IN to OUT, high to low td(Vccon) Propagation delay time IN to OUT at power-on V
IN
= V
CC
and rising from 0 to 24 V
Min. Typ. Max. Unit
-
-
-
30
25
13
60
60
25
µs
µs
µs
-
5
60 100 µs
60 µs
DS13869 - Rev 1 page 6/28
DS13869 - Rev 1
IPS1025HF
Electrical characteristics
VCC
24V
Figure 3. Timing
VCC = VIN
24V t
V
UVON
Vin
50% t t
V
OUT
90%
80%
10%
V
OUT
50% t
PD(L-H) tr t
PD(H-L) tf t t
D(VCCON) t
Symbol
V
IL
V
IH
V
I(HYST)
I
IN
Parameter
Input pin low level voltage
Input pin high level voltage
Input pin hysteresis voltage
Input pin current
Table 7. Input pin (IN)
Test Condition
-
-
-
V
IN
= V
CC
= 36 V
V
IN
= V
CC
= 60 V
Min.
-
2.2
-
-
-
Typ.
-
-
0.4
-
-
Max.
0.8
-
-
200
600
Unit
V
V
V
µΑ
Symbol
IH
FLT
IL
FLT
BT
FLT
VCL
FLT
Table 8. Diagnostic pins (FLT
1
, FLT
2
)
Parameter
Diagnostic pins source current in fault condition.
Diagnostic pins leakage current
Diagnostic pins blanking time
Diagnostic pins clamp voltage
Test Condition
V
FLT
= 1 V
(fault condition active)
V
FLT
= 5 V
(fault condition active)
Normal operation
V
CC
= 60 V
-
I
FLT
= +1 mA
I
FLT
= -1 mA
Min.
Typ.
Max.
Unit
-2.0
-4.0
mA
-0.4
-1.0
0
60
6
-
-25
-
6.8
-
400
8
0.7
µA
µs
V page 7/28
DS13869 - Rev 1
IPS1025HF
Electrical characteristics
Table 9. Protections and diagnostics
Symbol
I
LIMH
Parameter
Initial over-current limitation level
Test Condition Min.
Overload with Dual Threshold Protection: I
PD
pin to GND by C with dual threshold
PD
(470 pF ≤ C
PD
≤ 470 nF); see Overload protection
I
PKH
Initial over-current activation threshold
15.4
A
6.25
Typ.
9.0
Max.
11.75
Unit
A
D
PK
Time limit of Initial over-current 215*C
PD
[nF] µs
I
I
PKL
LIML
Steady state over-current activation threshold
Steady state over-current limitation level
V
CC
= 24 V
-
2.5
8.0
3.5
-
4.5
A
A
I
I
HYS
LIML-OFF
Steady state output Current limitation hysteresis
Steady state over-current limitation deactivation threshold
-
-
I
LIML
0.3
- I
HYS
-
-
Overload with Single Level (Lowest) Protection: I
PD with single (low) threshold
pin connected to IN by 10 kΩ resistor; see Overload protection
A
A
I
I
I
I
PKL
LIML
HYS
LIML-OFF
Steady state over-current activation threshold
Steady state over-current limitation level
Steady state output Current limitation hysteresis
Steady state over-current limitation deactivation threshold
V
CC
= 24 V
-
2.5
-
-
I
8.0
3.5
0.3
LIML
-I
HYS
-
4.5
-
-
A
A
A
A
Overload with Single Level (Highest) Protection: I
PD with single (high) threshold.
pin connected to GND by 10 kΩ resistor; see Overload protection
I
I
PKH
LIMH
Initial over-current activation threshold
Initial over-current limitation level
V
CC
= 24 V
-
6.25
15.4
9.0
-
11.75
A
A
Over-temperature protections
T
JSD
Junction temperature shutdown
T
JR
Junction temperature reset
T
JHYS
Junction temperature hysteresis
Case temperature shutdown T
CSD
T
CR
T
CHYS
Case temperature reset
Case temperature hysteresis
Ground disconnection/Wire break
-
-
-
-
-
150
-
-
-
-
-
170
150
20
130
110
20
190
-
-
-
-
-
°C
°C
°C
°C
°C
°C
I
LGND
GND disconnection output current
V
INX
= 24 V,
V
CC
= 24 V,
V
OUT
= 0 V
0.5
mA page 8/28
IPS1025HF
Electrical characteristics
Symbol Parameter
V
CC
over-voltage
V
CLAMP
V
CC
Clamp Voltage
Demagnetization of inductive load
V
DEMAG
Demagnetization Voltage
Test Condition
I
CC
≤ 10 mA
Min.
65.5
Typ.
70.0
Max.
73.5
Unit
V
I
OUT
= 0.5 A, Load ≥ 10 mH Vcc-76 Vcc-72.5
Vcc-68 V
Figure 4. High (left) and Low (right) I
LOAD
control activation thresholds (I
PK
) and limitation levels (I
LIM
)
I
LOAD
I
PKH
I
LOAD
I
LIMH t < D
PK
T
J
< T
JSD
I
PKL
I
LIML t < D
PK
T
J
< T
JSD
1 1
DS13869 - Rev 1 page 9/28
6
IPS1025HF
Output Logic
Output Logic
Table 10. Output stage truth table
(L = pin voltage Low, H = pin voltage High, X = not determined)
Condition
Normal Operation
Overload protection
Junction over-temperature protection (see
)
Case over-temperature protection (see
UVLO
1. Pin voltage = I
OUT
* R
LOAD
Figure 5. Typical application diagram with opto-couplers
OPTO
BARRIER
L
H
L
H
L
H
IN OUT
L
H
L
H
L
H
L
X
L
L
L
L
L
L
V
DD MCU_IN
VCC
OUT
Logic Side
Supply
IN
MCU IC
V
DD
FLT
X
FLT1
L
L
L
L
X
X
L
H
L
H
FLT2
L
L
L
H
L
L
L
L
X
X
Process Side
Supply
I
PD
GND
MCU_FLT
X x2
DS13869 - Rev 1 page 10/28
IPS1025HF
Output Logic
Logic Side
Supply
V
DD
MCU
Figure 6. Typical application diagram without opto-couplers
VCC
OUT
MCU_IN
IN
IC
MCU_FLT FLT
X
I
PD
GND x2
Process Side
Supply
DS13869 - Rev 1 page 11/28
7
7.1
7.2
IPS1025HF
Protections and diagnostic
Protections and diagnostic
The IC integrates several protections to help the design of robust applications.
Under-voltage lock-out
The IC is turned off if the voltage on V
CC
pin falls below the turn-off threshold (V
UVOFF
). Normal operation restarts after V
CC
exceeds the turn-on threshold (V
UVON
). Turn-on and turn-off thresholds are defined in
.
Over-temperature
The device is protected against overheating in case of overload conditions. During the driving period (when the
MCU is forcing the IN pin high), if the output is overloaded, the device suffers two different thermal stresses: one related to the junction temperature of each output channel, and the other related to the whole case temperature.
The two thermal faults (Thermal Junction and Thermal Case) have different trigger thresholds: T
JSD
and T respectively.
CSD
,
Usually, in thermal stress conditions due to overload, the junction thermal shutdown is the first protection that is activated: the output channel (OUT) is turned off when its junction temperature (T
J
) is higher than the activation threshold (T
JSD
) and turned back on when it falls below the reset threshold (T
JR
). This behavior continues while overload on the output persists. When the thermal protection is active, the FLT
1
(current source) becomes active accordingly.
If the thermal protection is active and the temperature of the case (T
C
) increases over the case protection threshold (T
CSD
), then the thermal case protection is activated and the output is switched off until the junction temperature and case temperature fall below their respective reset thresholds (T
CR active even when thermal case events occur.
and T
JR
). The FLT
1
pin is
Figure 7 shows the thermal protection behavior, while Figure 8
shows typical temperature trends and output vs.
input state.
DS13869 - Rev 1 page 12/28
DS13869 - Rev 1
Figure 7. Thermal protection flowchart
IPS1025HF
Over-temperature
Figure 8. Thermal protection plot page 13/28
7.3
7.3.1
IPS1025HF
Overload
Overload
The IC integrates an overload protection circuit consisting of an output current sensing section and an output current limitation section.
When the output channel is ON, the sensing circuitry monitors the current supplied to the load: if the activation threshold (I
PK
) is triggered, then the current limitation control circuitry is activated to limit output current to the current limitation level (I
LIM
) and FLT
2
pin is activated until the overload condition is removed.
Note that while the output channel operates below its activation threshold, the power dissipation can be calculated by R
ON
* I
OUT
2 , but when the current limitation circuit is activated, power dissipation increases and can be calculated by V
DS
* I
OUT
, where V
DS
is the voltage drop between the OUT and V
CC
pins of the IC. In order to protect the IC against thermal stress, the over-temperature protection is always active and retains the highest priority.
Overload protection with dual threshold
This case is activated when the pin I
PD
is connected to GND by a capacitor (C
PD
) and the IC works with two activation thresholds I
PKH
and I
PKL
.
The I
PKH
is active only in the limited time frame between the L-H transition of the IN signal and the D
PK defined by the following design rule:
delay
DPK µs = 215 × CPD nF
The above design rule is valid in the range 470 pF ≤ C
PD
≤ 470 nF (see
).
If the I
PKH
is triggered within the D
PK
time frame, then the output current is limited to I
LIMH
.
After D
PK
has elapsed, the IC operates with I
PKL
activation threshold and I
LIML
limitation level, respectively.
DS13869 - Rev 1 page 14/28
IPS1025HF
VCC disconnection protection
Figure 9. Short-circuit behavior with dual threshold (T
CASE
< T
CSD
)
7.3.2
Note:
7.3.3
7.4
Overload protection with single (low) threshold
The user can set the activation threshold to I
PKL pin with a 220 KΩ resistor.
and the limitation level to I
LIML
by connecting the I
PD
pin to the IN
This condition is equivalent to setting D
PK
= 0 μs.
Leaving I
PD
floating is equivalent to having an initial peak duration of 1 μs.
Overload protection with single (high) threshold
The user can set the activation threshold to I
PKH with a 10 KΩ resistor.
and the limitation level to I
LIMH
by connecting the I
PD
pin to GND
V
CC
disconnection protection
V
CC
disconnection involves the disconnection of the module from the supply line. When this condition is detected, the output channel can be driven normally until the voltage on V
CC
pin remains higher than the UVLO threshold.
In case of inductive load, if the V
CC
is disconnected while the channel is active, the energy stored in the inductance is discharged through the power switch thanks to the integrated demagnetization circuit.
DS13869 - Rev 1 page 15/28
7.5
IPS1025HF
GND disconnection protection
GND disconnection protection
GND disconnection is the disconnection of the module from the reference line. When this condition occurs, the output channel is turned off regardless of the input status.
When this event occurs, the IC continues working normally until the voltage between V
CC results ≥ V
UVOFF
and GND pins of the IC
. The voltage on the GND pin of the IC rises up to the supply rail voltage level. In case of a GND disconnection event, a current (I
LGND
) flows through OUT pin.
For an inductive load, if the GND is disconnected while the output channel is active, the current flows through the power, which is activated by an active clamp as if the input had been deactivated.
Figure 10. Ground disconnection
APPLICATION BOARD
V
CC
SUPPLY RAIL
V
CC
IC
.
.
.
OUT
.
.
.
R
LOAD
GROUND PLANE
P GND
DS13869 - Rev 1 page 16/28
8
IPS1025HF
Active clamp
Active clamp
Active clamp is also known as Fast Demagnetization of inductive loads or Fast Current Decay. When a high-side driver turns off an inductance, an under-voltage on output is detected.
The OUT pin is pulled-down to V
CC
-V
DEMAG
. The conduction state is modulated by an internal circuitry in order to keep the OUT pin voltage at ~V
DEMAG
until the load energy has been dissipated. The energy is dissipated in both
IC internal switch and load resistance.
Figure 11. Active clamp equivalent principle schematic
APPLICATION BOARD
SUPPLY RAIL
V
CC
IC
.
.
.
OUT
R
PD .
.
.
L
LOAD
GROUND PLANE
PGND
Figure 12. Typical demagnetization energy (single pulse) at V
CC
= 24 V and T
AMB
= 125 °C
DS13869 - Rev 1 page 17/28
9
9.1
IPS1025HF
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
Package mechanical data
Figure 13. PowerSSO-24 package dimensions [mm]
DS13869 - Rev 1
Dim.
A
A2 a1 b c
D
E
Min.
2.15
2.15
0
0.33
0.23
10.10
7.4
Table 11. PowerSSO-24 mechanical data
[mm]
Typ.
-
-
-
-
-
-
-
Max.
2.47
2.40
0.075
0.51
0.32
10.50
7.6
page 18/28
Dim.
L
N
X
Y
H h e e3
G
G1
IPS1025HF
Package mechanical data
Min.
-
-
-
-
10.1
-
0.55
-
4.1
6.5
[mm]
Typ.
0.8
8.8
-
-
-
-
-
-
-
Figure 14. PowerSSO-24 suggested footprint [mm]
Max.
-
-
0.1
0.06
10.5
0.4
0.85
10 deg
4.7
7.1
DS13869 - Rev 1
STMicroelectronics is not responsible for PCB-related issues. The footprint shown in the above figure is a suggestion which may differ from the customer PCB supplier design rules.
page 19/28
10
IPS1025HF
PowerSSO-24 packing information
PowerSSO-24 packing information
Figure 15. PowerSSO-24 tube shipment (no suffix)
All dimensions are in mm
Table 12. PowerSSO-24 tube shipment information
Description
Base quantity
Bulk quantity
Tube length (±0.5)
A
B
C (±0.1)
Value
49
1225
532
3.5
13.8
0.6
DS13869 - Rev 1 page 20/28
Figure 16. PowerSSO-24 reel shipment
IPS1025HF
PowerSSO-24 packing information
DS13869 - Rev 1
All dimensions are in mm
Table 13. PowerSSO-24 reel information
Description
Base quantity
Bulk quantity
A (max.)
B (min.)
C (±0.2)
F
G (2 ±0)
N (min.)
T (max.)
Value
1000
1000
330
1.5
13
20.2
24.4
100
30.4
page 21/28
Figure 17. PowerSSO-24 tape drawings
IPS1025HF
PowerSSO-24 packing information
Note:
Table 14. PowerSSO-24 tape dimension
All dimensions are in mm
Description
Tape width
Tape hole spacing
Component spacing
Hole diameter
Symbol
W
P0 (± 0.1)
P
D (± 0.05)
Hole diameter
Hole position
Compartment depth
Hole spacing
D1 (min.)
F (± 0.1)
K (max.)
P1 (± 0.1)
According to the Electronic Industries Association (EIA) standard 481 rev. A, Feb 1986.
Value
24
4
12
1.55
1.5
11.5
2.85
2
DS13869 - Rev 1 page 22/28
IPS1025HF
Ordering information
11
Ordering information
Part number
IPS1025HF
IPS1025HFTR
Table 15. Ordering information
Package
PowerSSO-24
PowerSSO-24
Packaging
Tube
Tape and reel
DS13869 - Rev 1 page 23/28
Revision history
Date
28-Mar-2022
Table 16. Document revision history
Version
1
Changes
Initial release
IPS1025HF
DS13869 - Rev 1 page 24/28
IPS1025HF
Contents
Contents
DS13869 - Rev 1 page 25/28
IPS1025HF
List of tables
List of tables
DS13869 - Rev 1 page 26/28
IPS1025HF
List of figures
List of figures
Figure 4. High (left) and Low (right) I
control activation thresholds (I
) . . . . . . . . . . . . . . 9
Figure 9. Short-circuit behavior with dual threshold (T
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. Typical demagnetization energy (single pulse) at V
= 125 °C . . . . . . . . . . . . . . . . . . . . . 17
DS13869 - Rev 1 page 27/28
IPS1025HF
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DS13869 - Rev 1 page 28/28
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