Peak System Technik PCAN-GPS FD Compass, Accelerometer, Gyroscope User Manual

ISM330DLC
Datasheet
iNEMO 6-axis IMU: 3-axis accelerometer and 3-axis gyroscope with digital output
for industrial applications
Features
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Product status link
ISM330DLC
Product summary
Order code
ISM330DLCTR
Temperature range
[°C]
-40 to +85
Package
Packing
LGA-14L
(2.5 x 3.0 x 0.83 mm)
Tape and reel
Product resources
TN0018 (design and soldering)
Product label
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3-axis accelerometer with selectable full scale: ±2/±4/±8/±16 g
3-axis gyroscope with selectable full scale: ±125/±250/±500/±1000/±2000 dps
Analog supply voltage: 1.71 V to 3.6 V
SPI & I²C serial interface with main processor data synchronization
Dedicated gyroscope output chain with low latency, low noise, and dedicated
low-pass filters for control loop stability (OIS and other stabilization
applications)
Auxiliary SPI serial interface for independent, low-noise low-latency data
output for gyroscope and accelerometer
Ultralow power consumption for both accelerometer and gyroscope enabling
long-lasting battery-operated applications: 0.5 mA in combo normal mode and
0.75 mA in combo high-performance mode
Smart FIFO up to 4 KB
Smart embedded functions and interrupts: tilt detection, free-fall, wake-up,
6D/4D orientation, click and double click
Sensor hub feature to efficiently collect data from additional external sensors
Embedded hard, soft ironing for external magnetic sensor corrections
Embedded temperature sensor
Embedded self-test both for gyroscope and accelerometer
High shock survivability
Extended operating temperature range (-40 °C to +85 °C)
ECOPACK and RoHS and compliant
Applications
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Industrial IoT and connected devices
Antennas, platforms, and optical image and lens stabilization
Robotics, drones, and industrial automation
Navigation systems and telematics
Vibration monitoring and compensation
Description
The ISM330DLC is a system-in-package 6-axis IMU (inertial measurement unit),
featuring a high-performance 3-axis digital accelerometer and 3-axis digital
gyroscope tailored for Industry 4.0 applications.
ST’s family of MEMS sensor modules leverages the robust and mature
manufacturing processes already used for the production of micromachined
accelerometers and gyroscopes.
The various sensing elements are manufactured using specialized micromachining
processes, while the IC interfaces are developed using CMOS technology that allows
the design of a dedicated circuit, which is trimmed to better match the characteristics
of the sensing element.
DS12171 - Rev 4 - March 2023
For further information contact your local STMicroelectronics sales office.
www.st.com
ISM330DLC
In the ISM330DLC, the sensing element of the accelerometer and of the gyroscope are implemented on the same
silicon die, thus guaranteeing superior stability and robustness.
The ISM330DLC has a full-scale acceleration range of ±2/±4/±8/±16 g and an angular rate range of
±125/±250/±500/±1000/±2000 dps.
Delivering high accuracy and stability with ultralow power consumption (0.75 mA in high-performance, combo
mode) enables, also in the industrial domain, long-lasting battery-operated applications.
The ISM330DLC includes a dedicated configurable signal processing path with low latency, low noise, and
dedicated filtering specifically intended for control loop stability. Data from this dedicated signal path can be
made available through an auxiliary SPI interface, configurable for both the gyroscope and accelerometer. Highperformance, high-quality, small size and low power consumption together with high robustness to mechanical
shock makes the ISM330DLC the preferred choice of system designers for the creation and manufacturing of
versatile and reliable products.
The ISM330DLC is available in a plastic, land grid array (LGA) package.
DS12171 - Rev 4
page 2/113
ISM330DLC
Overview
1
Overview
The ISM330DLC is a system-in-package featuring a high-performance 3-axis digital accelerometer and 3-axis
digital gyroscope tailored for Industry 4.0 applications.
The ISM330DLC has a full-scale acceleration range of ±2/±4/±8/±16 g, an angular rate range of
±125/±250/±500/±1000/±2000 dps and is capable of delivering highly accurate and reliable measurements at
an ultralow power consumption (0.75 mA in high-performance, combo mode).
The ISM330DLC embeds smart features that simplify and optimize the application design and allows the usage of
complex motion-sensing information also in power-constrained applications.
The event-detection interrupts enable efficient and reliable motion tracking and contextual awareness,
implementing hardware recognition of free-fall events, 6D orientation, click and double-click sensing, activity or
inactivity, and wake-up events.
Up to 4 KB of FIFO with dynamic allocation of significant data (that is, external sensors, timestamp, and so forth)
allows overall power saving of the system and protects against any loss of data.
With the sensor hub feature, data from up to four external sensors can be collected and stored in the internal
FIFO without any intervention from the application microcontroller.
Moreover, the ISM330DLC offers specific support, both for the gyroscope and the accelerometer, to applications
requiring closed control loop. The device, through a dedicated auxiliary SPI interface and a configurable signal
processing path having low latency and low noise, can provide data for the control loop while, at the same time, a
second fully independent path can output data for other application intents.
Like the entire portfolio of MEMS sensor modules, the ISM330DLC leverages the robust and mature in-house
manufacturing processes already used for the production of micromachined accelerometers and gyroscopes. The
various sensing elements are manufactured using specialized micromachining processes, while the IC interfaces
are developed using CMOS technology that allows the design of a dedicated circuit, which is trimmed to better
match the characteristics of the sensing element.
In the ISM330DLC, the sensing element of the accelerometer and of the gyroscope are implemented on the same
silicon die, thus guaranteeing superior stability and robustness.
The ISM330DLC is available in a small plastic land grid array (LGA) package of 2.5 x 3.0 x 0.83 mm.
DS12171 - Rev 4
page 3/113
ISM330DLC
Embedded smart features
2
Embedded smart features
The ISM330DLC features the following on-chip smart functions:
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4 KB data buffering
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100% efficiency with flexible configurations and partitioning
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Possibility to store timestamp
Event-detection interrupts (fully configurable)
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Free-fall
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Wake-up
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6D orientation
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Click and double-click sensing
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Activity / inactivity recognition
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Tilt (refer to Section 2.1 Tilt detection for additional information)
Sensor hub
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2.1
Up to six total sensors: two internal (accelerometer and gyroscope) and four external sensors
Data rate synchronization with external trigger
Tilt detection
The tilt function helps to detect activity change and has been implemented in hardware using only the
accelerometer to achieve both the targets of ultralow power consumption and robustness during the short
duration of dynamic accelerations.
The tilt function is based on a trigger of an event each time the device's tilt changes. It is configurable through:
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DS12171 - Rev 4
A programmable average window
A programmable average threshold
page 4/113
ISM330DLC
Pin description
3
Pin description
Figure 1. Pin connections
Z
Y
X
ΩY
ΩR
ΩP
DS12171 - Rev 4
page 5/113
ISM330DLC
Pin connections
3.1
Pin connections
The ISM330DLC offers flexibility to connect the pins in order to have four different mode connections and
functionalities. In detail:
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Mode 1: I²C slave interface or SPI (3- and 4-wire) serial interface is available.
Mode 2: I²C slave interface or SPI (3- and 4-wire) serial interface and I²C interface master for external
sensor connections are available.
Mode 3: I²C slave interface or SPI (3- and 4-wire) serial interface is available for the application processor
interface while an auxiliary SPI (3- and 4-wire) serial interface is available for an auxiliary host to access
the gyroscope ONLY.
Mode 4: I²C slave interface or SPI (3- and 4-wire) serial interface is available for the application processor
interface while an auxiliary SPI (3- and 4-wire) serial interface is available for an auxiliary host to access
the accelerometer and gyroscope.
Figure 2. ISM330DLC connection modes
Mode 1
Mode 2
Mode 3
Mode 4
HOST
HOST
HOST
HOST
I2C/SPI (3/4-w)
ISM330DLC
I2C/SPI (3/4-w)
ISM330DLC
Master I2C
LSM6DSM
External
LSM6DSM
sensors
DS12171 - Rev 4
I2C/SPI (3/4-w)
ISM330DLC
Aux SPI (3/4-w) For gyro
data only
AUX HOST
I2C/SPI (3/4-w)
ISM330DLC
Aux SPI (3/4-w) For XL and
gyro data
AUX HOST
page 6/113
ISM330DLC
Pin connections
In the following table, each mode is described for the pin connections and function.
Table 1. Pin description
Pin #
Name
Mode 1 function
Mode 2 function
Mode 3 / mode 4 function
SPI 4-wire interface serial data
output (SDO)
SPI 4-wire interface serial data output
(SDO)
SPI 4-wire interface serial data output
(SDO)
I²C least significant bit of the device
address (SA0)
I²C least significant bit of the device
address (SA0)
I²C least significant bit of the device
address (SA0)
1
SDO/SA0
2
SDx
Connect to VDDIO or GND
I²C serial data master (MSDA)
Auxiliary SPI 3/4-wire interface serial data
input (SDI) and SPI 3-wire serial data
output (SDO)
3
SCx
Connect to VDDIO or GND
I²C serial clock master (MSCL)
Auxiliary SPI (3/4-wire) interface serial port
clock (SPC_Aux)
4
INT1
Programmable interrupt 1
5
VDDIO(1)
Power supply for I/O pins
6
GND
0 V supply
7
GND
0 V supply
8
VDD(1)
Power supply
9
INT2
Programmable interrupt 2 (INT2) /
Data enable (DEN)
Programmable interrupt 2 (INT2) /
Data enable (DEN)/
I²C master external synchronization
signal (MDRDY)
10
OCS_Aux Leave unconnected(2)
Leave unconnected(2)
11
Connect to VDD_IO or leave
SDO_Aux
unconnected(2)
Connect to VDD_IO or leave
unconnected(2)
12
13
14
CS
SCL
SDA
Programmable interrupt 2 (INT2) / Data
enable (DEN)
Enables auxiliary SPI 3/4-wire interface
Auxiliary SPI 3-wire interface: leave
unconnected(2)
Auxiliary SPI 4-wire interface: serial data
output (SDO_Aux)
I²C/SPI mode selection
I²C/SPI mode selection
(1: SPI idle mode / I²C
communication enabled;
(1: SPI idle mode / I²C communication
enabled;
0: SPI communication mode / I²C
disabled)
0: SPI communication mode / I²C
disabled)
0: SPI communication mode / I²C disabled)
I²C serial clock (SCL)
I²C serial clock (SCL)
I²C serial clock (SCL)
SPI serial port clock (SPC)
SPI serial port clock (SPC)
SPI serial port clock (SPC)
I²C serial data (SDA)
I²C serial data (SDA)
I²C serial data (SDA)
SPI serial data input (SDI)
SPI serial data input (SDI)
SPI serial data input (SDI)
3-wire interface serial data output
(SDO)
3-wire interface serial data output
(SDO)
3-wire interface serial data
I²C/SPI mode selection
(1: SPI idle mode / I²C communication
enabled;
output (SDO)
1. Recommended 100 nF filter capacitor.
2. Leave pin electrically unconnected and soldered to PCB.
DS12171 - Rev 4
page 7/113
ISM330DLC
Module specifications
4
Module specifications
4.1
Mechanical characteristics
@ Vdd = 1.8 V, T = 25 °C unless otherwise noted.
Table 2. Mechanical characteristics
Symbol
Parameter
Test conditions
Min. (1)
Typ. (2)
Max.(1)
Unit
±2
LA_FS
±4
Linear acceleration measurement range
g
±8
±16
±125
±250
G_FS
Angular rate measurement range
dps
±500
±1000
±2000
FS = ±2
LA_So
Linear acceleration sensitivity(3)
G_So
LA_SoDr
Linear acceleration sensitivity change vs. temperature(4)
G_SoDr
Angular rate sensitivity change vs. temperature(4)
0.061
FS = ±4
0.122
FS = ±8
0.244
FS = ±16
0.488
FS = ±125
Angular rate sensitivity(3)
-3%
-3%
4.375
FS = ±250
8.75
FS = ±500
17.50
FS = ±1000
35
FS = ±2000
70
from -40° to +85°
delta from T = +25°
from -40° to +85°
delta from T = +25°
LA_TyOff Linear acceleration zero-g level offset accuracy(5)
+3%
mg/LSB
+3%
mdps/LSB
-0.024
±0.01
+0.024
%/°C
-0.048
±0.007
+0.048
%/°C
-85
±40
+85
mg
G_TyOff
Angular rate zero-rate level(5)
±2
dps
LA_OffDr
Linear acceleration zero-g level change vs. temperature(4)
±0.1
mg/ °C
G_OffDr
Angular rate typical zero-rate level change vs. temperature(4)
±0.015
dps/°C
LA_NL
Linear acceleration nonlinearity(4)
±2
%FS
G_NL
Angular rate nonlinearity(4)
±0.07
%FS
Rn
Rate noise density in high-performance mode(6)
3.8
Gyroscope RMS noise in normal/low-power mode(7)
75
RnRMS
An
Acceleration noise density in high-performance mode(8)
DS12171 - Rev 4
@FS = ±8 g
Best-fit straight line
@FS = ±2000 dps
Best-fit straight line
11
mdps/√Hz
mdps
FS = ±2 g
75
170
FS = ±4 g
80
170
µg/√Hz
page 8/113
ISM330DLC
Mechanical characteristics
Symbol
An
RMS
Parameter
Acceleration noise density in high-performance mode(8)
Acceleration RMS noise in normal/low-power mode(9)(10)
Typ. (2)
Max.(1)
FS = ±8 g
90
180
FS = ±16 g
130
230
FS = ±2 g
1.8
FS = ±4 g
2.0
FS = ±8 g
2.4
FS = ±16 g
3.0
Test conditions
Min. (1)
Unit
µg/√Hz
mg(RMS)
1.6
12.5
26
52
104
LA_ODR
208
Linear acceleration output data rate
Hz
416
833
1666
3332
6664
12.5
26
52
104
G_ODR
208
Angular rate output data rate
Hz
416
833
1666
3332
6664
LA_F0
Sensor resonant frequency
G_F0
Sensor resonant frequency
X,Y-axis
3.0
Z-axis
2.2
20
Linear acceleration self-test output change(12)(13)(14)
Vst
Top
Angular rate self-test output change(15)(16)
kHz
kHz
90
1700
mg
FS = ±250 dps
20
80
dps
FS = ±2000 dps
150
700
dps
-40
+85
°C
Operating temperature range
1. Min/Max values are based on characterization results, not tested in production and not guaranteed.
2. Typical specifications are not guaranteed.
3. Sensitivity values after factory calibration test and trimming.
4. Measurements are performed in a uniform temperature setup and they are based on characterization data in a limited number of samples.
Not measured during final test for production.
5. Values after factory calibration test and trimming.
6. Gyroscope rate noise density in high-performance mode is independent of the ODR and FS setting.
7. Gyroscope RMS noise in normal/low-power mode is independent of the ODR and FS setting.
8. Accelerometer noise density in high-performance mode is independent of the ODR.
9. Accelerometer RMS noise in normal/low-power mode is independent of the ODR.
10. Noise RMS related to BW = ODR/2 (for ODR/9, typ value can be calculated by Typ *0.6).
DS12171 - Rev 4
page 9/113
ISM330DLC
Mechanical characteristics
11. This ODR is available when accelerometer is in low-power mode.
12. The sign of the linear acceleration self-test output change is defined by the STx_XL bits in CTRL5_C (14h), Table 63 for all axes.
13. The linear acceleration self-test output change is defined with the device in stationary condition as the absolute value of: OUTPUT[LSb]
(self-test enabled) - OUTPUT[LSb] (self-test disabled). 1LSb = 0.061 mg at ±2 g full scale.
14. Accelerometer self-test limits are full-scale independent.
15. The sign of the angular rate self-test output change is defined by the STx_G bits in CTRL5_C (14h), Table 62 for all axes.
16. The angular rate self-test output change is defined with the device in stationary condition as the absolute value of: OUTPUT[LSb] (self-test
enabled) - OUTPUT[LSb] (self-test disabled). 1LSb = 70 mdps at ±2000 dps full scale.
DS12171 - Rev 4
page 10/113
ISM330DLC
Electrical characteristics
4.2
Electrical characteristics
@ Vdd = 1.8 V, T = 25 °C unless otherwise noted.
Table 3. Electrical characteristics
Symbol
Vdd
Parameter
Test conditions
Min.
Typ. (1)
Max.
Unit
1.8
3.6
V
3.6
V
Supply voltage
1.71
Vdd_IO
Power supply for I/O
1.62
IddHP
Gyroscope and accelerometer current consumption in high-performance mode
ODR = 1.6 kHz
0.75
mA
IddNM
Gyroscope and accelerometer current consumption in normal mode
ODR = 208 Hz
0.5
mA
IddLP
Gyroscope and accelerometer current consumption in low-power mode
mA
LA_IddHP
Accelerometer current consumption in high-performance mode
LA_IddNM Accelerometer current consumption in normal mode
LA_IddLM
Accelerometer current consumption in low-power mode
ODR = 52 Hz
0.35
ODR < 1.6 kHz
180
ODR ≥ 1.6 kHz
190
ODR = 208 Hz
85
ODR = 52 Hz
25
ODR = 12.5 Hz
9
ODR = 1.6 Hz
4.5
IddPD
Gyroscope and accelerometer current consumption during power-down
Ton
Turn-on time
VIH
Digital high-level input voltage
VIL
Digital low-level input voltage
VOH
High-level output voltage
IOH = 4 mA(2)
VOL
Low-level output voltage
IOL = 4 mA(2)
Top
Operating temperature range
µA
µA
µA
3
µA
35
ms
0.7 *VDD_IO
V
0.3 *VDD_IO
V
VDD_IO - 0.2
V
-40
0.2
V
+85
°C
1. Typical specifications are not guaranteed.
2. 4 mA is the maximum driving capability, that is, the maximum DC current that can be sourced/sunk by the digital pad in order to guarantee
the correct digital output voltage levels VOH and VOL.
Temperature sensor characteristics
4.3
@ Vdd = 1.8 V, T = 25 °C unless otherwise noted.
Table 4. Temperature sensor characteristics
Symbol
TODR(2)
Parameter
Test condition
Min.
Temperature refresh rate
Toff
Temperature offset(3)
TSen
Temperature sensitivity
TST
Temperature stabilization time(4)
T_ADC_res
Temperature ADC resolution
Top
Operating temperature range
Typ.(1)
Max.
52
-15
Hz
+15
256
°C
LSB/°C
500
16
-40
Unit
µs
bit
+85
°C
1. Typical specifications are not guaranteed.
2. When the accelerometer is in low-power mode and the gyroscope part is turned off, the TODR value is equal to the accelerometer ODR.
3. The output of the temperature sensor is 0 LSB (typ.) at 25 °C.
4. Time from power ON to valid data based on characterization data.
DS12171 - Rev 4
page 11/113
ISM330DLC
Communication interface characteristics
4.4
Communication interface characteristics
4.4.1
SPI - serial peripheral interface
Subject to general operating conditions for Vdd and Top.
Table 5. SPI slave timing values
Symbol
Parameter
Value (1)
Min
tc(SPC)
SPI clock cycle
fc(SPC)
SPI clock frequency
tsu(CS)
CS setup time
5
th(CS)
CS hold time
20
tsu(SI)
SDI input setup time
5
th(SI)
SDI input hold time
15
tv(SO)
SDO valid output time
th(SO)
SDO output hold time
tdis(SO)
SDO output disable time
Max
Unit
ns
100
10
MHz
ns
50
5
50
1. Values are evaluated at 10 MHz clock frequency for SPI with both 4 and 3 wires, based on characterization results, not
tested in production
Figure 3. SPI slave timing diagram
Note:
DS12171 - Rev 4
Measurement points are done at 0.3·Vdd_IO and 0.7·Vdd_IO for both input and output ports.
page 12/113
ISM330DLC
Communication interface characteristics
4.4.2
I²C- inter-IC control interface
Subject to general operating conditions for Vdd and Top.
Figure 4. I²C timing diagram
REPEATED
START
START
tsu(SR)
START
tw(SP:SR)
SDA
tsu(SDA)
th(SDA)
STOP
tsu(SP)
SCL
th(ST)
tw(SCLL)
tw(SCLH)
Note:
Measurement points are done at 0.3·Vdd_IO and 0.7·Vdd_IO for both ports.
4.4.2.1
I²C slave
Table 6. I²C slave timing values
Symbol
Parameter
I²C standard mode (1)
I²C fast mode (1)
Min
Max
Min
Max
100
0
400
f(SCL)
SCL clock frequency
0
tw(SCLL)
SCL clock low time
4.7
1.3
tw(SCLH)
SCL clock high time
4.0
0.6
tsu(SDA)
SDA setup time
250
100
th(SDA)
SDA data hold time
0
th(ST)
START condition hold time
4
0.6
tsu(SR)
Repeated START condition setup time
4.7
0.6
tsu(SP)
STOP condition setup time
4
0.6
tw(SP:SR)
Bus free time between STOP and START condition
4.7
1.3
3.45
0
Unit
kHz
µs
ns
0.9
µs
µs
1. Data based on standard I²C protocol requirement, not tested in production.
DS12171 - Rev 4
page 13/113
ISM330DLC
Communication interface characteristics
4.4.2.2
I²C master
When in I²C master mode, an external sensor can be connected to the ISM330DLC. The ISM330DLC supports
I²C master - fast mode only.
Table 7. I²C slave timing values
Symbol
DS12171 - Rev 4
Parameter
I²C master
I²C fast mode (min)
Unit
f(SCL)
SCL clock frequency
116.3
0
(400 kHz max)
kHz
tw(SCLL)
SCL clock low time
5.86
1.3
µs
tw(SCLH)
SCL clock high time
2.74
0.6
ns
Data valid time
3.9
-
µs
SDA hold time
≥0
0
ns
SDA setup time
≥100
100
ns
tsu(SR)
Repeated START condition setup time
1.56
0.6
µs
tsu(HD)
Repeated START condition hold time
1.56
0.6
µs
tsu(SP)
STOP condition setup time
2.73
0.6
µs
tw(SP:SR)
Bus free time between STOP and START condition
21
1.3
µs
page 14/113
ISM330DLC
Absolute maximum ratings
4.5
Absolute maximum ratings
Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This
is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to
maximum rating conditions for extended periods may affect device reliability.
Table 8. Absolute maximum ratings
Symbol
DS12171 - Rev 4
Maximum value
Unit
Vdd
Supply voltage
-0.3 to 4.8
V
TSTG
Storage temperature range
-40 to +125
°C
Sg
Acceleration g for 0.2 ms
10,000
g
ESD
Electrostatic discharge protection (HBM)
2
kV
-0.3 to Vdd_IO +0.3
V
Vin
Note:
Ratings
Input voltage on any control pin
(including CS, SCL/SPC, SDA/SDI/SDO, SDO/SA0)
Supply voltage on any pin should never exceed 4.8 V.
page 15/113
ISM330DLC
Terminology
4.6
Terminology
4.6.1
Sensitivity
Linear acceleration sensitivity can be determined, for example, by applying 1 g acceleration to the device.
Because the sensor can measure DC accelerations, this can be done easily by pointing the selected axis towards
the ground, noting the output value, rotating the sensor 180 degrees (pointing towards the sky) and noting the
output value again. By doing so, ±1 g acceleration is applied to the sensor. Subtracting the larger output value
from the smaller one, and dividing the result by 2, leads to the actual sensitivity of the sensor. This value changes
very little over temperature and over time. The sensitivity tolerance describes the range of sensitivities of a large
number of sensors (see mechanical characteristics).
An angular rate gyroscope is a device that produces a positive-going digital output for counterclockwise rotation
around the axis considered. Sensitivity describes the gain of the sensor and can be determined by applying
a defined angular velocity to it. This value changes very little over temperature and time (see mechanical
characteristics).
4.6.2
Zero-g and zero-rate level
Linear acceleration zero-g level offset (TyOff) describes the deviation of an actual output signal from the ideal
output signal if no acceleration is present. A sensor in a steady state on a horizontal surface measures 0 g on
both the X-axis and Y-axis, whereas the Z-axis measures 1 g. Ideally, the output is in the middle of the dynamic
range of the sensor (content of OUT registers 00h, data expressed as two's complement number). A deviation
from the ideal value in this case is called zero-g offset.
Offset is to some extent a result of stress to the MEMS sensor and therefore the offset can slightly change
after mounting the sensor onto a printed circuit board or exposing it to extensive mechanical stress. Offset
changes little over temperature, see “Linear acceleration zero-g level change vs. temperature” in the mechanical
characteristics. The zero-g level tolerance (TyOff) describes the standard deviation of the range of zero-g levels of
a group of sensors.
Zero-rate level describes the actual output signal if there is no angular rate present. The zero-rate level of precise
MEMS sensors is, to some extent, a result of stress to the sensor and therefore the zero-rate level can slightly
change after mounting the sensor onto a printed circuit board or after exposing it to extensive mechanical stress.
This value changes very little over temperature and time (see mechanical characteristics).
DS12171 - Rev 4
page 16/113
ISM330DLC
Functionality
5
Functionality
5.1
Operating modes
In the ISM330DLC, the accelerometer and the gyroscope can be turned on/off independently of each other and
are allowed to have different ODRs and power modes.
The ISM330DLC has three operating modes available:
•
•
•
Only accelerometer active and gyroscope in power-down
Only gyroscope active and accelerometer in power-down
Both accelerometer and gyroscope sensors active with independent ODR
The accelerometer is activated from power-down by writing ODR_XL[3:0] in CTRL1_XL (10h) while the gyroscope
is activated from power-down by writing ODR_G[3:0] in CTRL2_G (11h). For combo mode, the ODRs are totally
independent.
5.2
Gyroscope power modes
In the ISM330DLC, the gyroscope can be configured in four different operating modes: power-down, lowpower, normal mode and high-performance mode. The operating mode selected depends on the value of the
G_HM_MODE bit in CTRL7_G (16h). If G_HM_MODE is set to 0, high-performance mode is valid for all ODRs
(from 12.5 Hz up to 6.66 kHz).
To enable the low-power and normal mode, the G_HM_MODE bit has to be set to 1. Low-power mode is available
for lower ODRs (12.5, 26, 52 Hz) while normal mode is available for ODRs equal to 104 and 208 Hz.
5.3
Accelerometer power modes
In the ISM330DLC, the accelerometer can be configured in four different operating modes: power-down, lowpower, normal mode and high-performance mode. The operating mode selected depends on the value of the
XL_HM_MODE bit in CTRL6_C (15h). If XL_HM_MODE is set to 0, high-performance mode is valid for all ODRs
(from 12.5 Hz up to 6.66 kHz).
To enable the low-power and normal mode, the XL_HM_MODE bit has to be set to 1. Low-power mode is
available for lower ODRs (1.6, 12.5, 26, 52 Hz) while normal mode is available for ODRs equal to 104 and
208 Hz.
5.4
Block diagram of filters
Figure 5. Block diagram of filters
DS12171 - Rev 4
page 17/113
ISM330DLC
Block diagram of filters
5.4.1
Block diagrams of the gyroscope filters
In the ISM330DLC, the gyroscope filtering chain depends on the mode configuration:
1.
Mode 1 (for general-purpose (GP) functionality through primary interface) and mode 2
Figure 6. Gyroscope digital chain - mode 1 (GP) and mode 2
SPI/I2C
ADC
0
0
LPF2
HPF
LPF1
1
1
ODR_G
HP_EN_G
FTYPE [1:0]
FIFO
LPF1_SEL_G
In this configuration, the gyroscope ODR is selectable from 12.5 Hz up to 6.66 kHz. A low-pass filter (LPF1) is
available if the auxiliary SPI is disabled, for more details about the filter characteristics see Table 67. Gyroscope
LPF1 bandwidth selection.
Data can be acquired from the output registers and FIFO over the primary I²C/SPI interface.
1.
Mode 3 / mode 4 (for control loop functionality (OIS))
Figure 7. Gyroscope digital chain - mode 3 / mode 4 (OIS)
SPI/I2C
ADC
0
LPF2
HPF
1
ODR_G
FIFO
HP_EN_G
0
LPF1
SPI_Aux
1
FTYPE_ [1:0] _OIS
HP_EN_OIS
Note:
HP_EN_OIS is active to select HPF on the auxiliary SPI chain only if HPF is not already used in the primary
interface.
In this configuration, there are two paths:
•
•
DS12171 - Rev 4
The chain for general purpose (GP) where the ODR is selectable from 12.5 Hz up to 6.66 kHz.
The chain for OIS where the ODR is at 6.66 kHz and the LPF1 is available. For more details about the filter
characteristics, see Table 215. Gyroscope OIS chain LPF1 bandwidth selection.
page 18/113
ISM330DLC
Block diagram of filters
5.4.2
Block diagrams of the accelerometer filters
In the ISM330DLC, the filtering chain for the accelerometer part is composed of the following:
•
•
•
Analog filter (anti-aliasing)
Digital filter (LPF1)
Composite filter
Details of the block diagram appear in the following figure.
Figure 8. Accelerometer chain
Analog
Anti-aliasing
LP Filter
Digital
LP Filter
LPF1
ADC
Composite
Filter
LPF1_BW_SEL
INPUT_COMPOSITE
The configuration of the digital filter can be set using the LPF1_BW_SEL bit in CTRL1_XL (10h) and the
INPUT_COMPOSITE bit in CTRL8_XL (17h).
Figure 9. Accelerometer composite filter (for modes 1/2 and mode 3*)
Note:
DS12171 - Rev 4
* Mode 3 is available only if Mode4_EN = 0 and OIS_EN_SPI2 = 1 in CTRL1_OIS (70h).
page 19/113
ISM330DLC
Block diagram of filters
Figure 10. Accelerometer composite filter (Mode 4 only*)
Note:
DS12171 - Rev 4
*Mode 4 is enabled when Mode4_EN = 1 and OIS_EN_SPI2 = 1 in CTRL1_OIS (70h).
page 20/113
ISM330DLC
FIFO
5.5
FIFO
The presence of a FIFO allows consistent power saving for the system since the host processor does not need
continuously poll data from the sensor, but it can wake up only when needed and burst the significant data out
from the FIFO.
The ISM330DLC embeds 4 KB data FIFO to store the following data:
•
•
•
•
•
Gyroscope
Accelerometer
External sensors
Timestamp
Temperature
Writing data in the FIFO can be configured to be triggered by the:
•
•
Accelerometer/gyroscope data-ready signal in which case the ODR must be lower than or equal to both the
accelerometer and gyroscope ODRs
Sensor hub data-ready signal
In addition, each data can be stored at a decimated data rate compared to the FIFO ODR and it is configurable by
the user, setting the FIFO_CTRL3 (08h) and FIFO_CTRL4 (09h) registers. The available decimation factors are 2,
3, 4, 8, 16, 32.
The programmable FIFO threshold can be set in FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h) using the FTH
[10:0] bits.
To monitor the FIFO status, dedicated registers (FIFO_STATUS1 (3Ah), FIFO_STATUS2 (3Bh), FIFO_STATUS3
(3Ch), FIFO_STATUS4 (3Dh)) can be read to detect FIFO overrun events, FIFO full status, FIFO empty status,
FIFO threshold status, and the number of unread samples stored in the FIFO. To generate dedicated interrupts
on the INT1 and INT2 pads of these status events, the configuration can be set in INT1_CTRL (0Dh) and
INT2_CTRL (0Eh).
The FIFO buffer can be configured according to five different modes:
•
•
•
•
•
Bypass mode
FIFO mode
Continuous mode
Continuous-to-FIFO mode
Bypass-to-continuous mode
Each mode is selected by the FIFO_MODE_[2:0] bits in the FIFO_CTRL5 (0Ah) register. To guarantee the correct
acquisition of data during the switching into and out of FIFO mode, the first sample acquired must be discarded.
5.5.1
Bypass mode
In bypass mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 000), the FIFO is not operational and it remains
empty.
Bypass mode is also used to reset the FIFO when in FIFO mode.
5.5.2
FIFO mode
In FIFO mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 001) data from the output channels are stored in the
FIFO until it is full.
To reset FIFO content, bypass mode should be selected by writing FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0])
to 000. After this reset command, it is possible to restart FIFO mode by writing FIFO_CTRL5 (0Ah)
(FIFO_MODE_[2:0]) to 001.
FIFO buffer memorizes up to 4096 samples of 16 bits each but the depth of the FIFO can be resized by setting
the FTH [10:0] bits in FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h). If the STOP_ON_FTH bit in FIFO_CTRL4
(09h) is set to 1, FIFO depth is limited up to FTH [10:0] bits in FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h).
DS12171 - Rev 4
page 21/113
ISM330DLC
FIFO
5.5.3
Continuous mode
Continuous mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 110) provides a continuous FIFO update: as new
data arrives, the older data is discarded.
A FIFO threshold flag FIFO_STATUS2 (3Bh)(FTH) is asserted when the number of unread samples in FIFO is
greater than or equal to FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h)(FTH [10:0]).
It is possible to route FIFO_STATUS2 (3Bh) (FTH) to the INT1 pin by writing in register INT1_CTRL (0Dh)
(INT1_FTH) = 1 or to the INT2 pin by writing in register INT2_CTRL (0Eh) (INT2_FTH) = 1.
A full-flag interrupt can be enabled, INT1_CTRL (0Dh) (INT_ FULL_FLAG) = 1, in order to indicate FIFO
saturation and eventually read its content all at once.
If an overrun occurs, at least one of the oldest samples in FIFO has been overwritten and the OVER_RUN flag in
FIFO_STATUS2 (3Bh) is asserted.
In order to empty the FIFO before it is full, it is also possible to pull from FIFO the number of unread samples
available in FIFO_STATUS1 (3Ah) and FIFO_STATUS2 (3Bh) (DIFF_FIFO [10:0]).
5.5.4
Continuous-to-FIFO mode
In continuous-to-FIFO mode (FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 011), FIFO behavior changes according
to the trigger event detected in one of the following interrupt registers FUNC_SRC1 (53h), TAP_SRC (1Ch),
WAKE_UP_SRC (1Bh), and D6D_SRC (1Dh).
When the selected trigger bit is equal to 1, FIFO operates in FIFO mode.
When the selected trigger bit is equal to 0, FIFO operates in continuous mode.
5.5.5
Bypass-to-continuous mode
In bypass-to-continuous mode (Section 10.8 FIFO_CTRL5 (0Ah) (FIFO_MODE_[2:0] = 100), data measurement
storage inside FIFO operates in continuous mode when selected triggers in one of the following interrupt registers
FUNC_SRC1 (53h), TAP_SRC (1Ch), WAKE_UP_SRC (1Bh), and D6D_SRC (1Dh) are equal to 1, otherwise
FIFO content is reset (bypass mode).
5.5.6
FIFO reading procedure
The data stored in FIFO are accessible from dedicated registers (FIFO_DATA_OUT_L (3Eh) and
FIFO_DATA_OUT_H (3Fh)) and each FIFO sample is composed of 16 bits.
All FIFO status registers (FIFO_STATUS1 (3Ah), FIFO_STATUS2 (3Bh), FIFO_STATUS3 (3Ch), FIFO_STATUS4
(3Dh)) can be read at the start of a reading operation, minimizing the intervention of the application processor.
Saving data in the FIFO buffer is organized in four FIFO data sets consisting of 6 bytes each:
The 1st FIFO data set is reserved for gyroscope data.
The 2nd FIFO data set is reserved for accelerometer data.
The 3rd FIFO data set is reserved for the external sensor data stored in the registers from
Section 10.41 SENSORHUB1_REG (2Eh) to Section 10.46 SENSORHUB6_REG (33h).
The 4th FIFO data set can be alternately associated to the external sensor data stored in the registers from
SENSORHUB7_REG (34h) to SENSORHUB12_REG (39h), and timestamp info, or to the temperature sensor
data.
DS12171 - Rev 4
page 22/113
ISM330DLC
Digital interfaces
6
Digital interfaces
6.1
I²C/SPI interface
The registers embedded inside the ISM330DLC may be accessed through both the I²C and SPI serial interfaces.
The latter may be software-configured to operate either in 3-wire or 4-wire interface mode.
The serial interfaces are mapped onto the same pins. To select/exploit the I²C interface, the CS line must be tied
high (that is, connected to Vdd_IO).
Table 9. Serial interface pin description
Pin description
Pin name
Enables SPI
I²C/SPI mode selection
CS
(1: SPI idle mode / I²C communication enabled;
0: SPI communication mode / I²C disabled)
I²C serial clock (SCL)
SCL/SPC
SPI serial port clock (SPC)
I²C serial data (SDA)
SDA/SDI/SDO
SPI serial data input (SDI)
3-wire interface serial data output (SDO)
SPI serial data output (SDO)
SDO/SA0
6.2
I²C less significant bit of the device address
Master I²C
If the ISM330DLC is configured in mode 2, a master I²C line is available. The master serial interface is mapped in
the following dedicated pins.
Table 10. Master I²C pin details
Pin name
6.3
Pin description
MSCL
I²C serial clock master
MSDA
I²C serial data master
MDRDY
I²C master external synchronization signal
Auxiliary SPI
If ISM330DLC is configured in mode 3, the auxiliary SPI is available. The auxiliary SPI interface is mapped in the
following dedicated pins.
Table 11. Auxiliary SPI pin details
Pin name
OCS_Aux
Auxiliary SPI 3/4-wire enable
SDx
Auxiliary SPI 3/4-wire data input (SDI_Aux) and SPI 3-wire data output (SDO_Aux)
SCx
Auxiliary SPI 3/4-wire interface serial port clock
SDO_Aux
DS12171 - Rev 4
Pin description
SPI serial data
page 23/113
ISM330DLC
I²C serial interface
6.4
I²C serial interface
The ISM330DLC I²C is a bus slave. The I²C is employed to write the data to the registers, whose content can also
be read back.
The relevant I²C terminology is provided in the table below.
Table 12. I²C terminology
Term
Description
Transmitter
The device that sends data to the bus
Receiver
The device that receives data from the bus
Master
The device that initiates a transfer, generates clock signals, and terminates a transfer
Slave
The device addressed by the master
There are two signals associated with the I²C bus: the serial clock line (SCL) and the serial data line (SDA). The
latter is a bidirectional line used for sending and receiving the data to/from the interface. Both the lines must be
connected to Vdd_IO through external pull-up resistors. When the bus is free, both the lines are high.
The I²C interface is implemented with fast mode (400 kHz) I²C standards as well as with the standard mode.
In order to disable the I²C block, (I2C_disable) = 1 must be written in CTRL4_C (13h).
6.4.1
I²C operation
The transaction on the bus is started through a start (ST) signal. A START condition is defined as a high to low
transition on the data line while the SCL line is held high. After this has been transmitted by the master, the bus
is considered busy. The next byte of data transmitted after the start condition contains the address of the slave in
the first 7 bits and the eighth bit tells whether the master is receiving data from the slave or transmitting data to
the slave. When an address is sent, each device in the system compares the first seven bits after a start condition
with its address. If they match, the device considers itself addressed by the master.
The slave address (SAD) associated to the ISM330DLC is 110101x. The SDO/SA0 pin can be used to modify the
less significant bit of the device address. If the SDO/SA0 pin is connected to the supply voltage, LSb is 1 (address
1101011); else if the SDO/SA0 pin is connected to ground, the LSb value is 0 (address 1101010). This solution
permits to connect and address two different inertial modules to the same I²C bus.
Data transfer with acknowledge is mandatory. The transmitter must release the SDA line during the acknowledge
pulse. The receiver must then pull the data line low so that it remains stable low during the high period of the
acknowledge clock pulse. A receiver that has been addressed is obliged to generate an acknowledge after each
byte of data received.
The I²C embedded inside the ISM330DLC behaves like a slave device and the following protocol must be
adhered to. After the start condition (ST) a slave address is sent, once a slave acknowledge (SAK) has been
returned, an 8-bit subaddress (SUB) is transmitted. The increment of the address is configured by the CTRL3_C
(12h) (IF_INC).
The slave address is completed with a read/write bit. If the bit is 1 (read), a repeated start (SR) condition must
be issued after the two subaddress bytes; if the bit is 0 (write) the master transmits to the slave with direction
unchanged. The following table explains how the SAD+read/write bit pattern is composed, listing all the possible
configurations.
Table 13. SAD read/write patterns
Command
SAD[6:1]
SAD[0] = SA0
R/W
SAD+R/W
Read
110101
0
1
11010101 (D5h)
Write
110101
0
0
11010100 (D4h)
Read
110101
1
1
11010111 (D7h)
Write
110101
1
0
11010110 (D6h)
DS12171 - Rev 4
page 24/113
ISM330DLC
I²C serial interface
Table 14. Transfer when master is writing one byte to slave
Master
ST
SAD + W
SUB
Slave
DATA
SAK
SP
SAK
SAK
Table 15. Transfer when master is writing multiple bytes to slave
Master
ST
SAD + W
Slave
SUB
DATA
SAK
DATA
SAK
SP
SAK
SAK
Table 16. Transfer when master is receiving (reading) one byte of data from slave
Master
ST
SAD + W
Slave
SUB
SAK
SR
SAD + R
SAK
NMAK
SAK
SP
DATA
Table 17. Transfer when master is receiving (reading) multiple bytes of data from slave
Master
ST
Slave
SAD+W
SUB
SAK
SR
SAK
SAD+R
MAK
SAK
DATA
MAK
DATA
NMAK
SP
DATA
Data are transmitted in byte format (DATA). Each data transfer contains 8 bits. The number of bytes transferred
per transfer is unlimited. Data is transferred with the most significant bit (MSb) first. If a slave receiver does not
acknowledge the slave address (that is, it is not able to receive because it is performing some real-time function)
the data line must be left high by the slave. The master can then abort the transfer. A low to high transition on the
SDA line while the SCL line is high is defined as a stop condition. Each data transfer must be terminated by the
generation of a stop (SP) condition.
In the presented communication format, MAK is master acknowledge and NMAK is no master acknowledge.
DS12171 - Rev 4
page 25/113
ISM330DLC
SPI bus interface
6.5
SPI bus interface
The ISM330DLC SPI is a bus slave. The SPI allows writing and reading the registers of the device.
The serial interface communicates to the application using four wires: CS, SPC, SDI, and SDO.
Figure 11. Read and write protocol
CS
SPC
SDI
RW
DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0
AD6 AD5 AD4 AD3 AD2 AD1 AD0
SDO
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
CS enables the serial port and it is controlled by the SPI master. It goes low at the start of the transmission and
goes back high at the end. SPC is the serial port clock and it is controlled by the SPI master. It is stopped high
when CS is high (no transmission). SDI and SDO are, respectively, the serial port data input and output. Those
lines are driven at the falling edge of SPC and should be captured at the rising edge of SPC.
Both the read register and write register commands are completed in 16 clock pulses or in multiples of 8 in case
of multiple read/write bytes. Bit duration is the time between the two falling edges of SPC. The first bit (bit 0) starts
at the first falling edge of SPC after the falling edge of CS while the last bit (bit 15, bit 23, ...) starts at the last
falling edge of SPC just before the rising edge of CS.
bit 0: RW bit. When 0, the data DI(7:0) is written into the device. When 1, the data DO(7:0) from the device is
read. In the latter case, the chip drives SDO at the start of bit 8.
bit 1-7: address AD(6:0). This is the address field of the indexed register.
bit 8-15: data DI(7:0) (write mode). This is the data that is written into the device (MSb first).
bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first).
In multiple read/write commands further blocks of 8 clock periods are added. When the CTRL3_C (12h) (IF_INC)
bit is 0, the address used to read/write data remains the same for every block. When the CTRL3_C (12h)
(IF_INC) bit is 1, the address used to read/write data is increased at every block.
The function and the behavior of SDI and SDO remain unchanged.
DS12171 - Rev 4
page 26/113
ISM330DLC
SPI bus interface
6.5.1
SPI read
Figure 12. SPI read protocol
CS
SPC
SDI
RW
AD6 AD5 AD4 AD3 AD2 AD1 AD0
SDO
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
The SPI read command is performed with 16 clock pulses. A multiple byte read command is performed by adding
blocks of 8 clock pulses to the previous one.
bit 0: READ bit. The value is 1.
bit 1-7: address AD(6:0). This is the address field of the indexed register.
bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first).
bit 16-...: data DO(...-8). Further data in multiple byte reads.
Figure 13. Multiple byte SPI read protocol (2-byte example)
CS
SPC
SDI
RW
AD6 AD5 AD4 AD3 AD2 AD1 AD0
SDO
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 DO15 DO14DO13DO12 DO11DO10 DO9 DO8
DS12171 - Rev 4
page 27/113
ISM330DLC
SPI bus interface
6.5.2
SPI write
Figure 14. SPI write protocol
CS
SPC
SDI
RW
DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0
AD6 AD5 AD4 AD3 AD2 AD1 AD0
The SPI write command is performed with 16 clock pulses. A multiple byte write command is performed by adding
blocks of 8 clock pulses to the previous one.
bit 0: WRITE bit. The value is 0.
bit 1-7: address AD(6:0). This is the address field of the indexed register.
bit 8-15: data DI(7:0) (write mode). This is the data that is written inside the device (MSb first).
bit 16-... : data DI(...-8). Further data in multiple byte writes.
Figure 15. Multiple byte SPI write protocol (2-byte example)
CS
SPC
SDI
DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 DI15 DI14 DI13 DI12 DI11 DI10 DI9 DI8
RW
AD6 AD5 AD4 AD3 AD2 AD1 AD0
6.5.3
SPI read in 3-wire mode
A 3-wire mode is entered by setting the CTRL3_C (12h) (SIM) bit equal to 1 (SPI serial interface mode selection).
Figure 16. SPI read protocol in 3-wire mode
CS
SPC
SDI/O
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
RW
AD6 AD5 AD4 AD3 AD2 AD1 AD0
The SPI read command is performed with 16 clock pulses:
bit 0: READ bit. The value is 1.
bit 1-7: address AD(6:0). This is the address field of the indexed register.
bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first).
A multiple read command is also available in 3-wire mode.
DS12171 - Rev 4
page 28/113
ISM330DLC
Application hints
7
Application hints
7.1
ISM330DLCelectrical connections in mode 1
Figure 17. ISM330DLC electrical connections in mode 1
1.
Leave pin electrically unconnected and soldered to PCB.
The device core is supplied through the Vdd line. Power supply decoupling capacitors (C1, C2 = 100 nF ceramic)
should be placed as near as possible to the supply pin of the device (common design practice).
The functionality of the device and the measured acceleration/angular rate data is selectable and accessible
through the SPI/I²C interface.
The functions, the threshold, and the timing of the two interrupt pins for each sensor can be completely
programmed by the user through the SPI/I²C interface.
DS12171 - Rev 4
page 29/113
ISM330DLC
ISM330DLC electrical connections in mode 2
7.2
ISM330DLC electrical connections in mode 2
Figure 18. ISM330DLC electrical connections in mode 2
1.
Leave pin electrically unconnected and soldered to PCB.
The device core is supplied through the Vdd line. Power supply decoupling capacitors (C1, C2 = 100 nF ceramic)
should be placed as near as possible to the supply pin of the device (common design practice).
The functionality of the device and the measured acceleration/angular rate data is selectable and accessible
through the SPI/I²C interface.
The functions, the threshold, and the timing of the two interrupt pins for each sensor can be completely
programmed by the user through the SPI/I²C interface.
DS12171 - Rev 4
page 30/113
ISM330DLC
ISM330DLC electrical connections in mode 3 and mode 4
7.3
ISM330DLC electrical connections in mode 3 and mode 4
14
SDO
SDI_Aux
11
TOP
VIEW
GND
VDDIO
Mode 4
HOST
HOST
I2C/SPI (3/4-w)
ISM330DLC
OCS_Aux
Vdd
VDD
7
C1
GND
8
5
(1)
NC
INT2
4
Mode 3
I2C/SPI (3/4-w)
12
1
SPC_Aux
INT1
CS
SDI
SPC
Figure 19. ISM330DLC electrical connections in mode 3 and mode 4 (auxiliary 3-wire SPI)
100 nF
Aux SPI (3-w)
ISM330DLC
For gyro
data only
Aux SPI (3-w)
For XL and
gyro data
AUX HOST
AUX HOST
I2C configuration
GND
Vdd_IO
C2
Vdd_IO
100 nF
GND
Rpu
Rpu
SCL
SDA
NOTE:
To avoid leakage current, it is recommended to add pull-up
resistors on the SPI lines unless the SPI master can be left
on also while the OIS system is off.
Pull-up to be added
Rpu=10kOhm
1.
Leave pin electrically unconnected and soldered to PCB.
The device core is supplied through the Vdd line. Power supply decoupling capacitors (C1, C2 = 100 nF ceramic)
should be placed as near as possible to the supply pin of the device (common design practice).
The functionality of the device and the measured acceleration/angular rate data is selectable and accessible
through the SPI/I²C interface.
The functions, the threshold and the timing of the two interrupt pins for each sensor can be completely
programmed by the user through the SPI/I²C interface.
DS12171 - Rev 4
page 31/113
ISM330DLC
ISM330DLC electrical connections in mode 3 and mode 4
14
SDO
SDI_Aux
11
TOP
VIEW
GND
VDDIO
Mode 4
HOST
HOST
I2C/SPI (3/4-w)
ISM330DLC
OCS_Aux
Vdd
VDD
7
C1
GND
8
5
SDO_Aux
INT2
4
Mode 3
I2C/SPI (3/4-w)
12
1
SPC_Aux
INT1
CS
SPC
SDI
Figure 20. ISM330DLC electrical connections in mode 3 and mode 4 (auxiliary 4-wire SPI)
100 nF
Aux SPI (4-w)
ISM330DLC
Aux SPI (4-w)
For gyro
data only
AUX HOST
GND
For XL and
gyro data
AUX HOST
I2C configuration
Vdd_IO
C2
Vdd_IO
100 nF
Rpu
GND
Rpu
SCL
SDA
NOTE:
To avoid leakage current, it is recommended to add pull-up
resistors on the SPI lines unless the SPI master can be left
on also while the OIS system is off.
Pull-up to be added
Rpu=10kOhm
The device core is supplied through the Vdd line. Power supply decoupling capacitors (C1, C2 = 100 nF ceramic)
should be placed as near as possible to the supply pin of the device (common design practice).
The functionality of the device and the measured acceleration/angular rate data is selectable and accessible
through the SPI/I²C interface.
The functions, the threshold and the timing of the two interrupt pins for each sensor can be completely
programmed by the user through the SPI/I²C interface.
Internal pull-up value is from 30 kΩ to 50 kΩ, depending on VDDIO.
DS12171 - Rev 4
page 32/113
DS12171 - Rev 4
Table 18. Internal pin status
Pin #
Name
Mode 1 function
Mode 2 function
Mode 3 / mode 4 function
Pin status mode 1
Pin status mode 2
Pin status mode 3/4
SDO
SPI 4-wire interface serial
data output (SDO)
SPI 4-wire interface serial
data output (SDO)
SPI 4-wire interface serial
data output (SDO)
Default: input without pull-up
Default: input without pull-up
Default: input without pull-up
SA0
I²C least significant bit of the
device address (SA0)
I²C least significant bit of the
device address (SA0)
I²C least significant bit of the
device address (SA0)
Pull-up is enabled if bit
SIM = 1 (SPI 3-wire) in
register CTRL3_C (12h).
Pull-up is enabled if bit
SIM = 1 (SPI 3-wire) in
register CTRL3_C (12h).
Pull-up is enabled if bit
SIM = 1 (SPI 3-wire) in
register CTRL3_C (12h).
Default: input without pull-up
Default: input without pull-up
Connect to VDDIO or GND
I²C serial data master
(MSDA)
Auxiliary SPI 3/4-wire
interface serial data input
(SDI) and SPI 3-wire serial
data output (SDO)
Default: input without pull-up
SDx
Pull-up is enabled if bit
PULL_UP_EN = 1 in register
MASTER_CONFIG (1Ah).
Pull-up is enabled if bit
PULL_UP_EN = 1 in register
MASTER_CONFIG (1Ah).
Pull-up is enabled if bit
PULL_UP_EN = 1 in register
MASTER_CONFIG (1Ah).
Auxiliary SPI 3/4-wire
interface serial port clock
(SPC_Aux)
Default: input without pull-up
Default: input without pull-up
Default: input without pull-up
Pull-up is enabled if bit
PULL_UP_EN = 1 in register
MASTER_CONFIG (1Ah).
Pull-up is enabled if bit
PULL_UP_EN = 1 in register
MASTER_CONFIG (1Ah).
Pull-up is enabled if bit
PULL_UP_EN = 1 in register
MASTER_CONFIG (1Ah).
Default: output forced to
ground
Default: output forced to
ground
Default: output forced to
ground
Default: output forced to
ground
Default: output forced to
ground
Default: output forced to
ground
1
2
3
SCx
Connect to VDDIO or GND
I²C serial clock master
(MSCL)
4
INT1
Programmable interrupt 1
Programmable interrupt 1
Programmable interrupt 1
5
Vdd_IO
Power supply
Power supply
Power supply
for I/O pins
for I/O pins
for I/O pins
6
GND
0 V supply
0 V supply
0 V supply
7
GND
0 V supply
0 V supply
0 V supply
8
Vdd
Power supply
Power supply
Power supply
9
INT2
Programmable interrupt 2
(INT2) / Data enabled (DEN)
Programmable interrupt 2
(INT2) / Data enabled
(DEN) / I²C master external
synchronization signal
(MDRDY)
Programmable interrupt 2
(INT2) / Data enabled (DEN)
10
OCS
Leave unconnected
Leave unconnected
Auxiliary SPI 3/4-wire
interface enabled
Connect to VDDIO or leave
unconnected
Connect to VDDIO or leave
unconnected
12
CS
I²C/SPI mode selection
(1: SPI idle mode / I²C
communication enabled; 0:
SPI communication mode /
I²C disabled)
I²C/SPI mode selection
(1: SPI idle mode / I²C
communication enabled; 0:
SPI communication mode /
I²C disabled)
I²C/SPI mode selection
(1: SPI idle mode / I²C
communication enabled; 0:
SPI communication mode /
I²C disabled)
13
SCL
I²C serial clock (SCL) / SPI
serial port clock (SPC)
I²C serial clock (SCL) / SPI
serial port clock (SPC)
I²C serial clock (SCL) / SPI
serial port clock (SPC)
11
page 33/113
Default: input with pull-up
(See Note below to disable
pull-up)
Default: input with pull-up
Default: input with pull-up
(See note below to disable
pull-up)
(See note below to disable
pull-up)
Pull-up is enabled if bit
SIM_OIS = 1 (Aux_SPI 3wire) in register CTRL1_OIS
(70h).
Default: input with pull-up
Default: input with pull-up
Default: input with pull-up
Pull-up is disabled if bit
I2C_disable = 1 in register
CTRL4_C (13h).
Pull-up is disabled if bit
I2C_disable = 1 in register
CTRL4_C (13h).
Pull-up is disabled if bit
I2C_disable = 1 in register
CTRL4_C (13h).
Default: input without pull-up
Default: input without pull-up
Default: input without pull-up
Default: input without pull-up
Default: input without pull-up
ISM330DLC
SDO_Aux
Auxiliary SPI 3wire interface: leave
unconnected / Auxiliary SPI
4-wire interface: serial data
output (SDO_Aux)
Default: input with pull-up
(See Note below to disable
pull-up)
DS12171 - Rev 4
Pin #
14
Name
Mode 1 function
Mode 2 function
Mode 3 / mode 4 function
Pin status mode 1
Pin status mode 2
Pin status mode 3/4
SDA
I²C serial data (SDA) / SPI
serial data input (SDI) / 3wire interface serial data
output (SDO)
I²C serial data (SDA) / SPI
serial data input (SDI) / 3wire interface serial data
output (SDO)
I²C serial data (SDA) / SPI
serial data input (SDI) / 3wire interface serial data
output (SDO)
Default: input without pull-up
Default: input without pull-up
Default: input without pull-up
Internal pull-up value is from 30 kΩ to 50 kΩ, depending on VDDIO.
Note:
The procedure to disable the pull-up on pins 10-11 is as follows:
1.
AP side: write 80h in register at address 00h
2.
AP side: write 01h in register at address 05h (disable the pull-up on pins 10 and 11 of ISM330DLC)
3.
AP side: write 00h in register at address 00h
ISM330DLC
page 34/113
ISM330DLC
Auxiliary SPI configurations
8
Auxiliary SPI configurations
When the ISM330DLC is configured in mode 3 and mode 4, the auxiliary SPI can be connected to an auxiliary
host (OIS). In this interface, the SPI can write only to the dedicated registers INT_OIS (6Fh), CTRL1_OIS (70h),
CTRL2_OIS (71h), CTRL3_OIS (72h).
8.1
Gyroscope filtering
The gyroscope filtering chain is illustrated in the following figure.
Figure 21. Gyroscope chain
SPI/I2C
ADC
0
LPF2
HPF
1
ODR_G
FIFO
HP_EN_G
0
LPF1
SPI_Aux
1
FTYPE_ [ 1:0 ] _OIS
HP_EN_OIS
Note:
DS12171 - Rev 4
HP_EN_OIS is active to select HPF on the auxiliary SPI chain only if HPF is not already used in the primary
interface.
The auxiliary interface needs to be enabled in CTRL1_OIS (70h).
Gyroscope output values are in registers 22h to 27h with selected full scale (FS[1:0]_G_OIS bit in CTRL1_OIS
(70h)) and ODR at 6.66 kHz.
LPF1 configuration depends on the setting of the FTYPE_[1;0] _OIS bit in register CTRL2_OIS (71h).
page 35/113
ISM330DLC
Accelerometer filtering
8.2
Accelerometer filtering
Accelerometer filtering is available only when mode 4 is enabled.
Figure 22. Accelerometer chain (available only in mode 4)
Free-fall
6D/4D
Smart
functions
2
0
SPI/I C
0
1
1
ODR/2
ADC
LPF1
ODR/4
FIFO
LPF1_BW_SEL
HP_SLOPE_XL_EN
Wake-up
SLOPE
FILTER
Activity /
Inactivity
S/D Tap
LPF_OIS
SPI_Aux
FILTER_XL_CONF_OIS[1:0]
Accelerometer output values are in registers OUTX_L_XL (28h) through OUTZ_H_XL (2Dh) and ODR at
6.66 kHz.
8.2.1
Accelerometer full scale set from primary interface
If the SPI/I²C primary interface is used, the full-scale setting has been configured by the primary interface and
CTRL3_OIS (72h) must be set to the same full-scale setting of the primary interface.
8.2.2
Accelerometer full scale set from auxiliary SPI
If the configuration uses only the auxiliary SPI, the full scale can be set using the FS[1:0]_XL_OIS
bits in CTRL3_OIS (72h). The configuration of the low-pass filter depends on the setting of the
FILTER_XL_CONF_OIS[1:0] bits in register CTRL3_OIS (72h).
DS12171 - Rev 4
page 36/113
ISM330DLC
Register mapping
9
Register mapping
The table given below provides a list of the 8/16-bit registers embedded in the device and the corresponding
addresses.
Table 19. Registers address map
Name
Type
RESERVED
Default
Comment
00000000
-
Reserved
01
00000001
00000000
Embedded functions configuration register
-
02
00000010
-
Reserved
RESERVED
-
03
00000011
-
Reserved
SENSOR_SYNC_
TIME_FRAME
R/W
04
00000100
00000000
SENSOR_SYNC_
RES_RATIO
R/W
05
00000101
00000000
FIFO_CTRL1
R/W
06
00000110
00000000
FIFO_CTRL2
R/W
07
00000111
00000000
FIFO_CTRL3
R/W
08
00001000
00000000
FIFO_CTRL4
R/W
09
00001001
00000000
FIFO_CTRL5
R/W
0A
00001010
00000000
DRDY_PULSE_CFG
R/W
0B
00001011
00000000
RESERVED
-
0C
00001100
-
Reserved
INT1_CTRL
R/W
0D
00001101
00000000
INT1 pin control
INT2_CTRL
R/W
0E
00001110
00000000
INT2 pin control
WHO_AM_I
R
0F
00001111
01101010
Who I am ID
CTRL1_XL
R/W
10
00010000
00000000
CTRL2_G
R/W
11
00010001
00000000
CTRL3_C
R/W
12
00010010
00000100
CTRL4_C
R/W
13
00010011
00000000
CTRL5_C
R/W
14
00010100
00000000
CTRL6_C
R/W
15
00010101
00000000
CTRL7_G
R/W
16
00010110
00000000
CTRL8_XL
R/W
17
0001 0111
00000000
CTRL9_XL
R/W
18
00011000
11100000
CTRL10_C
R/W
19
00011001
00000000
MASTER_CONFIG
R/W
1A
00011010
00000000
WAKE_UP_SRC
R
1B
00011011
output
TAP_SRC
R
1C
00011100
output
D6D_SRC
R
1D
00011101
output
R
1E
00011110
output
Status data register for GP and OIS data
RESERVED
-
1F
00011111
-
Reserved
OUT_TEMP_L
R
20
00100000
output
Temperature output data registers
Hex
Binary
-
00
FUNC_CFG_ACCESS
R/W
RESERVED
STATUS_REG/(1)(2)
STATUS_SPIAux
DS12171 - Rev 4
Register address
Sensor sync configuration register
FIFO configuration registers
Accelerometer and gyroscope control registers
I²C master configuration register
Interrupt registers
page 37/113
ISM330DLC
Register mapping
DS12171 - Rev 4
Name
Type
OUT_TEMP_H
Register address
Default
Comment
00100001
output
Temperature output data registers
22
00100010
output
R
23
00100011
output
OUTY_L_G
R
24
00100100
output
OUTY_H_G
R
25
00100101
output
OUTZ_L_G
R
26
00100110
output
Hex
Binary
R
21
OUTX_L_G
R
OUTX_H_G
OUTZ_H_G
R
27
00100111
output
OUTX_L_XL
R
28
00101000
output
OUTX_H_XL
R
29
00101001
output
OUTY_L_XL
R
2A
00101010
output
OUTY_H_XL
R
2B
00101011
output
OUTZ_L_XL
R
2C
00101100
output
OUTZ_H_XL
R
2D
00101101
output
SENSORHUB1_REG
R
2E
00101110
output
SENSORHUB2_REG
R
2F
00101111
output
SENSORHUB3_REG
R
30
00110000
output
SENSORHUB4_REG
R
31
00110001
output
SENSORHUB5_REG
R
32
00110010
output
SENSORHUB6_REG
R
33
00110011
output
SENSORHUB7_REG
R
34
00110100
output
SENSORHUB8_REG
R
35
00110101
output
SENSORHUB9_REG
R
36
00110110
output
SENSORHUB10_REG
R
37
00110111
output
SENSORHUB11_REG
R
38
00111000
output
SENSORHUB12_REG
R
39
00111001
output
FIFO_STATUS1
R
3A
00111010
output
FIFO_STATUS2
R
3B
00111011
output
FIFO_STATUS3
R
3C
00111100
output
FIFO_STATUS4
R
3D
00111101
output
FIFO_DATA_OUT_L
R
3E
00111110
output
FIFO_DATA_OUT_H
R
3F
00111111
output
TIMESTAMP0_REG
R
40
01000000
output
TIMESTAMP1_REG
R
41
01000001
output
TIMESTAMP2_REG
R/W
42
01000010
output
RESERVED
-
43-4C
SENSORHUB13_REG
R
4D
01001101
output
-
SENSORHUB14_REG
R
4E
01001110
output
SENSORHUB15_REG
R
4F
01001111
output
SENSORHUB16_REG
R
50
01010000
output
SENSORHUB17_REG
R
51
01010001
output
Gyroscope output registers for GP and OIS data
Accelerometer output registers
Sensor hub output registers
FIFO status registers
FIFO data output registers
Timestamp output registers
Reserved
Sensor hub output registers
page 38/113
ISM330DLC
Register mapping
Name
Type
SENSORHUB18_REG
Register address
Default
Comment
01010010
output
Sensor hub output registers
53
01010011
output
R
54
01010100
output
RESERVED
-
55-57
TAP_CFG
R/W
58
01011000
00000000
TAP_THS_6D
R/W
59
01011001
00000000
Hex
Binary
R
52
FUNC_SRC1
R
FUNC_SRC2
Interrupt registers
-
INT_DUR2
R/W
5A
01011010
00000000
WAKE_UP_THS
R/W
5B
01011011
00000000
WAKE_UP_DUR
R/W
5C
01011100
00000000
FREE_FALL
R/W
5D
01011101
00000000
MD1_CFG
R/W
5E
01011110
00000000
MD2_CFG
R/W
5F
01011111
00000000
MASTER_CMD_CODE
R/W
60
01100000
00000000
SENS_SYNC_SPI_
ERROR_CODE
R/W
61
0110 0001
00000000
RESERVED
-
62-65
OUT_MAG_RAW_X_L
R
66
01100110
output
OUT_MAG_RAW_X_H
R
67
01100111
output
OUT_MAG_RAW_Y_L
R
68
01101000
output
OUT_MAG_RAW_Y_H
R
69
01101001
output
OUT_MAG_RAW_Z_L
R
6A
01101010
output
OUT_MAG_RAW_Z_H
R
6B
01101011
output
RESERVED
-
6C-6E
INT_OIS
R/W
6F
01101111
00000000
CTRL1_OIS
R/W
70
01110000
00000000
CTRL2_OIS
R/W
71
01110001
00000000
CTRL3_OIS
R/W
72
01110010
00000000
X_OFS_USR
R/W
73
01110011
00000000
Y_OFS_USR
R/W
74
01110100
00000000
Z_OFS_USR
R/W
75
01110101
00000000
RESERVED
-
76-7F
Reserved
Interrupt registers
-
Reserved
External magnetometer raw data output registers
-
Reserved
Control registers for OIS connection
Accelerometer
user offset correction
-
Reserved
1. This register status is read using the auxiliary SPI for OIS data.
2. This register status is read using the primary interface for general-purpose interface data.
Reserved registers must not be changed. Writing to those registers may cause permanent damage to the device.
The content of the registers that are loaded at boot should not be changed. They contain the factory calibration
values. Their content is automatically restored when the device is powered up.
DS12171 - Rev 4
page 39/113
ISM330DLC
Register description
10
Register description
The device contains a set of registers which are used to control its behavior and to retrieve linear acceleration,
angular rate and temperature data. The register addresses, made up of 7 bits, are used to identify them and to
write the data through the serial interface.
10.1
FUNC_CFG_ACCESS (01h)
Enable embedded functions register (R/W)
Table 20. FUNC_CFG_ACCESS register
0(1)
FUNC_CFG_EN
0(1)
0(1)
0(1)
0(1)
0(1)
0(1)
1. This bit must be set to 0 for the correct operation of the device.
Table 21. FUNC_CFG_ACCESS register description
Enable access to the embedded functions configuration registers(1). Default value: 0
FUNC_CFG_EN
(0: register access disabled;
1: register access enabled)
1. The embedded functions configuration registers details are available in Section 11 Embedded functions register mapping,
and Section 12 Embedded functions registers description.
10.2
SENSOR_SYNC_TIME_FRAME (04h)
Sensor synchronization time frame register (R/W)
Table 22. SENSOR_SYNC_TIME_FRAME register
0(1)
0(1)
0(1)
0(1)
TPH_3
TPH_2
TPH_1
TPH_0
1. This bit must be set to 0 for the correct operation of the device.
Table 23. SENSOR_SYNC_TIME_FRAME register description
TPH_ [3:0]
10.3
Sensor synchronization time frame with a step of 500 ms and full range of 5 s. Unsigned 8-bit.
Default value: 0000 0000 (sensor sync disabled)
SENSOR_SYNC_RES_RATIO (05h)
Sensor synchronization resolution ratio (R/W)
Table 24. SENSOR_SYNC_RES_RATIO register
0(1)
0(1)
0(1)
0(1)
0(1)
0(1)
RR_1
RR_0
1. This bit must be set to 0 for the correct operation of the device.
Table 25. SENSOR_SYNC_RES_RATIO register description
Resolution ratio of error code for sensor synchronization.
(00: SensorSync, Res_Ratio = 211
RR_[1:0]
01: SensorSync, Res_Ratio = 212
10: SensorSync, Res_Ratio = 213
11: SensorSync, Res_Ratio = 214)
DS12171 - Rev 4
page 40/113
ISM330DLC
FIFO_CTRL1 (06h)
10.4
FIFO_CTRL1 (06h)
FIFO control register (R/W)
Table 26. FIFO_CTRL1 register
FTH_7
FTH_6
FTH_5
FTH_4
FTH_3
FTH_2
FTH_1
FTH_0
Table 27. FIFO_CTRL1 register description
FIFO threshold level setting. Default value: 0000 0000(1)
FTH_[7:0]
Watermark flag rises when the number of bytes written to FIFO after the next write is greater than or equal to the
threshold level.
Minimum resolution for the FIFO is 1 LSB = 2 bytes (1 word) in FIFO.
1. For the complete watermark threshold configuration, consider FTH_[10:8] in FIFO_CTRL2 (07h).
10.5
FIFO_CTRL2 (07h)
FIFO control register (R/W)
Table 28. FIFO_CTRL2 register
FIFO_
TIMER_EN
0(1)
0(1)
0(1)
FIFO_
TEMP_EN
FTH10
FTH_9
FTH_8
1. This bit must be set to 0 for the correct operation of the device.
Table 29. FIFO_CTRL2 register description
FIFO_TIMER_EN
FIFO_TEMP_EN
Enables timestamp data to be stored as the 4th FIFO data set.
(0: timestamp not included in FIFO; 1: timestamp included in FIFO)
Enables the temperature data storage in FIFO. Default: 0
(0: temperature not included in FIFO; 1: temperature included in FIFO)
FIFO threshold level setting. Default value: 0000(1)
FTH_[10:8]
Watermark flag rises when the number of bytes written to FIFO after the next write is greater than or equal
to the threshold level.
Minimum resolution for the FIFO is 1LSB = 2 bytes (1 word) in FIFO
1. For the complete watermark threshold configuration, consider FTH_[7:0] in FIFO_CTRL1 (06h)
DS12171 - Rev 4
page 41/113
ISM330DLC
FIFO_CTRL3 (08h)
10.6
FIFO_CTRL3 (08h)
FIFO control register (R/W)
Table 30. FIFO_CTRL3 register
0(1)
DEC_FIFO_
GYRO2
0(1)
DEC_FIFO_
GYRO1
DEC_FIFO_
GYRO0
DEC_FIFO_
XL2
DEC_FIFO_
XL1
DEC_FIFO_
XL0
1. This bit must be set to 0 for the correct operation of the device.
Table 31. FIFO_CTRL3 register description
Gyroscope FIFO (first data set) decimation setting. Default: 000
DEC_FIFO_GYRO[2:0]
For the configuration setting, refer to Table 32.
Accelerometer FIFO (second data set) decimation setting. Default: 000
DEC_FIFO_XL[2:0]
For the configuration setting, refer to Table 33.
Table 32. Gyroscope FIFO decimation setting
DEC_FIFO_GYRO[2:0]
Configuration
000
Gyroscope sensor not in FIFO
001
No decimation
010
Decimation with factor 2
011
Decimation with factor 3
100
Decimation with factor 4
101
Decimation with factor 8
110
Decimation with factor 16
111
Decimation with factor 32
Table 33. Accelerometer FIFO decimation setting
DEC_FIFO_XL [2:0]
DS12171 - Rev 4
Configuration
000
Accelerometer sensor not in FIFO
001
No decimation
010
Decimation with factor 2
011
Decimation with factor 3
100
Decimation with factor 4
101
Decimation with factor 8
110
Decimation with factor 16
111
Decimation with factor 32
page 42/113
ISM330DLC
FIFO_CTRL4 (09h)
10.7
FIFO_CTRL4 (09h)
FIFO control register (R/W)
Table 34. FIFO_CTRL4 register
STOP_ON_
FTH
ONLY_HIGH_
DATA
DEC_DS4_
FIFO2
DEC_DS4_
FIFO1
DEC_DS4_
FIFO0
DEC_DS3_
FIFO2
DEC_DS3_
FIFO1
DEC_DS3_
FIFO0
Table 35. FIFO_CTRL4 register description
STOP_ON_FTH
Enables FIFO threshold level use. Default value: 0.
(0: FIFO depth is not limited; 1: FIFO depth is limited to threshold level)
8-bit data storage in FIFO. Default: 0
ONLY_HIGH_DATA
(0: disable MSByte only memorization in FIFO for accelerometer and gyroscope;
1: enable MSByte only memorization in FIFO for accelerometer and gyroscope in FIFO)
DEC_DS4_FIFO[2:0] Fourth FIFO data set decimation setting. Default: 000. For the configuration setting, refer to Table 36.
DEC_DS3_FIFO[2:0] Third FIFO data set decimation setting. Default: 000. For the configuration setting, refer to Table 37.
Table 36. Fourth FIFO data set decimation setting
DEC_DS4_FIFO[2:0]
Configuration
000
Fourth FIFO data set not in FIFO
001
No decimation
010
Decimation with factor 2
011
Decimation with factor 3
100
Decimation with factor 4
101
Decimation with factor 8
110
Decimation with factor 16
111
Decimation with factor 32
Table 37. Third FIFO data set decimation setting
DEC_DS3_FIFO[2:0]
DS12171 - Rev 4
Configuration
000
Third FIFO data set not in FIFO
001
No decimation
010
Decimation with factor 2
011
Decimation with factor 3
100
Decimation with factor 4
101
Decimation with factor 8
110
Decimation with factor 16
111
Decimation with factor 32
page 43/113
ISM330DLC
FIFO_CTRL5 (0Ah)
10.8
FIFO_CTRL5 (0Ah)
FIFO control register (R/W)
Table 38. FIFO_CTRL5 register
0(1)
ODR_FIFO_3
ODR_FIFO_2
ODR_FIFO_1
ODR_FIFO_0
FIFO_MODE_2 FIFO_MODE_1 FIFO_MODE_0
1. This bit must be set to 0 for the correct operation of the device.
Table 39. FIFO_CTRL5 register description
FIFO ODR selection, setting FIFO_MODE also. Default: 0000
ODR_FIFO_[3:0]
For the configuration setting, refer to Table 40.
FIFO mode selection bits, setting ODR_FIFO also. Default value: 000
FIFO_MODE_[2:0]
For the configuration setting, refer to Table 41.
Table 40. FIFO ODR selection
ODR_FIFO_[3:0]
Configuration
0000
FIFO disabled
0001
FIFO ODR is set to 12.5 Hz
0010
FIFO ODR is set to 26 Hz
0011
FIFO ODR is set to 52 Hz
0100
FIFO ODR is set to 104 Hz
0101
FIFO ODR is set to 208 Hz
0110
FIFO ODR is set to 416 Hz
0111
FIFO ODR is set to 833 Hz
1000
FIFO ODR is set to 1.66 kHz
1001
FIFO ODR is set to 3.33 kHz
1010
FIFO ODR is set to 6.66 kHz
1. If the device is working at an ODR slower than the one selected, FIFO ODR is limited to that ODR value. Moreover, these
bits are active if the DATA_VALID_SEL FIFO bit of MASTER_CONFIG (1Ah) is set to 0.
Table 41. FIFO mode selection
FIFO_MODE_[2:0]
DS12171 - Rev 4
Configuration mode
000
Bypass mode. FIFO disabled.
001
FIFO mode. Stops collecting data when FIFO is full.
010
Reserved
011
Continuous mode until trigger is deasserted, then FIFO mode.
100
Bypass mode until trigger is deasserted, then continuous mode.
101
Reserved
110
Continuous mode. If the FIFO is full, the new sample overwrites the older one.
111
Reserved
page 44/113
ISM330DLC
DRDY_PULSE_CFG (0Bh)
10.9
DRDY_PULSE_CFG (0Bh)
Data-ready configuration register (R/W)
Table 42. DRDY_PULSE_CFG register
DRDY_
PULSED
0(1)
0(1)
0(1)
0(1)
0(1)
0(1)
0(1)
1. This bit must be set to 0 for the correct operation of the device.
Table 43. DRDY_PULSE_CFG register description
Enables pulsed data-ready mode. Default value: 0
DRDY_PULSED
(0: data-ready latched mode. Returns to 0 only after output data has been read;
1: data-ready pulsed mode. The data-ready pulses are 75 µs long.)
10.10
INT1_CTRL (0Dh)
INT1 pad control register (R/W)
Each bit in this register enables a signal to be carried over INT1. The pad’s output supplies the OR combination of
the selected signals.
Table 44. INT1_CTRL register
0(1)
0(1)
INT1_
FULL_FLAG
INT1_FIFO_OVR
INT1_FTH
INT1_ BOOT
INT1_ DRDY_G
INT1_DRDY_XL
1. This bit must be set to 0 for the correct operation of the device.
Table 45. INT1_CTRL register description
INT1_FULL_FLAG
INT1_FIFO_OVR
INT1_FTH
INT1_ BOOT
INT1_DRDY_G
INT1_DRDY_XL
DS12171 - Rev 4
FIFO full flag interrupt enable on INT1 pad. Default value: 0
(0: disabled; 1: enabled)
FIFO overrun interrupt on INT1 pad. Default value: 0
(0: disabled; 1: enabled)
FIFO threshold interrupt on INT1 pad. Default value: 0
(0: disabled; 1: enabled)
Boot status available on INT1 pad. Default value: 0
(0: disabled; 1: enabled)
Gyroscope data-ready on INT1 pad. Default value: 0
(0: disabled; 1: enabled)
Accelerometer data-ready on INT1 pad. Default value: 0
(0: disabled; 1: enabled)
page 45/113
ISM330DLC
INT2_CTRL (0Eh)
10.11
INT2_CTRL (0Eh)
INT2 pad control register (R/W)
Each bit in this register enables a signal to be carried over INT2. The pad’s output supplies the OR combination of
the selected signals.
Table 46. INT2_CTRL register
0(1)
0(1)
INT2_
FULL_FLAG
INT2_FIFO_OVR
INT2_ FTH
INT2_
DRDY_TEMP
INT2_ DRDY_G
INT2_DRDY_XL
1
0
1. This bit must be set to 0 for the correct operation of the device.
Table 47. INT2_CTRL register description
FIFO full flag interrupt enable on INT2 pad. Default value: 0
INT2_ FULL_FLAG
(0: disabled; 1: enabled)
FIFO overrun interrupt on INT2 pad. Default value: 0
INT2_FIFO_OVR
(0: disabled; 1: enabled)
FIFO threshold interrupt on INT2 pad. Default value: 0
INT2_FTH
(0: disabled; 1: enabled)
Temperature data-ready on INT2 pad. Default value: 0
INT2_DRDY_TEMP
(0: disabled; 1: enabled)
Gyroscope data-ready on INT2 pad. Default value: 0
INT2_DRDY_G
(0: disabled; 1: enabled)
Accelerometer data-ready on INT2 pad. Default value: 0
INT2_DRDY_XL
10.12
(0: disabled; 1: enabled)
WHO_AM_I (0Fh)
Who_AM_I register (R). This register is a read-only register. Its value is fixed at 6Ah.
Table 48. WHO_AM_I register
0
DS12171 - Rev 4
1
1
0
1
0
page 46/113
ISM330DLC
CTRL1_XL (10h)
10.13
CTRL1_XL (10h)
Linear acceleration sensor control register 1 (R/W)
Table 49. CTRL1_XL register
ODR_XL3
ODR_XL2
ODR_XL1
ODR_XL0
FS_XL1
FS_XL0
LPF1_BW_SEL
BW0_XL
Table 50. CTRL1_XL register description
ODR_XL [3:0]
Output data rate and power mode selection. Default value: 0000 (see Table 51).
Accelerometer full-scale selection. Default value: 00
FS_XL [1:0]
(00: ±2 g; 01: ±16 g; 10: ±4 g; 11: ±8 g)
LPF1_BW_SEL
Accelerometer digital LPF (LPF1) bandwidth selection. For bandwidth selection refer to CTRL8_XL (17h).
Accelerometer analog chain bandwidth selection (only for accelerometer ODR ≥ 1.67 kHz).
BW0_XL
(0: BW @ 1.5 kHz;
1: BW @ 400 Hz)
Table 51. Accelerometer ODR register setting
ODR_XL3 ODR_XL2 ODR_XL1 ODR_XL0
DS12171 - Rev 4
ODR selection [Hz] when
XL_HM_MODE = 1
ODR selection [Hz] when
XL_HM_MODE = 0
0
0
0
0
Power-down
Power-down
1
0
1
1
1.6 Hz (low power only)
12.5 Hz (high performance)
0
0
0
1
12.5 Hz (low power)
12.5 Hz (high performance)
0
0
1
0
26 Hz (low power)
26 Hz (high performance)
0
0
1
1
52 Hz (low power)
52 Hz (high performance)
0
1
0
0
104 Hz (normal mode)
104 Hz (high performance)
0
1
0
1
208 Hz (normal mode)
208 Hz (high performance)
0
1
1
0
416 Hz (high performance)
416 Hz (high performance)
0
1
1
1
833 Hz (high performance)
833 Hz (high performance)
1
0
0
0
1.66 kHz (high performance)
1.66 kHz (high performance)
1
0
0
1
3.33 kHz (high performance)
3.33 kHz (high performance)
1
0
1
0
6.66 kHz (high performance)
6.66 kHz (high performance)
1
1
x
x
Not allowed
Not allowed
page 47/113
ISM330DLC
CTRL2_G (11h)
10.14
CTRL2_G (11h)
Angular rate sensor control register 2 (R/W)
Table 52. CTRL2_G register
ODR_G3
ODR_G2
ODR_G1
ODR_G0
FS_G1
FS_G0
FS_125
0(1)
1. This bit must be set to ‘0’ for the correct operation of the device.
Table 53. CTRL2_G register description
Gyroscope output data rate selection. Default value: 0000
ODR_G [3:0]
(Refer to Table 54)
Gyroscope full-scale selection. Default value: 00
FS_G [1:0]
(00: ±250 dps; 01: ±500 dps; 10: ±1000 dps; 11: ±2000 dps)
Gyroscope full-scale at ±125 dps. Default value: 0
FS_125
(0: disabled; 1: enabled)
Table 54. Gyroscope ODR configuration setting
ODR [Hz] when
G_HM_MODE = 1
ODR [Hz] when
G_HM_MODE = 0
ODR_G3
ODR_G2
ODR_G1
ODR_G0
0
0
0
0
Power down
Power down
0
0
0
1
12.5 Hz (low power)
12.5 Hz (high performance)
0
0
1
0
26 Hz (low power)
26 Hz (high performance)
0
0
1
1
52 Hz (low power)
52 Hz (high performance)
0
1
0
0
104 Hz (normal mode)
104 Hz (high performance)
0
1
0
1
208 Hz (normal mode)
208 Hz (high performance)
0
1
1
0
416 Hz (high performance)
416 Hz (high performance)
0
1
1
1
833 Hz (high performance)
833 Hz (high performance)
1
0
0
0
1.66 kHz (high performance)
1.66 kHz (high performance)
1
0
0
1
3.33 kHz (high performance
3.33 kHz (high performance)
1
0
1
0
6.66 kHz (high performance
6.66 kHz (high performance)
1
0
1
1
Not available
Not available
DS12171 - Rev 4
page 48/113
ISM330DLC
CTRL3_C (12h)
10.15
CTRL3_C (12h)
Control register 3 (R/W)
Table 55. CTRL3_C register
BOOT
BDU
H_LACTIVE
PP_OD
SIM
IF_INC
BLE
SW_RESET
Table 56. CTRL3_C register description
BOOT
Reboots memory content. Default value: 0
(0: normal mode; 1: reboot memory content)
Block data update. Default value: 0
BDU
(0: continuous update;
1: output registers not updated until MSB and LSB have been read)
H_LACTIVE
PP_OD
SIM
IF_INC
Interrupt activation level. Default value: 0
(0: interrupt output pads active high; 1: interrupt output pads active low)
Push-pull/open-drain selection on INT1 and INT2 pads. Default value: 0
(0: push-pull mode; 1: open-drain mode)
SPI serial interface mode selection. Default value: 0
(0: 4-wire interface; 1: 3-wire interface)
Register address automatically incremented during a multiple byte access with a serial interface (I²C or SPI).
Default value: 1
(0: disabled; 1: enabled)
BLE
Big/little endian data selection. Default value 0
(0: data LSB @ lower address; 1: data MSB @ lower address)
Software reset. Default value: 0
SW_RESET (0: normal mode; 1: reset device)
This bit is automatically cleared.
DS12171 - Rev 4
page 49/113
ISM330DLC
CTRL4_C (13h)
10.16
CTRL4_C (13h)
Control register 4 (R/W)
Table 57. CTRL4_C register
DEN_XL_EN
SLEEP
INT2_on_INT1
DEN_DRDY
_INT1
DRDY_MASK
I2C_disable
LPF1_SEL_G
0(1)
1. This bit must be set to '0' for the correct operation of the device.
Table 58. CTRL4_C register description
DEN_XL_EN
SLEEP
Extend DEN functionality to accelerometer sensor. Default value: 0
(0: disabled; 1: enabled)
Gyroscope sleep mode enable. Default value: 0
(0: disabled; 1: enabled)
Enables all interrupt signals available on INT1 pad. Default value: 0
INT2_on_INT1
(0: interrupt signals divided between INT1 and INT2 pads;
1: all interrupt signals in logic or on INT1 pad)
DEN_DRDY_INT1
DRDY_MASK
I2C_disable
LPF1_SEL_G
DEN DRDY signal on INT1 pad. Default value: 0
(0: disabled; 1: enabled)
Configuration 1 data available enable bit. Default value: 0
(0: DA timer disabled; 1: DA timer enabled)
Disable I²C interface. Default value: 0
(0: both I²C and SPI enabled; 1: I²C disabled, SPI only)
Enable gyroscope digital LPF1 if the auxiliary SPI is disabled; the bandwidth can be selected through
FTYPE [1:0] in CTRL6_C (15h)
(0: disabled; 1: enabled)
DS12171 - Rev 4
page 50/113
ISM330DLC
CTRL5_C (14h)
10.17
CTRL5_C (14h)
Control register 5 (R/W)
Table 59. CTRL5_C register
ROUNDING2
ROUNDING1
ROUNDING0
DEN_LH
ST1_G
ST0_G
ST1_XL
ST0_XL
Table 60. CTRL5_C register description
Circular burst mode (wraparound) read from output registers through the primary interface. Default value:
ROUNDING[2:0] 000
(000: no wraparound; others: refer to Table 61)
DEN active level configuration. Default value: 0
DEN_LH
(0: active low; 1: active high)
Enables angular rate sensor self-test. Default value: 00
ST_G [1:0]
(00: self-test disabled; others: refer to Table 62)
Enables linear acceleration sensor self-test. Default value: 00
ST_XL [1:0]
(00: self-test disabled; others: refer to Table 63)
Table 61. Output registers wraparound pattern
ROUNDING[2:0]
Wraparound pattern
000
No wraparound
001
Accelerometer only
010
Gyroscope only
011
Gyroscope + accelerometer
100
Registers from SENSORHUB1_REG (2Eh) to SENSORHUB6_REG (33h) only
101
Accelerometer + registers from SENSORHUB1_REG (2Eh) to SENSORHUB6_REG (33h)
110
Gyroscope + accelerometer + registers from SENSORHUB1_REG (2Eh) to SENSORHUB6_REG (33h)
and registers from SENSORHUB7_REG (34h) to SENSORHUB12_REG (39h)
111
Gyroscope + accelerometer + registers from SENSORHUB1_REG (2Eh) to SENSORHUB6_REG (33h)
Table 62. Angular rate sensor self-test mode selection
ST1_G
ST0_G
0
0
Normal mode
0
1
Positive sign self-test
1
0
Not allowed
1
1
Negative sign self-test
Self-test mode
Table 63. Linear acceleration sensor self-test mode selection
DS12171 - Rev 4
ST1_XL
ST0_XL
0
0
Normal mode
0
1
Positive sign self-test
1
0
Negative sign self-test
1
1
Not allowed
Self-test mode
page 51/113
ISM330DLC
CTRL6_C (15h)
10.18
CTRL6_C (15h)
Angular rate sensor control register 6 (R/W)
Table 64. CTRL6_C register
TRIG_EN
LVL1_EN
LVL2_EN
XL_HM_MODE
0(1)
USR_OFF_W
FTYPE_1
FTYPE_0
1. This bit must be set to 0 for the correct operation of the device.
Table 65. CTRL6_C register description
TRIG_EN
Enables DEN data edge-sensitive trigger. Refer to Table 66.
LVL1_EN
Enables DEN data level-sensitive trigger. Refer to Table 66.
LVL2_EN
Enables DEN level-sensitive latched. Refer to Table 66.
Disables high-performance operating mode for accelerometer. Default value: 0
XL_HM_MODE
(0: high-performance operating mode enabled;
1: high-performance operating mode disabled)
Weight of XL user offset bits of registers X_OFS_USR (73h), Y_OFS_USR (74h), Z_OFS_USR (75h)
USR_OFF_W
(0: 2-10 g/LSB;
1: 2-6 g/LSB)
FTYPE[1:0]
Gyroscope low-pass filter (LPF1) bandwidth selection.
Table 67 shows the selectable bandwidth values (available if the auxiliary SPI is disabled).
Table 66. Trigger mode selection
TRIG_EN, LVL1_EN, LVL2_EN
Trigger mode
100
Edge-sensitive trigger mode is selected
010
Level-sensitive trigger mode is selected
011
Level-sensitive latched mode is selected
110
Level-sensitive FIFO enable mode is selected
Table 67. Gyroscope LPF1 bandwidth selection
FTYPE[1:0]
ODR = 800 Hz
ODR = 1.6 kHz
ODR = 3.3 kHz
ODR = 6.6 kHz
BW
Phase delay (1)
BW
Phase delay(1)
BW
Phase delay(1)
BW
Phase delay(1)
00
245 Hz
14°
315 Hz
10°
343 Hz
8°
351 Hz
7°
01
195 Hz
17°
224 Hz
12°
234 Hz
10°
237 Hz
9°
10
155 Hz
19°
168 Hz
15°
172 Hz
12°
173 Hz
11°
11
293 Hz
13°
505 Hz
8°
925 Hz
6°
937 Hz
5°
1. Phase delay @ 20 Hz
DS12171 - Rev 4
page 52/113
ISM330DLC
CTRL7_G (16h)
10.19
CTRL7_G (16h)
Angular rate sensor control register 7 (R/W)
Table 68. CTRL7_G register
G_HM_MODE
HP_EN_G
HPM1_G
HPM0_G
0(1)
ROUNDING
_STATUS
0(1)
0(1)
1. This bit must be set to 0 for the correct operation of the device.
Table 69. CTRL7_G register description
Disables high-performance operating mode for gyroscope. Default: 0
G_HM_MODE
(0: high-performance operating mode enabled;
1: high-performance operating mode disabled)
HP_EN_G
Enables gyroscope digital high-pass filter. The filter is enabled only if the gyroscope is in HP mode.
Default value: 0
(0: HPF disabled; 1: HPF enabled)
Gyroscope digital HP filter cutoff selection. Default: 00
(00: 16 mHz;
HPM_G[1:0]
01: 65 mHz;
10: 260 mHz;
11: 1.04 Hz)
Source register wraparound function on WAKE_UP_SRC (1Bh), TAP_SRC (1Ch), D6D_SRC (1Dh),
STATUS_REG (1Eh), and FUNC_SRC1 (53h) registers in the primary interface.
ROUNDING_STATUS
Default value: 0
(0: wraparound disabled; 1: wraparound enabled)
DS12171 - Rev 4
page 53/113
ISM330DLC
CTRL8_XL (17h)
10.20
CTRL8_XL (17h)
Linear acceleration sensor control register 8 (R/W)
Table 70. CTRL8_XL register
LPF2_XL_EN
HPCF_XL1
HPCF_XL0
HP_REF_MODE
INPUT_
COMPOSITE
HP_SLOPE_XL_
EN
0(1)
LOW_PASS_ON
_6D
1. This bit must be set to ‘0’ for the correct operation of the device.
Table 71. CTRL8_XL register description
LPF2_XL_EN
Accelerometer low-pass filter LPF2 selection. Refer to Figure 9.
HPCF_XL[1:0]
Accelerometer LPF2 and high-pass filter configuration and cutoff setting. Refer to Table 72.
HP_REF_MODE
Enable HP filter reference mode. Default value: 0(1)
(0: disabled; 1: enabled)
Composite filter input selection. Default: 0
INPUT_COMPOSITE
(0: ODR/2 low pass filtered sent to composite filter (default)
1: ODR/4 low pass filtered sent to composite filter)
HP_SLOPE_XL_EN
Accelerometer slope filter / high-pass filter selection. Refer to Figure 9.
LOW_PASS_ON_6D
LPF2 on 6D function selection. Refer to Figure 9.
1. When enabled, the first output data has to be discarded.
Table 72. Accelerometer bandwidth selection
HP_SLOPE_
XL_EN
LPF2_XL_EN
0
LPF1_BW_SEL
HPCF_XL[1:0]
INPUT_
COMPOSITE
Bandwidth
0
-
-
ODR/2
1
-
-
ODR/4
00
0(1)
(low-pass path)
1
-
ODR/50
01
1 (low noise)
ODR/100
10
0 (low latency)
ODR/9
11
1(2)
(high-pass path)
-
-
ODR/400
00
ODR/4
01
ODR/100
10
11
0
ODR/9
ODR/400
1. The bandwidth column is related to LPF1 if LPF2_XL_EN = 0 or to LPF2 if LPF2_XL_EN = 1.
2. The bandwidth column is related to the slope filter if HPCF_XL[1:0] = 00 or to the HP filter if HPCF_XL[1:0] = 01/10/11.
DS12171 - Rev 4
page 54/113
ISM330DLC
CTRL9_XL (18h)
10.21
CTRL9_XL (18h)
Linear acceleration sensor control register 9 (R/W)
Table 73. CTRL9_XL register
DEN_X
DEN_Y
DEN_Z
0(1)
DEN_XL_G
SOFT_EN
0(1)
0(1)
1. This bit must be set to 0 for the correct operation of the device.
Table 74. CTRL9_XL register description
DEN_X
DEN_Y
DEN_Z
DEN value stored in LSB of X-axis. Default value: 1
(0: DEN not stored in X-axis LSB; 1: DEN stored in X-axis LSB)
DEN value stored in LSB of Y-axis. Default value: 1
(0: DEN not stored in Y-axis LSB; 1: DEN stored in Y-axis LSB)
DEN value stored in LSB of Z-axis. Default value: 1
(0: DEN not stored in Z-axis LSB; 1: DEN stored in Z-axis LSB)
DEN stamping sensor selection. Default value: 0
DEN_XL_G
(0: DEN pin info stamped in the gyroscope axis selected by bits [7:5];
1: DEN pin info stamped in the accelerometer axis selected by bits [7:5])
Enable soft-iron correction algorithm for magnetometer. Default value: 0 (1)
SOFT_EN
(0: soft-iron correction algorithm disabled;
1: soft-iron correction algorithm enabled)
1. This bit is active if the IRON_EN bit of MASTER_CONFIG (1Ah) and FUNC_EN bit of CTRL10_C (19h) are set to 1.
10.22
CTRL10_C (19h)
Control register 10 (R/W)
Table 75. CTRL10_C register
0(1)
0(1)
TIMER_EN
0(1)
TILT_EN
FUNC_EN
0(1)
0(1)
1. This bit must be set to 0 for the correct operation of the device.
Table 76. CTRL10_C register description
Enables timestamp count. The count is saved in TIMESTAMP0_REG (40h), TIMESTAMP1_REG (41h) and
TIMER_EN TIMESTAMP2_REG (42h). Default: 0
(0: timestamp count disabled; 1: timestamp count enabled)
TILT_EN
Enables tilt calculation.(1)
Enables embedded functionalities (tilt, sensor hub and ironing). Default value: 0
FUNC_EN
(0: disable functionalities of embedded functions and accelerometer filters;
1: enable functionalities of embedded functions and accelerometer filters)
1. This bit is active if the FUNC_EN bit is set to 1.
DS12171 - Rev 4
page 55/113
ISM330DLC
MASTER_CONFIG (1Ah)
10.23
MASTER_CONFIG (1Ah)
Master configuration register (R/W)
Table 77. MASTER_CONFIG register
DRDY_ON_INT1
DATA_VALID
_SEL_FIFO
0(1)
START_CONFIG
PULL_UP_EN
PASS_
THROUGH_MO
DE
IRON_EN
MASTER_ON
1. This bit must be set to 0 for the correct operation of the device.
Table 78. MASTER_CONFIG register description
DRDY_ON_INT1
Manages the master DRDY signal on INT1 pad. Default: 0
(0: disable master DRDY on INT1; 1: enable master DRDY on INT1)
Selection of FIFO data-valid signal. Default value: 0
DATA_VALID_SEL_FIFO
(0: data-valid signal used to write data in FIFO is the accelerometer/gyroscope data-ready;
1: data-valid signal used to write data in FIFO is the sensor hub data-ready)
Sensor hub trigger signal selection. Default value: 0
START_CONFIG
(0: sensor hub signal is the accelerometer/gyroscope data-ready;
1: sensor hub signal external from INT2 pad.)
Auxiliary I²C pull-up. Default value: 0
PULL_UP_EN
(0: internal pull-up on auxiliary I²C line disabled;
1: internal pull-up on auxiliary I²C line enabled)
PASS_THROUGH_MODE
I²C interface pass-through. Default value: 0
(0: pass-through disabled; 1: pass-through enabled)
Enables hard-iron correction algorithm for magnetometer. Default value: 0(1)
IRON_EN
(0: hard-iron correction algorithm disabled;
1: hard-iron correction algorithm enabled)
MASTER_ON
Enables sensor hub I²C master(1). Default: 0
(0: master I²C of sensor hub disabled; 1: master I²C of sensor hub enabled)
1. This bit is active if the FUNC_EN bit is set to 1.
DS12171 - Rev 4
page 56/113
ISM330DLC
WAKE_UP_SRC (1Bh)
10.24
WAKE_UP_SRC (1Bh)
Wake-up interrupt source register (R)
Table 79. WAKE_UP_SRC register
0
0
FF_IA
SLEEP_
STATE_IA
WU_IA
X_WU
Y_WU
Z_WU
Table 80. WAKE_UP_SRC register description
Free-fall event detection status. Default: 0
FF_IA
(0: free-fall event not detected; 1: free-fall event detected)
Sleep event status. Default value: 0
SLEEP_STATE_IA
(0: sleep event not detected; 1: sleep event detected)
Wake-up event detection status. Default value: 0
WU_IA
(0: wake-up event not detected; 1: wake-up event detected.)
Wake-up event detection status on X-axis. Default value: 0
X_WU
(0: wake-up event on X-axis not detected; 1: wake-up event on X-axis detected)
Wake-up event detection status on Y-axis. Default value: 0
Y_WU
(0: wake-up event on Y-axis not detected; 1: wake-up event on Y-axis detected)
Wake-up event detection status on Z-axis. Default value: 0
Z_WU
10.25
(0: wake-up event on Z-axis not detected; 1: wake-up event on Z-axis detected)
TAP_SRC (1Ch)
Tap source register (R)
Table 81. TAP_SRC register
0
TAP_IA
SINGLE_TAP
DOUBLE_TAP
TAP_SIGN
X_TAP
Y_TAP
Z_TAP
Table 82. TAP_SRC register description
TAP_IA
SINGLE_TAP
DOUBLE_TAP
Tap event detection status. Default: 0
(0: tap event not detected; 1: tap event detected)
Single-tap event status. Default value: 0
(0: single tap event not detected; 1: single tap event detected)
Double-tap event detection status. Default value: 0
(0: double-tap event not detected; 1: double-tap event detected.)
Sign of acceleration detected by tap event. Default: 0
TAP_SIGN
(0: positive sign of acceleration detected by tap event;
1: negative sign of acceleration detected by tap event)
X_TAP
Y_TAP
Z_TAP
DS12171 - Rev 4
Tap event detection status on X-axis. Default value: 0
(0: tap event on X-axis not detected; 1: tap event on X-axis detected)
Tap event detection status on Y-axis. Default value: 0
(0: tap event on Y-axis not detected; 1: tap event on Y-axis detected)
Tap event detection status on Z-axis. Default value: 0
(0: tap event on Z-axis not detected; 1: tap event on Z-axis detected)
page 57/113
ISM330DLC
D6D_SRC (1Dh)
10.26
D6D_SRC (1Dh)
6D orientation source register (R)
Table 83. D6D_SRC register
DEN_DRDY
D6D_IA
ZH
ZL
YH
YL
XH
XL
Table 84. D6D_SRC register description
DEN_DRDY
D6D_IA
ZH
ZL
YH
YL
XH
XL
DEN data-ready signal. It is set high when data output is related to the data coming from a DEN active
condition.(1)
Interrupt active for change position portrait, landscape, face-up, face-down. Default value: 0
(0: change position not detected; 1: change position detected)
Z-axis high event (over threshold). Default value: 0
(0: event not detected; 1: event (overthreshold) detected)
Z-axis low event (under threshold). Default value: 0
(0: event not detected; 1: event (underthreshold) detected)
Y-axis high event (over threshold). Default value: 0
(0: event not detected; 1: event (overthreshold) detected)
Y-axis low event (under threshold). Default value: 0
(0: event not detected; 1: event (underthreshold) detected)
X-axis high event (over threshold). Default value: 0
(0: event not detected; 1: event (overthreshold) detected)
X-axis low event (under threshold). Default value: 0
(0: event not detected; 1: event (underthreshold) detected)
1. The DEN data-ready signal can be latched or pulsed depending on the value of the DRDY_PULSED bit of the
DRDY_PULSE_CFG (0Bh) register.
DS12171 - Rev 4
page 58/113
ISM330DLC
STATUS_REG/STATUS_SPIAux (1Eh)
10.27
STATUS_REG/STATUS_SPIAux (1Eh)
The STATUS_REG register is read by the primary interface SPI/I²C (R).
Table 85. STATUS_REG register
0
0
0
0
0
TDA
GDA
XLDA
GDA
XLDA
Table 86. STATUS_REG register description
Temperature new data available. Default: 0
TDA
(0: no set of data is available at temperature sensor output;
1: a new set of data is available at temperature sensor output)
Gyroscope new data available. Default value: 0
GDA
(0: no set of data available at gyroscope output;
1: a new set of data is available at gyroscope output)
Accelerometer new data available. Default value: 0
XLDA
(0: no set of data available at accelerometer output;
1: a new set of data is available at accelerometer output)
The STATUS_SPIAux register is read by the auxiliary SPI.
Table 87. STATUS_SPIAux register
0
0
0
0
0
GYRO_
SETTLING
Table 88. STATUS_SPIAux description
10.28
GYRO_SETTLING
High when the gyroscope output is in the settling phase
GDA
Gyroscope data available (reset when one of the high bytes of the output data is read)
XLDA
Accelerometer data available (reset when one of the high bytes of the output data is read)
OUT_TEMP_L (20h), OUT_TEMP_H (21h)
Temperature data output register (R). L and H registers together express a 16-bit word in two’s complement.
Table 89. OUT_TEMP_L register
Temp7
Temp6
Temp5
Temp4
Temp3
Temp2
Temp1
Temp0
Temp10
Temp9
Temp8
Table 90. OUT_TEMP_H register
Temp15
Temp14
Temp13
Temp12
Temp11
Table 91. OUT_TEMP register description
Temp[15:0]
DS12171 - Rev 4
Temperature sensor output data
The value is expressed as two’s complement sign extended on the MSB.
page 59/113
ISM330DLC
OUTX_L_G (22h)
10.29
OUTX_L_G (22h)
Angular rate sensor pitch axis (X) angular rate output register (R). The value is expressed as a 16-bit word in
two’s complement.
If this register is read by the primary interface, data are according to the full scale and ODR settings (CTRL2_G
(11h)) of the gyroscope general-purpose interface.
If this register is read by the auxiliary interface, data are according to the full scale and ODR (6.66 kHz) settings of
the OIS gyroscope.
Table 92. OUTX_L_G register
D7
D6
D5
D4
D3
D2
D1
D0
Table 93. OUTX_L_G register description
Pitch axis (X) angular rate value (LSbyte)
D[7:0]
D[15:0] expressed in two’s complement and its value depends on the interface used:
SPI1/I²C: gyroscope GP chain pitch axis output
SPI2: gyroscope OIS chain pitch axis output
10.30
OUTX_H_G (23h)
Angular rate sensor pitch axis (X) angular rate output register (R). The value is expressed as a 16-bit word in
two’s complement.
If this register is read by the primary interface, data are according to the full scale and ODR settings (CTRL2_G
(11h)) of the gyroscope general-purpose interface.
If this register is read by the auxiliary interface, data are according to the full scale and ODR (6.66 kHz) settings of
the OIS gyroscope.
Table 94. OUTX_H_G register
D15
D14
D13
D12
D11
D10
D9
D8
Table 95. OUTX_H_G register description
Pitch axis (X) angular rate value (MSbyte)
D[15:8]
D[15:0] expressed in two’s complement and its value depends on the interface used:
SPI1/I²C: gyroscope GP chain pitch axis output
SPI2: gyroscope OIS chain pitch axis output
DS12171 - Rev 4
page 60/113
ISM330DLC
OUTY_L_G (24h)
10.31
OUTY_L_G (24h)
Angular rate sensor roll axis (Y) angular rate output register (R). The value is expressed as a 16-bit word in two’s
complement.
If this register is read by the primary interface, data are according to the full scale and ODR settings (CTRL2_G
(11h)) of the gyroscope general-purpose interface.
If this register is read by the auxiliary interface, data are according to the full scale and ODR (6.66 kHz) settings of
the OIS gyroscope.
Table 96. OUTY_L_G register
D7
D6
D5
D4
D3
D2
D1
D0
Table 97. OUTY_L_G register description
Roll axis (Y) angular rate value (LSbyte)
D[7:0]
D[15:0] expressed in two’s complement and its value depends on the interface used:
SPI1/I²C: gyroscope GP chain roll axis output
SPI2: gyroscope OIS chain roll axis output
10.32
OUTY_H_G (25h)
Angular rate sensor roll axis (Y) angular rate output register (R). The value is expressed as a 16-bit word in two’s
complement.
If this register is read by the primary interface, data are according to the full scale and ODR settings (CTRL2_G
(11h)) of the gyroscope general-purpose interface.
If this register is read by the auxiliary interface, data are according to the full scale and ODR (6.66 kHz) settings of
the OIS gyroscope.
Table 98. OUTY_H_G register
D15
D14
D13
D12
D11
D10
D9
D8
Table 99. OUTY_H_G register description
Roll axis (Y) angular rate value (MSbyte)
D[15:8]
D[15:0] expressed in two’s complement and its value depends on the interface used:
SPI1/I²C: gyroscope GP chain roll axis output
SPI2: gyroscope OIS chain roll axis output
DS12171 - Rev 4
page 61/113
ISM330DLC
OUTZ_L_G (26h)
10.33
OUTZ_L_G (26h)
Angular rate sensor yaw axis (Z) angular rate output register (R). The value is expressed as a 16-bit word in two’s
complement.
If this register is read by the primary interface, data are according to the full scale and ODR settings (CTRL2_G
(11h)) of the gyroscope general-purpose interface.
If this register is read by the auxiliary interface, data are according to the full scale and ODR (6.66 kHz) settings of
the OIS gyroscope.
Table 100. OUTZ_L_G register
D7
D6
D5
D4
D3
D2
D1
D0
Table 101. OUTZ_L_G register description
Yaw axis (Z) angular rate value (LSbyte)
D[7:0]
D[15:0] expressed in two’s complement and its value depends on the interface used:
SPI1/I²C: gyroscope GP chain yaw axis output
SPI2: gyroscope OIS chain yaw axis output
10.34
OUTZ_H_G (27h)
Angular rate sensor Yaw axis (Z) angular rate output register (R). The value is expressed as a 16-bit word in two’s
complement.
If this register is read by the primary interface, data are according to the full scale and ODR settings (CTRL2_G
(11h)) of the gyroscope general-purpose interface.
If this register is read by the auxiliary interface, data are according to the full scale and ODR (6.66 kHz) settings of
the OIS gyroscope.
Table 102. OUTZ_H_G register
D15
D14
D13
D12
D11
D10
D9
D8
Table 103. OUTZ_H_G register description
Yaw axis (Z) angular rate value (MSbyte)
D[15:8]
D[15:0] expressed in two’s complement and its value depends on the interface used:
SPI1/I²C: gyroscope GP chain yaw axis output
SPI2: gyroscope OIS chain yaw axis output
DS12171 - Rev 4
page 62/113
ISM330DLC
OUTX_L_XL (28h)
10.35
OUTX_L_XL (28h)
Linear acceleration sensor X-axis output register (R). The value is expressed as a 16-bit word in two’s
complement.
Accelerometer data can be read also from the auxiliary SPI @6.6 kHz.
Table 104. OUTX_L_XL register
D7
D6
D5
D4
D3
D2
D1
D0
Table 105. OUTX_L_XL register description
D[7:0]
10.36
X-axis linear acceleration value (LSbyte)
OUTX_H_XL (29h)
Linear acceleration sensor X-axis output register (R). The value is expressed as a 16-bit word in two’s
complement.
Accelerometer data can be read also from the auxiliary SPI @6.6 kHz.
Table 106. OUTX_H_XL register
D15
D14
D13
D12
D11
D10
D9
D8
Table 107. OUTX_H_XL register description
D[15:8]
10.37
X-axis linear acceleration value (MSbyte)
OUTY_L_XL (2Ah)
Linear acceleration sensor Y-axis output register (R). The value is expressed as a 16-bit word in two’s
complement.
Accelerometer data can be read also from the auxiliary SPI @6.6 kHz.
Table 108. OUTY_L_XL register
D7
D6
D5
D4
D3
D2
D1
D0
Table 109. OUTY_L_XL register description
D[7:0]
10.38
Y-axis linear acceleration value (LSbyte)
OUTY_H_XL (2Bh)
Linear acceleration sensor Y-axis output register (R). The value is expressed as a 16-bit word in two’s
complement.
Accelerometer data can be read also from the auxiliary SPI @6.6 kHz.
Table 110. OUTY_H_XL register
D15
D14
D13
D12
D11
D10
D9
D8
Table 111. OUTY_H_XL register description
D[15:8]
DS12171 - Rev 4
Y-axis linear acceleration value (MSbyte)
page 63/113
ISM330DLC
OUTZ_L_XL (2Ch)
10.39
OUTZ_L_XL (2Ch)
Linear acceleration sensor Z-axis output register (R). The value is expressed as a 16-bit word in two’s
complement.
Accelerometer data can be read also from the auxiliary SPI @6.6 kHz.
Table 112. OUTZ_L_XL register
D7
D6
D5
D4
D3
D2
D1
D0
Table 113. OUTZ_L_XL register description
D[7:0]
10.40
Z-axis linear acceleration value (LSbyte)
OUTZ_H_XL (2Dh)
Linear acceleration sensor Z-axis output register (R). The value is expressed as a 16-bit word in two’s
complement.
Accelerometer data can be read also from the auxiliary SPI @6.6 kHz.
Table 114. OUTZ_H_XL register
D15
D14
D13
D12
D11
D10
D9
D8
Table 115. OUTZ_H_XL register description
D[15:8]
DS12171 - Rev 4
Z-axis linear acceleration value (MSbyte)
page 64/113
ISM330DLC
SENSORHUB1_REG (2Eh)
10.41
SENSORHUB1_REG (2Eh)
First byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG number
of read operation configurations (for external sensors from x = 0 to x = 3).
Table 116. SENSORHUB1_REG register
SHub1_7
SHub1_6
SHub1_5
SHub1_4
SHub1_3
SHub1_2
SHub1_1
SHub1_0
Table 117. SENSORHUB1_REG register description
SHub1_[7:0]
10.42
First byte associated to external sensors
SENSORHUB2_REG (2Fh)
Second byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operations configurations (for external sensors from x = 0 to x = 3).
Table 118. SENSORHUB2_REG register
SHub2_7
SHub2_6
SHub2_5
SHub2_4
SHub2_3
SHub2_2
SHub2_1
SHub2_0
Table 119. SENSORHUB2_REG register description
SHub2_[7:0]
10.43
Second byte associated to external sensors
SENSORHUB3_REG (30h)
Third byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operations configurations (for external sensors from x = 0 to x = 3).
Table 120. SENSORHUB3_REG register
SHub3_7
SHub3_6
SHub3_5
SHub3_4
SHub3_3
SHub3_2
SHub3_1
SHub3_0
Table 121. SENSORHUB3_REG register description
SHub3_[7:0]
10.44
Third byte associated to external sensors
SENSORHUB4_REG (31h)
Fourth byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 122. SENSORHUB4_REG register
SHub4_7
SHub4_6
SHub4_5
SHub4_4
SHub4_3
SHub4_2
SHub4_1
SHub4_0
Table 123. SENSORHUB4_REG register description
SHub4_[7:0]
DS12171 - Rev 4
Fourth byte associated to external sensors
page 65/113
ISM330DLC
SENSORHUB5_REG (32h)
10.45
SENSORHUB5_REG (32h)
Fifth byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG number
of read operation configurations (for external sensors from x = 0 to x = 3).
Table 124. SENSORHUB5_REG register
SHub5_7
SHub5_6
SHub5_5
SHub5_4
SHub5_3
SHub5_2
SHub5_1
SHub5_0
Table 125. SENSORHUB5_REG register description
SHub5_[7:0]
10.46
Fifth byte associated to external sensors
SENSORHUB6_REG (33h)
Sixth byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 126. SENSORHUB6_REG register
SHub6_7
SHub6_6
SHub6_5
SHub6_4
SHub6_3
SHub6_2
SHub6_1
SHub6_0
Table 127. SENSORHUB6_REG register description
SHub6_[7:0]
10.47
Sixth byte associated to external sensors
SENSORHUB7_REG (34h)
Seventh byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 128. SENSORHUB7_REG register
SHub7_7
SHub7_6
SHub7_5
SHub7_4
SHub7_3
SHub7_2
SHub7_1
SHub7_0
Table 129. SENSORHUB7_REG register description
SHub7_[7:0]
10.48
Seventh byte associated to external sensors
SENSORHUB8_REG (35h)
Eighth byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 130. SENSORHUB8_REG register
SHub8_7
SHub8_6
SHub8_5
SHub8_4
SHub8_3
SHub8_2
SHub8_1
SHub8_0
Table 131. SENSORHUB8_REG register description
SHub8_[7:0]
DS12171 - Rev 4
Eighth byte associated to external sensors
page 66/113
ISM330DLC
SENSORHUB9_REG (36h)
10.49
SENSORHUB9_REG (36h)
Ninth byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 132. SENSORHUB9_REG register
SHub9_7
SHub9_6
SHub9_5
SHub9_4
SHub9_3
SHub9_2
SHub9_1
SHub9_0
Table 133. SENSORHUB9_REG register description
SHub9_[7:0]
10.50
Ninth byte associated to external sensors
SENSORHUB10_REG (37h)
Tenth byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 134. SENSORHUB10_REG register
SHub10_7
SHub10_6
SHub10_5
SHub10_4
SHub10_3
SHub10_2
SHub10_1
SHub10_0
Table 135. SENSORHUB10_REG register description
SHub10_[7:0]
10.51
Tenth byte associated to external sensors
SENSORHUB11_REG (38h)
Eleventh byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 136. SENSORHUB11_REG register
SHub11_7
SHub11_6
SHub11_5
SHub11_4
SHub11_3
SHub11_2
SHub11_1
SHub11_0
Table 137. SENSORHUB11_REG register description
SHub11_[7:0]
10.52
Eleventh byte associated to external sensors
SENSORHUB12_REG (39h)
Twelfth byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 138. SENSORHUB12_REG register
SHub12_7
SHub12_6
SHub12_5
SHub12_4
SHub12_3
SHub12_2
SHub12_1
SHub12_0
Table 139. SENSORHUB12_REG register description
SHub12[7:0]
DS12171 - Rev 4
Twelfth byte associated to external sensors
page 67/113
ISM330DLC
FIFO_STATUS1 (3Ah)
10.53
FIFO_STATUS1 (3Ah)
FIFO status control register (R). For a proper read of the register, it is recommended to set the BDU bit in
CTRL3_C (12h) to 1.
Table 140. FIFO_STATUS1 register
DIFF_FIFO_7
DIFF_FIFO_6
DIFF_FIFO_5
DIFF_FIFO_4
DIFF_FIFO_3
DIFF_FIFO_2
DIFF_FIFO_1
DIFF_FIFO_0
Table 141. FIFO_STATUS1 register description
DIFF_FIFO_[7:0]
10.54
Number of unread words (16-bit axes) stored in FIFO.
FIFO_STATUS2 (3Bh)
FIFO status control register (R). For a proper read of the register, it is recommended to set the BDU bit in
CTRL3_C (12h) to 1.
Table 142. FIFO_STATUS2 register
WaterM
OVER_RUN
FIFO_FULL_
SMART
FIFO_EMPTY
0
DIFF_FIFO_10
DIFF_FIFO_9
DIFF_FIFO_8
Table 143. FIFO_STATUS2 register
FIFO watermark status. The watermark is set through bits FTH_[7:0] in FIFO_CTRL1 (06h). Default value: 0
(0: FIFO filling is lower than watermark level(1);
WaterM
1: FIFO filling is equal to or higher than the watermark level)
FIFO overrun status. Default value: 0
OVER_RUN
(0: FIFO is not completely filled; 1: FIFO is completely filled)
FIFO_FULL_SMART
FIFO_EMPTY
DIFF_FIFO_[10:8]
Smart FIFO full status. Default value: 0
(0: FIFO is not full; 1: FIFO will be full at the next ODR)
FIFO empty bit. Default value: 0
(0: FIFO contains data; 1: FIFO is empty)
Number of unread words (16-bit axes) stored in FIFO.(2)
1. FIFO watermark level is set in FTH_[10:0] in FIFO_CTRL1 (06h) and FIFO_CTRL2 (07h)
2. For a complete number of unread samples, consider DIFF_FIFO [7:0] in FIFO_STATUS1 (3Ah)
10.55
FIFO_STATUS3 (3Ch)
FIFO status control register (R). For a proper read of the register, it is recommended to set the BDU bit in
CTRL3_C (12h) to 1.
Table 144. FIFO_STATUS3 register
FIFO_
PATTERN_7
FIFO_
PATTERN_6
FIFO_
PATTERN_5
FIFO_
PATTERN_4
FIFO_
PATTERN_3
FIFO_
PATTERN_2
FIFO_
PATTERN_1
FIFO_
PATTERN_0
Table 145. FIFO_STATUS3 register description
FIFO_PATTERN_[7:0]
DS12171 - Rev 4
Word of recursive pattern read at the next read.
page 68/113
ISM330DLC
FIFO_STATUS4 (3Dh)
10.56
FIFO_STATUS4 (3Dh)
FIFO status control register (R). For a proper read of the register, it is recommended to set the BDU bit in
CTRL3_C (12h) to 1.
Table 146. FIFO_STATUS4 register
0
0
0
0
0
0
FIFO_
PATTERN_9
FIFO_
PATTERN_8
Table 147. FIFO_STATUS4 register description
FIFO_PATTERN_[9:8]
10.57
Word of recursive pattern read at the next read.
FIFO_DATA_OUT_L (3Eh)
FIFO data output register (R). For a proper read of the register, it is recommended to set the BDU bit in CTRL3_C
(12h) to 1.
Table 148. FIFO_DATA_OUT_L register
DATA_OUT_
FIFO_L_7
DATA_OUT_
FIFO_L_6
DATA_OUT_
FIFO_L_5
DATA_OUT_
FIFO_L_4
DATA_OUT_
FIFO_L_3
DATA_OUT_
FIFO_L_2
DATA_OUT_
FIFO_L_1
DATA_OUT_
FIFO_L_0
Table 149. FIFO_DATA_OUT_L register description
DATA_OUT_FIFO_L_[7:0]
10.58
FIFO data output (first byte)
FIFO_DATA_OUT_H (3Fh)
FIFO data output register (R). For a proper read of the register, it is recommended to set the BDU bit in CTRL3_C
(12h) to 1.
Table 150. FIFO_DATA_OUT_H register
DATA_OUT_
FIFO_H_7
DATA_OUT_
FIFO_H_6
DATA_OUT_
FIFO_H_5
DATA_OUT_
FIFO_H_4
DATA_OUT_
FIFO_H_3
DATA_OUT_
FIFO_H_2
DATA_OUT_
FIFO_H_1
DATA_OUT_
FIFO_H_0
Table 151. FIFO_DATA_OUT_H register description
DATA_OUT_FIFO_H_[7:0]
DS12171 - Rev 4
FIFO data output (second byte)
page 69/113
ISM330DLC
TIMESTAMP0_REG (40h)
10.59
TIMESTAMP0_REG (40h)
Timestamp first (least significant) byte data output register (R). The value is expressed as a 24-bit word and the
bit resolution is defined by setting the value in WAKE_UP_DUR (5Ch).
Table 152. TIMESTAMP0_REG register
TIME
STAMP0_7
TIME
STAMP0_6
TIME
STAMP0_5
TIME
STAMP0_4
TIME
STAMP0_3
TIME
STAMP0_2
TIME
STAMP0_1
TIME
STAMP0_0
Table 153. TIMESTAMP0_REG register description
TIMESTAMP0_[7:0]
10.60
TIMESTAMP first byte data output
TIMESTAMP1_REG (41h)
Timestamp second byte data output register (R). The value is expressed as a 24-bit word and the bit resolution is
defined by setting value in WAKE_UP_DUR (5Ch).
Table 154. TIMESTAMP1_REG register
TIME
STAMP1_7
TIME
STAMP1_6
TIME
STAMP1_5
TIME
STAMP1_4
TIME
STAMP1_3
TIME
STAMP1_2
TIME
STAMP1_1
TIME
STAMP1_0
Table 155. TIMESTAMP1_REG register description
TIMESTAMP1_[7:0]
10.61
TIMESTAMP second byte data output
TIMESTAMP2_REG (42h)
Timestamp third (most significant) byte data output register (R/W). The value is expressed as a 24-bit word and
the bit resolution is defined by setting the value in WAKE_UP_DUR (5Ch). To reset the timer, the AAh value has
to be stored in this register.
Table 156. TIMESTAMP2_REG register
TIME
STAMP2_7
TIME
STAMP2_6
TIME
STAMP2_5
TIME
STAMP2_4
TIME
STAMP2_3
TIME
STAMP2_2
TIME
STAMP2_1
TIME
STAMP2_0
Table 157. TIMESTAMP2_REG register description
TIMESTAMP2_[7:0]
DS12171 - Rev 4
TIMESTAMP third byte data output
page 70/113
ISM330DLC
SENSORHUB13_REG (4Dh)
10.62
SENSORHUB13_REG (4Dh)
Thirteenth byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 158. SENSORHUB13_REG register
SHub13_7
SHub13_6
SHub13_5
SHub13_4
SHub13_3
SHub13_2
SHub13_1
SHub13_0
Table 159. SENSORHUB13_REG register description
SHub13_[7:0]
10.63
Thirteenth byte associated to external sensors
SENSORHUB14_REG (4Eh)
Fourteenth byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 160. SENSORHUB14_REG register
SHub14_7
SHub14_6
SHub14_5
SHub14_4
SHub14_3
SHub14_2
SHub14_1
SHub14_0
Table 161. SENSORHUB14_REG register description
SHub14_[7:0]
10.64
Fourteenth byte associated to external sensors
SENSORHUB15_REG (4Fh)
Fifteenth byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 162. SENSORHUB15_REG register
SHub15_7
SHub15_6
SHub15_5
SHub15_4
SHub15_3
SHub15_2
SHub15_1
SHub15_0
Table 163. SENSORHUB15_REG register description
SHub15_[7:0]
10.65
Fifteenth byte associated to external sensors
SENSORHUB16_REG (50h)
Sixteenth byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 164. SENSORHUB16_REG register
SHub16_7
SHub16_6
SHub16_5
SHub16_4
SHub16_3
SHub16_2
SHub16_1
SHub16_0
Table 165. SENSORHUB16_REG register description
SHub16_[7:0]
DS12171 - Rev 4
Sixteenth byte associated to external sensors
page 71/113
ISM330DLC
SENSORHUB17_REG (51h)
10.66
SENSORHUB17_REG (51h)
Seventeenth byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 166. SENSORHUB17_REG register
SHub17_7
SHub17_6
SHub17_5
SHub17_4
SHub17_3
SHub17_2
SHub17_1
SHub17_0
Table 167. SENSORHUB17_REG register description
SHub17_[7:0]
10.67
Seventeenth byte associated to external sensors
SENSORHUB18_REG (52h)
Eighteenth byte associated to external sensors. The content of the register is consistent with the SLVx_CONFIG
number of read operation configurations (for external sensors from x = 0 to x = 3).
Table 168. SENSORHUB18_REG register
SHub18_7
SHub18_6
SHub18_5
SHub18_4
SHub18_3
SHub18_2
SHub18_1
SHub18_0
Table 169. SENSORHUB18_REG register description
SHub18_[7:0]
DS12171 - Rev 4
Eighteenth byte associated to external sensors
page 72/113
ISM330DLC
FUNC_SRC1 (53h)
10.68
FUNC_SRC1 (53h)
Tilt, hard/soft-iron and sensor hub interrupt source register (R)
Table 170. FUNC_SRC1 register
0
0
TILT_IA
0
0
HI_FAIL
SI_END_OP
SENSOR
HUB_END_OP
Table 171. FUNC_SRC1 register description
Tilt event detection status. Default value: 0
TILT_IA
(0: tilt event not detected; 1: tilt event detected)
HI_FAIL
Fail in hard/soft-ironing algorithm.
Hard/soft-iron calculation status. Default value: 0
SI_END_OP
(0: hard/soft-iron calculation not concluded; 1: hard/soft-iron calculation concluded)
SENSORHUB_END_OP
10.69
Sensor hub communication status. Default value: 0
(0: sensor hub communication not concluded; 1: sensor hub communication concluded)
FUNC_SRC2 (54h)
Slave communication register (R)
Table 172. FUNC_SRC2 register
0
SLAVE3_NACK
SLAVE2_NACK
SLAVE1_NACK
SLAVE0_NACK
0
0
0
Table 173. FUNC_SRC2 register description
DS12171 - Rev 4
SLAVE3_NACK
This bit is set to 1 if not acknowledge occurs on slave 3 communication. Default value: 0
SLAVE2_NACK
This bit is set to 1 if not acknowledge occurs on slave 2 communication. Default value: 0
SLAVE1_NACK
This bit is set to 1 if not acknowledge occurs on slave 1 communication. Default value: 0
SLAVE0_NACK
This bit is set to 1 if not acknowledge occurs on slave 0 communication. Default value: 0
page 73/113
ISM330DLC
TAP_CFG (58h)
10.70
TAP_CFG (58h)
Enables interrupt and inactivity functions, configuration of filtering, and tap recognition functions (R/W)
Table 174. TAP_CFG register
INTERRUPTS_
ENABLE
INACT_EN1
INACT_EN0
SLOPE_FDS
TAP_X_EN
TAP_Y_EN
TAP_Z_EN
LIR
Table 175. TAP_CFG register description
INTERRUPTS_ENABLE
Enables basic interrupts (6D/4D, free-fall, wake-up, tap, inactivity). Default value: 0
(0: interrupt disabled; 1: interrupt enabled)
Enables inactivity function. Default value: 00
(00: disabled;
INACT_EN[1:0]
01: sets accelerometer ODR to 12.5 Hz (low-power mode), gyroscope does not change;
10: sets accelerometer ODR to 12.5 Hz (low-power mode), gyroscope to sleep mode;
11: sets accelerometer ODR to 12.5 Hz (low-power mode), gyroscope to power-down mode)
SLOPE_FDS
HPF or SLOPE filter selection on wake-up and activity/inactivity functions. Refer to
Figure 9. Accelerometer composite filter (for modes 1/2 and mode 3*). Default value: 0
0: SLOPE filter applied; 1: HPF applied)
TAP_X_EN
TAP_Y_EN
TAP_Z_EN
LIR
10.71
Enables X direction in tap recognition. Default value: 0
(0: X direction disabled; 1: X direction enabled)
Enables Y direction in tap recognition. Default value: 0
(0: Y direction disabled; 1: Y direction enabled)
Enables Z direction in tap recognition. Default value: 0
(0: Z direction disabled; 1: Z direction enabled)
Latched interrupt. Default value: 0
(0: interrupt request not latched; 1: interrupt request latched)
TAP_THS_6D (59h)
Portrait/landscape position and tap function threshold register (R/W)
Table 176. TAP_THS_6D register
D4D_EN
SIXD_THS1
SIXD_THS0
TAP_THS4
TAP_THS3
TAP_THS2
TAP_THS1
TAP_THS0
Table 177. TAP_THS_6D register description
4D orientation detection enable. Z-axis position detection is disabled.
D4D_EN
Default value: 0
(0: enabled; 1: disabled)
SIXD_THS[1:0]
TAP_THS[4:0]
DS12171 - Rev 4
Threshold for 4D/6D function. Default value: 00
For details, refer to Table 178. Threshold for D4D/D6D function.
Threshold for tap recognition. Default value: 00000
1 LSb corresponds to FS_XL/25
page 74/113
ISM330DLC
INT_DUR2 (5Ah)
Table 178. Threshold for D4D/D6D function
10.72
SIXD_THS[1:0]
Threshold value
00
80 degrees
01
70 degrees
10
60 degrees
11
50 degrees
INT_DUR2 (5Ah)
Tap recognition function setting register (R/W)
Table 179. INT_DUR2 register
DUR3
DUR2
DUR1
DUR0
QUIET1
QUIET0
SHOCK1
SHOCK0
Table 180. INT_DUR2 register description
Duration of maximum time gap for double tap recognition. Default: 0000
DUR[3:0]
When double tap recognition is enabled, this register expresses the maximum time between two consecutive
detected taps to determine a double tap event. The default value of these bits is 0000 which corresponds to
16/ODR_XL time. If the DUR[3:0] bits are set to a different value, 1LSB corresponds to 32/ODR_XL time.
QUIET[1:0]
Quiet time is the time after the first detected tap in which there must not be any overthreshold event. The default
value of these bits is 00 which corresponds to 2/ODR_XL time. If the QUIET[1:0] bits are set to a different value,
1LSB corresponds to 4/ODR_XL time.
Expected quiet time after a tap detection. Default value: 00
Maximum duration of overthreshold event. Default value: 00
SHOCK[1:0] Maximum duration is the maximum time of an overthreshold signal detection to be recognized as a tap event.
The default value of these bits is 00 which corresponds to 4/ODR_XL time. If the SHOCK[1:0] bits are set to a
different value, 1LSB corresponds to 8/ODR_XL time.
10.73
WAKE_UP_THS (5Bh)
Single and double-tap function threshold register (R/W)
Table 181. WAKE_UP_THS register
SINGLE_
DOUBLE_TAP
0
WK_THS5
WK_THS4
WK_THS3
WK_THS2
WK_THS1
WK_THS0
Table 182. WAKE_UP_THS register description
Single/double-tap event enable. Default: 0
SINGLE_DOUBLE_TAP
(0: only single-tap event enabled;
1: both single and double-tap events enabled)
WK_THS[5:0]
DS12171 - Rev 4
Threshold for wakeup. Default value: 000000
1 LSb corresponds to FS_XL/26
page 75/113
ISM330DLC
WAKE_UP_DUR (5Ch)
10.74
WAKE_UP_DUR (5Ch)
Free-fall, wakeup, timestamp and sleep mode functions duration setting register (R/W)
Table 183. WAKE_UP_DUR register
FF_DUR5
WAKE_DUR1
WAKE_DUR0
TIMER_HR
SLEEP_DUR3
SLEEP_DUR2
SLEEP_DUR1
SLEEP_DUR0
Table 184. WAKE_UP_DUR register description
Free fall duration event. Default: 0
FF_DUR5
For the complete configuration of the free-fall duration, refer to FF_DUR[4:0] in FREE_FALL (5Dh) configuration.
1 LSB = 1 ODR_time
WAKE_DUR[1:0]
Wake up duration event. Default: 00
1LSB = 1 ODR_time
Timestamp register resolution setting(1). Default value: 0
TIMER_HR
(0: 1LSB = 6.4 ms; 1: 1LSB = 25 µs)
SLEEP_DUR[3:0]
Duration to go in sleep mode. Default value: 0000 (this corresponds to 16 ODR)
1 LSB = 512 ODR
1. Configuration of this bit affects theTIMESTAMP0_REG (40h), TIMESTAMP1_REG (41h), and TIMESTAMP2_REG (42h)
registers.
10.75
FREE_FALL (5Dh)
Free-fall function duration setting register (R/W)
Table 185. FREE_FALL register
FF_DUR4
FF_DUR3
FF_DUR2
FF_DUR1
FF_DUR0
FF_THS2
FF_THS1
FF_THS0
Table 186. FREE_FALL register description
FF_DUR[4:0]
FF_THS[2:0]
Free-fall duration event. Default: 0
For the complete configuration of the free-fall duration, refer to FF_DUR5 in WAKE_UP_DUR (5Ch) configuration.
Free-fall threshold setting. Default: 000
For details refer to Table 187.
Table 187. Threshold for free-fall function
DS12171 - Rev 4
FF_THS[2:0]
Threshold value
000
156 mg
001
219 mg
010
250 mg
011
312 mg
100
344 mg
101
406 mg
110
469 mg
111
500 mg
page 76/113
ISM330DLC
MD1_CFG (5Eh)
10.76
MD1_CFG (5Eh)
Routing functions to INT1 register (R/W)
Table 188. MD1_CFG register
INT1_INACT_
STATE
INT1_
SINGLE_TAP
INT1_WU
INT1_FF
INT1_
DOUBLE_TAP
INT1_6D
INT1_TILT
INT1_ TIMER
Table 189. MD1_CFG register description
Routing inactivity state to INT1. Default: 0
INT1_INACT_STATE
(0: routing inactivity to INT1 disabled;
1: routing inactivity to INT1 enabled)
Routing single-tap recognition to INT1. Default: 0
INT1_SINGLE_TAP
(0: routing single-tap event to INT1 disabled;
1: routing single-tap event to INT1 enabled)
Routing wake-up event to INT1. Default value: 0
INT1_WU
(0: routing wake-up event to INT1 disabled;
1: routing wake-up event to INT1 enabled)
Routing free-fall event to INT1. Default value: 0
INT1_FF
(0: routing free-fall event to INT1 disabled;
1: routing free-fall event to INT1 enabled)
Routing tap event to INT1. Default value: 0
INT1_DOUBLE_TAP
(0: routing double-tap event to INT1 disabled;
1: routing double-tap event to INT1 enabled)
Routing 6D event to INT1. Default value: 0
INT1_6D
(0: routing 6D event to INT1 disabled;
1: routing 6D event to INT1 enabled)
Routing tilt event to INT1. Default value: 0
INT1_TILT
(0: routing tilt event to INT1 disabled;
1: routing tilt event to INT1 enabled)
Routing end counter event of timer to INT1. Default value: 0
INT1 _TIMER
(0: routing end counter event of timer to INT1 disabled;
1: routing end counter event of timer to INT1 enabled)
DS12171 - Rev 4
page 77/113
ISM330DLC
MD2_CFG (5Fh)
10.77
MD2_CFG (5Fh)
Routing functions to INT2 register (R/W)
Table 190. MD2_CFG register
INT2_INACT_
STATE
INT2_
SINGLE_TAP
INT2_WU
INT2_FF
INT2_
DOUBLE_TAP
INT2_6D
INT2_TILT
INT2_IRON
Table 191. MD2_CFG register description
Routing inactivity state to INT2. Default: 0
INT2_INACT_STATE
(0: routing inactivity to INT2 disabled;
1: routing inactivity to INT2 enabled)
Routing single-tap recognition to INT2. Default: 0
INT2_SINGLE_TAP
(0: routing single-tap event to INT2 disabled;
1: routing single-tap event to INT2 enabled)
Routing wake-up event to INT2. Default value: 0
INT2_WU
(0: routing wake-up event to INT2 disabled;
1: routing wake-up event to INT2 enabled)
Routing free-fall event to INT2. Default value: 0
INT2_FF
(0: routing free-fall event to INT2 disabled;
1: routing free-fall event to INT2 enabled)
Routing tap event to INT2. Default value: 0
INT2_DOUBLE_TAP
(0: routing double-tap event to INT2 disabled;
1: routing double-tap event to INT2 enabled)
Routing 6D event to INT2. Default value: 0
INT2_6D
(0: routing 6D event to INT2 disabled;
1: routing 6D event to INT2 enabled)
Routing tilt event to INT2. Default value: 0
INT2_TILT
(0: routing tilt event to INT2 disabled;
1: routing tilt event to INT2 enabled)
Routing soft-iron/hard-iron algorithm end event to INT2. Default value: 0
INT2_IRON
(0: routing soft-iron/hard-iron algorithm end event to INT2 disabled;
1: routing soft-iron/hard-iron algorithm end event to INT2 enabled)
10.78
MASTER_CMD_CODE (60h)
Table 192. MASTER_CMD_CODE register
MASTER_
MASTER_
MASTER_
MASTER_
MASTER_
MASTER_
MASTER_
MASTER_
CMD_CODE7 CMD_CODE6 CMD_CODE5 CMD_CODE4 CMD_CODE3 CMD_CODE2 CMD_CODE1 CMD_CODE0
Table 193. MASTER_CMD_CODE register description
MASTER_CMD_CODE[7:0]
DS12171 - Rev 4
Master command code used for stamping for sensor sync. Default value: 0
page 78/113
ISM330DLC
SENS_SYNC_SPI_ERROR_CODE (61h)
10.79
SENS_SYNC_SPI_ERROR_CODE (61h)
Table 194. SENS_SYNC_SPI_ERROR_CODE register
ERROR_
CODE7
ERROR_
CODE6
ERROR_
CODE5
ERROR_
CODE4
ERROR_
CODE3
ERROR_
CODE2
ERROR_
CODE1
ERROR_
CODE0
Table 195. SENS_SYNC_SPI_ERROR_CODE register description
ERROR_CODE[7:0]
10.80
Error code used for sensor synchronization. Default value: 0
OUT_MAG_RAW_X_L (66h)
External magnetometer raw data (R)
Table 196. OUT_MAG_RAW_X_L register
D7
D6
D5
D4
D3
D2
D1
D0
Table 197. OUT_MAG_RAW_X_L register description
D[7:0]
10.81
X-axis external magnetometer value (LSbyte)
OUT_MAG_RAW_X_H (67h)
External magnetometer raw data (R)
Table 198. OUT_MAG_RAW_X_H register
D15
D14
D13
D12
D11
D10
D9
D8
Table 199. OUT_MAG_RAW_X_H register description
D[15:8]
10.82
X-axis external magnetometer value (MSbyte)
OUT_MAG_RAW_Y_L (68h)
External magnetometer raw data (R)
Table 200. OUT_MAG_RAW_Y_L register
D7
D6
D5
D4
D3
D2
D1
D0
Table 201. OUT_MAG_RAW_Y_L register description
D[7:0]
DS12171 - Rev 4
Y-axis external magnetometer value (LSbyte)
page 79/113
ISM330DLC
OUT_MAG_RAW_Y_H (69h)
10.83
OUT_MAG_RAW_Y_H (69h)
External magnetometer raw data (R)
Table 202. OUT_MAG_RAW_Y_H register
D15
D14
D13
D12
D11
D10
D9
D8
Table 203. OUT_MAG_RAW_Y_H register description
D[15:8]
10.84
Y-axis external magnetometer value (MSbyte)
OUT_MAG_RAW_Z_L (6Ah)
External magnetometer raw data (R)
Table 204. OUT_MAG_RAW_Z_L register
D7
D6
D5
D4
D3
D2
D1
D0
Table 205. OUT_MAG_RAW_Z_L register description
D[7:0]
10.85
Z-axis external magnetometer value (LSbyte)
OUT_MAG_RAW_Z_H (6Bh)
External magnetometer raw data (R)
Table 206. OUT_MAG_RAW_Z_H register
D15
D14
D13
D12
D11
D10
D9
D8
Table 207. OUT_MAG_RAW_Z_H register description
D[15:8]
10.86
Z-axis external magnetometer value (MSbyte)
INT_OIS (6Fh)
OIS interrupt configuration register. Primary interface for read-only (R); only the auxiliary SPI can write to this
register (R/W).
Table 208. INT_OIS register
INT2_
DRDY_OIS
LVL2_OIS
-
-
-
-
-
-
Table 209. INT_OIS register description
DS12171 - Rev 4
INT2_DRDY_OIS
Enables the OIS chain DRDY on the INT2 pad. This setting has priority over all other INT2 settings.
LVL2_OIS
Enables level-sensitive latched mode on the OIS chain. Default value: 0
page 80/113
ISM330DLC
CTRL1_OIS (70h)
10.87
CTRL1_OIS (70h)
OIS configuration register. Primary interface for read-only (R); only the auxiliary SPI can write to this register
(R/W).
Table 210. CTRL1_OIS register
BLE_OIS
LVL1_OIS
SIM_OIS
MODE4_EN
FS1_G_OIS
FS0_G_OIS
FS_125_OIS
OIS_EN_SPI2
Table 211. CTRL1_OIS register description
Big/little endian data selection. Default value: 0
BLE_OIS
(0: output LSbyte at lower register address;
1: output LSbyte at higher register address)
LVL1_OIS
Enables level-sensitive trigger mode on OIS chain. Default value: 0
SPI2 3- or 4-wire mode. Default value: 0
SIM_OIS
(0: 4-wire SPI2; 1: 3-wire SPI2)
MODE4_EN
Enables accelerometer OIS chain if OIS_EN_SPI2 = 1. Default value: 0
(0: disable; 1: enable)
Gyroscope OIS chain full-scale selection.
(00: ±250 dps;
FS[1:0]_G_OIS 01: ±500 dps;
10: ±1000 dps;
11: ±2000 dps)
FS_125_OIS
Selects gyroscope OIS chain full scale ±125 dps
(0: FS selected through bits FS[1:0]_G_OIS; 1 = ±125 dps)
Enables OIS chain data processing for gyroscope in mode 3 and mode 4 (mode4_en = 1) and accelerometer
data in and mode 4 (mode4_en = 1).
OIS_EN_SPI2
When the OIS chain is enabled, the OIS outputs are available through the SPI2 in registers OUTX_L_G
(22h) through OUTZ_H_G (27h) and STATUS_REG/STATUS_SPIAux (1Eh), and LPF1 is dedicated to this
chain.
DEN mode selection can be done using the LVL1_OIS bit of register CTRL1_OIS (70h) and the LVL2_OIS bit of
register INT_OIS (6Fh).
DEN mode on the OIS path is active in the gyroscope only.
Table 212. DEN mode selection
DS12171 - Rev 4
LVL1_OIS, LVL2_OIS
DEN mode
10
Level-sensitive trigger mode is selected
11
Level-sensitive latched mode is selected
page 81/113
ISM330DLC
CTRL2_OIS (71h)
10.88
CTRL2_OIS (71h)
OIS configuration register. Primary interface for read-only (R); only the auxiliary SPI can write to this register
(R/W).
Table 213. CTRL2_OIS register
0(1)
0(1)
HPM1_OIS
0(1)
HPM0_OIS
FTYPE_1_OIS
FTYPE_0_OIS
HP_EN_OIS
1. This bit must be set to 0 for the correct operation of the device.
Table 214. CTRL2_OIS register description
Gyroscope OIS chain digital high-pass filter cutoff selection. Default value: 00
(00: 16 mHz;
HPM[1:0]_OIS
01: 65 mHz;
10: 260 mHz;
11: 1.04 Hz)
FTYPE_[1:0]_OIS
HP_EN_OIS
Gyroscope digital LPF1 filter bandwidth selection
Table 215 shows cutoff and phase values obtained with all configurations
Enables gyroscope OIS chain HPF. This filter is available on the OIS chain only if HP_EN_G in CTRL7_G
(16h) is set to 0.(1)
1. HP_EN_OIS is active to select the HPF on the auxiliary SPI chain only if the HPF is not already used in the primary
interface.
Table 215. Gyroscope OIS chain LPF1 bandwidth selection
FTYPE_[1:0]_OIS
ODR = 6.6 kHz
BW
Phase delay @ 20 Hz
00
351 Hz
7°
01
237 Hz
9°
10
173 Hz
11°
11
937 Hz
5°
Sampling data with frequency equal or higher to 3.3 kHz is recommended.
If data is down-sampled @ 1 kHz, it is recommended to use a cutoff @ 173 Hz.
If data is down-sampled @ 2 kHz, it is recommended to use a cutoff @ 237 Hz.
DS12171 - Rev 4
page 82/113
ISM330DLC
CTRL3_OIS (72h)
10.89
CTRL3_OIS (72h)
OIS configuration register. Primary interface for read-only (R); only the auxiliary SPI can write to this register
(R/W).
Table 216. CTRL3_OIS register
DEN_LH_OIS
FS1_XL_OIS
FS0_XL_OIS
FILTER_XL_
CONF_OIS_1
FILTER_XL_
CONF_OIS_0
ST1_OIS
ST0_OIS
ST_OIS_
CLAMPDIS
Table 217. CTRL3_OIS register description
Polarity of DEN signal on OIS chain
DEN_LH_OIS
(0: DEN pin is active-low;
1: DEN pin is active-high)
Accelerometer OIS channel full-scale selection. Default value: 00
(00: ±2 g;
01: ±16 g;
FS[1:0]_XL_OIS
10: ±4 g;
11: ±8 g)
These two bits act only when the accelerometer GP chain is in power-down, otherwise the
accelerometer FS value is selected only from the GP side (but it is readable also from the OIS
side).
FILTER_XL_CONF_OIS[1:0] Accelerometer OIS channel bandwidth selection (see Table 215)
Gyroscope OIS chain self-test selection
Table 219 lists the output variation when the self-test is enabled and ST_OIS_CLAMPDIS = 1.
Default value: 00
ST[1:0]_OIS
(00: normal mode;
01: positive sign self-test;
10: normal mode;
11: negative sign self-test)
Disables gyroscope OIS chain clamp
ST_OIS_CLAMPDIS
(0: all gyroscope OIS chain outputs = 8000h during self-test applied from primary interface;
1: OIS chain self-test outputs as shown in Table 219. Self-test nominal output variation if
self-test applied from primary or auxiliary interfaces)
Table 218. Accelerometer OIS channel bandwidth selection
ODR_GP = 0
FILTER_XL_
CONF_OIS [1:0]
ODR GP ≤ 800 Hz
ODR GP ≥ 1600 Hz
BW
Phase delay (1)
BW
Phase delay(1)
00
140 Hz
9.39°
128 Hz
11.5°
01
68.2 Hz
17.6°
66.5 Hz
19.7°
10
636 Hz
2.96°
329 Hz
5.08°
11
295 Hz
5.12°
222 Hz
7.23°
1. Phase delay @ 20 Hz
DS12171 - Rev 4
page 83/113
ISM330DLC
X_OFS_USR (73h)
Table 219. Self-test nominal output variation
10.90
Full scale
Output variation [dps]
±2000
400
±1000
200
±500
100
±250
50
±125
25
X_OFS_USR (73h)
Accelerometer X-axis user offset correction (R/W). The offset value set in the X_OFS_USR offset register is
internally added to the acceleration value measured on the X-axis.
Table 220. X_OFS_USR register
X_OFS_
USR_7
X_OFS_
USR_6
X_OFS_
USR_5
X_OFS_
USR_4
X_OFS_
USR_3
X_OFS_
USR_2
X_OFS_
USR_1
X_OFS_
USR_0
Table 221. X_OFS_USR register description
X_OFS_USR_[7:0]
10.91
Accelerometer X-axis user offset correction expressed in two’s complement, weight depends on the
CTRL6_C(4) bit. The value must be in the range [-127 127].
Y_OFS_USR (74h)
Accelerometer Y-axis user offset correction (R/W). The offset value set in the Y_OFS_USR offset register is
internally added to the acceleration value measured on the Y-axis.
Table 222. Y_OFS_USR register
Y_OFS_
USR_7
Y_OFS_
USR_6
Y_OFS_
USR_5
Y_OFS_
USR_4
Y_OFS_
USR_3
Y_OFS_
USR_2
Y_OFS_
USR_1
Y_OFS_
USR_0
Table 223. Y_OFS_USR register description
Y_OFS_USR_[7:0]
10.92
Accelerometer Y-axis user offset correction expressed in two’s complement, weight depends on the
CTRL6_C(4) bit. The value must be in the range [-127 127].
Z_OFS_USR (75h)
Accelerometer Z-axis user offset correction (R/W). The offset value set in the Z_OFS_USR offset register is
internally subtracted from the acceleration value measured on the Z-axis.
Table 224. Z_OFS_USR register
Z_OFS_
USR_7
Z_OFS_
USR_6
Z_OFS_
USR_5
Z_OFS_
USR_4
Z_OFS_
USR_3
Z_OFS_
USR_2
Z_OFS_
USR_1
Z_OFS_
USR_0
Table 225. Z_OFS_USR register description
Z_OFS_USR_[7:0]
DS12171 - Rev 4
Accelerometer Z-axis user offset correction expressed in two’s complement, weight depends on the
CTRL6_C(4) bit. The value must be in the range [-127 127].
page 84/113
ISM330DLC
Embedded functions register mapping
11
Embedded functions register mapping
The tables given below provide a list of registers related to the embedded functions available in the device and
the corresponding addresses.
The embedded functions registers are accessible when FUNC_CFG_EN is set to 1 in FUNC_CFG_ACCESS
(01h).
Note:
All modifications of the content of the embedded functions registers have to be performed with the device in
power-down mode.
Table 226. Register address map embedded functions
Name
Type
SLV0_ADD
R/W
Register address
Hex
Binary
02
00000010
Default
Comment
00000000
SLV0_SUBADD
R/W
03
00000011
00000000
SLV0_CONFIG
R/W
04
00000100
00000000
SLV1_ADD
R/W
05
00000101
00000000
SLV1_SUBADD
R/W
06
00000110
00000000
SLV1_CONFIG
R/W
07
00000111
00000000
SLV2_ADD
R/W
08
00001000
00000000
SLV2_SUBADD
R/W
09
00001001
00000000
SLV2_CONFIG
R/W
0A
00001010
00000000
SLV3_ADD
R/W
0B
00001011
00000000
SLV3_SUBADD
R/W
0C
00001100
00000000
SLV3_CONFIG
R/W
0D
00001101
00000000
DATAWRITE_SRC_
MODE_SUB_SLV0
R/W
0E
00001110
00000000
RESERVED
-
0F-15
MAG_SI_XX
R/W
24
00100100
00001000
-
MAG_SI_XY
R/W
25
00100101
00000000
MAG_SI_XZ
R/W
26
00100110
00000000
MAG_SI_YX
R/W
27
00100111
00000000
MAG_SI_YY
R/W
28
00101000
00001000
MAG_SI_YZ
R/W
29
00101001
00000000
MAG_SI_ZX
R/W
2A
00101010
00000000
MAG_SI_ZY
R/W
2B
00101011
00000000
MAG_SI_ZZ
R/W
2C
00101100
00001000
MAG_OFFX_L
R/W
2D
00101101
00000000
MAG_OFFX_H
R/W
2E
00101110
00000000
MAG_OFFY_L
R/W
2F
00101111
00000000
MAG_OFFY_H
R/W
30
00110000
00000000
MAG_OFFZ_L
R/W
31
00110001
00000000
MAG_OFFZ_H
R/W
32
00110010
00000000
Reserved
Reserved registers must not be changed. Writing to those registers may cause permanent damage to the device.
The content of the registers that are loaded at boot should not be changed. They contain the factory calibration
values. Their content is automatically restored when the device is powered up.
DS12171 - Rev 4
page 85/113
ISM330DLC
Embedded functions registers description
12
Embedded functions registers description
Note:
All modifications of the content of the embedded functions registers have to be performed with the device in
power-down mode.
12.1
SLV0_ADD (02h)
I²C slave address of the first external sensor (sensor 1) register (R/W)
Table 227. SLV0_ADD register
Slave0_add6
Slave0_add5
Slave0_add4
Slave0_add3
Slave0_add2
Slave0_add1
Slave0_add0
rw_0
Table 228. SLV0_ADD register description
Slave0_add[6:0]
rw_0
12.2
I²C slave address of sensor 1 that can be read by sensor hub. Default value: 0000000
Read/write operation on sensor 1. Default value: 0
(0: write operation; 1: read operation)
SLV0_SUBADD (03h)
Address of register on the first external sensor (sensor 1) register (R/W)
Table 229. SLV0_SUBADD register
Slave0_reg7
Slave0_reg6
Slave0_reg5
Slave0_reg4
Slave0_reg3
Slave0_reg2
Slave0_reg1
Slave0_reg0
Table 230. SLV0_SUBADD register description
Slave0_reg[7:0]
DS12171 - Rev 4
Address of register on sensor 1 that has to be read/write according to the rw_0 bit value in SLV0_ADD (02h).
Default value: 00000000
page 86/113
ISM330DLC
SLV0_CONFIG (04h)
12.3
SLV0_CONFIG (04h)
First external sensor (sensor 1) configuration and sensor hub settings register (R/W)
Table 231. SLV0_CONFIG register
Slave0_rate1
Slave0_rate0
Aux_sens_on1
Aux_sens_on0
Src_mode
Slave0_numop2
Slave0_numop1
Slave0_numop0
Table 232. SLV0_CONFIG register description
Decimation of read operation on sensor 1 starting from the sensor hub trigger. Default value: 00
(00: no decimation;
Slave0_rate[1:0]
01: update every 2 samples;
10: update every 4 samples;
11: update every 8 samples.)
Number of external sensors to be read by sensor hub. Default value: 00
(00: one sensor;
Aux_sens_on[1:0]
01: two sensors;
10: three sensors;
11: four sensors.)
Source mode conditioned read. Default value: 0(1)
Src_mode
(0: source mode read disabled; 1: source mode read enabled)
Slave0_numop[2:0]
Number of read operations on sensor 1.
1. Read conditioned by the content of the register at address specified in the DATAWRITE_SRC_MODE_SUB_SLV0 (0Eh)
register. If the content is non-zero, the operation continues with the reading of the address specified in the SLV0_SUBADD
(03h) register, else the operation is interrupted.
12.4
SLV1_ADD (05h)
I²C slave address of the second external sensor (sensor 2) register (R/W)
Table 233. SLV1_ADD register
Slave1_add6
Slave1_add5
Slave1_add4
Slave1_add3
Slave1_add2
Slave1_add1
Slave1_add0
r_1
Table 234. SLV1_ADD register description
Slave1_add[6:0]
r_1
DS12171 - Rev 4
I²C slave address of sensor 2 that can be read by sensor hub. Default value: 0000000
Enables read operation on sensor 2. Default value: 0
(0: read operation disabled; 1: read operation enabled)
page 87/113
ISM330DLC
SLV1_SUBADD (06h)
12.5
SLV1_SUBADD (06h)
Address of register on the second external sensor (sensor 2) register (R/W)
Table 235. SLV1_SUBADD register
Slave1_reg7
Slave1_reg6
Slave1_reg5
Slave1_reg4
Slave1_reg3
Slave1_reg2
Slave1_reg1
Slave1_reg0
Table 236. SLV1_SUBADD register description
Slave1_reg[7:0]
12.6
Address of register on sensor 2 that has to be read according to the r_1 bit value in SLV1_ADD (05h).
Default value: 00000000
SLV1_CONFIG (07h)
Second external sensor (sensor 2) configuration register (R/W)
Table 237. SLV1_CONFIG register
Slave1_rate1
Slave1_rate0
write_once
0(1)
0(1)
Slave1_numop2
Slave1_numop1
Slave1_numop0
1. This bit must be set to 0 for the correct operation of the device.
Table 238. SLV1_CONFIG register description
Decimation of read operation on sensor 2 starting from the sensor hub trigger. Default value: 00
(00: no decimation;
Slave1_rate[1:0]
01: update every 2 samples;
10: update every 4 samples;
11: update every 8 samples.)
Slave 0 write operation is performed only at the first sensor hub cycle.(1)
write_once
Default value: 0
(0: write operation for each sensor hub cycle;
1: write operation only for the first sensor hub cycle)
Slave1_numop[2:0]
Number of read operations on sensor 2.
1. This is active if the Aux_sens_on[1:0] field in SLV0_CONFIG (04h) is set to a value other than 00.
DS12171 - Rev 4
page 88/113
ISM330DLC
SLV2_ADD (08h)
12.7
SLV2_ADD (08h)
I²C slave address of the third external sensor (sensor 3) register (R/W)
Table 239. SLV2_ADD register
Slave2_add6
Slave2_add5
Slave2_add4
Slave2_add3
Slave2_add2
Slave2_add1
Slave2_add0
r_2
Slave2_reg1
Slave2_reg0
Table 240. SLV2_ADD register description
I²C slave address of sensor 3 that can be read by sensor hub.
Slave2_add[6:0]
Default value: 0000000
Enables read operation on sensor 3. Default value: 0
r_2
12.8
(0: read operation disabled; 1: read operation enabled)
SLV2_SUBADD (09h)
Address of register on the third external sensor (sensor 3) register (R/W)
Table 241. SLV2_SUBADD register
Slave2_reg7
Slave2_reg6
Slave2_reg5
Slave2_reg4
Slave2_reg3
Slave2_reg2
Table 242. SLV2_SUBADD register description
Slave2_reg[7:0]
12.9
Address of register on sensor 3 that has to be read according to the r_2 bit value in SLV2_ADD (08h).
Default value: 00000000
SLV2_CONFIG (0Ah)
Third external sensor (sensor 3) configuration register (R/W)
Table 243. SLV2_CONFIG register
Slave2_rate1
Slave2_rate0
0(1)
0(1)
0(1)
Slave2_numop2
Slave2_numop1
Slave2_numop0
1. This bit must be set to 0 for the correct operation of the device.
Table 244. SLV2_CONFIG register description
Decimation of read operation on sensor 3 starting from the sensor hub trigger. Default value: 00
(00: no decimation;
Slave2_rate[1:0]
01: update every 2 samples;
10: update every 4 samples;
11: update every 8 samples.)
Slave2_numop[2:0]
DS12171 - Rev 4
Number of read operations on sensor 3.
page 89/113
ISM330DLC
SLV3_ADD (0Bh)
12.10
SLV3_ADD (0Bh)
I²C slave address of the fourth external sensor (sensor 4) register (R/W)
Table 245. SLV3_ADD register
Slave3_add6
Slave3_add5
Slave3_add4
Slave3_add3
Slave3_add2
Slave3_add1
Slave3_add0
r_3
Slave3_reg1
Slave3_reg0
Table 246. SLV3_ADD register description
I²C slave address of sensor 4 that can be read by the sensor hub.
Slave3_add[6:0]
Default value: 0000000
Enables read operation on sensor 4. Default value: 0
r_3
12.11
(0: read operation disabled; 1: read operation enabled)
SLV3_SUBADD (0Ch)
Address of register on the fourth external sensor (sensor 4) register (R/W)
Table 247. SLV3_SUBADD register
Slave3_reg7
Slave3_reg6
Slave3_reg5
Slave3_reg4
Slave3_reg3
Slave3_reg2
Table 248. SLV3_SUBADD register description
Slave3_reg[7:0]
12.12
Address of register on sensor 4 that has to be read according to the r_3 bit value in SLV3_ADD (0Bh).
Default value: 00000000
SLV3_CONFIG (0Dh)
Fourth external sensor (sensor 4) configuration register (R/W)
Table 249. SLV3_CONFIG register
Slave3_rate1
Slave3_rate0
0(1)
0(1)
0(1)
Slave3_numop2
Slave3_numop1
Slave3_numop0
1. This bit must be set to 0 for the correct operation of the device.
Table 250. SLV3_CONFIG register description
Decimation of read operation on Sensor4 starting from the sensor hub trigger. Default value: 00
(00: no decimation;
Slave3_rate[1:0]
01: update every 2 samples;
10: update every 4 samples;
11: update every 8 samples.)
Slave3_numop[2:0]
DS12171 - Rev 4
Number of read operations on sensor 4.
page 90/113
ISM330DLC
DATAWRITE_SRC_MODE_SUB_SLV0 (0Eh)
12.13
DATAWRITE_SRC_MODE_SUB_SLV0 (0Eh)
Data to be written into the slave device register (R/W)
Table 251. DATAWRITE_SRC_MODE_SUB_SLV0 register
Slave_dataw7 Slave_dataw6 Slave_dataw5 Slave_dataw4 Slave_dataw3 Slave_dataw2 Slave_dataw1 Slave_dataw0
Table 252. DATAWRITE_SRC_MODE_SUB_SLV0 register description
Slave_dataw[7:0]
12.14
Data to be written into the slave device according to the rw_0 bit in SLV0_ADD (02h) register or address to
be read in source mode. Default value: 00000000
MAG_SI_XX (24h)
Soft-iron matrix correction register (R/W)
Table 253. MAG_SI_XX register
MAG_SI_XX_7
MAG_SI_XX_6
MAG_SI_XX_5
MAG_SI_XX_4
MAG_SI_XX_3
MAG_SI_XX_2
MAG_SI_XX_1
MAG_SI_XX_0
Table 254. MAG_SI_XX register description
MAG_SI_XX_[7:0]
Soft-iron correction row1 col1 coefficient(1). Default value: 00001000
1. Value is expressed in sign-module format.
12.15
MAG_SI_XY (25h)
Soft-iron matrix correction register (R/W)
Table 255. MAG_SI_XY register
MAG_SI_XY_7
MAG_SI_XY_6
MAG_SI_XY_5
MAG_SI_XY_4
MAG_SI_XY_3
MAG_SI_XY_2
MAG_SI_XY_1
MAG_SI_XY_0
Table 256. MAG_SI_XY register description
MAG_SI_XY_[7:0]
Soft-iron correction row1 col2 coefficient(1). Default value: 00000000
1. Value is expressed in sign-module format.
12.16
MAG_SI_XZ (26h)
Soft-iron matrix correction register (R/W)
Table 257. MAG_SI_XZ register
MAG_SI_XZ_7
MAG_SI_XZ_6
MAG_SI_XZ_5
MAG_SI_XZ_4
MAG_SI_XZ_3
MAG_SI_XZ_2
MAG_SI_XZ_1
MAG_SI_XZ_0
Table 258. MAG_SI_XZ register description
MAG_SI_XZ_[7:0]
Soft-iron correction row1 col3 coefficient(1). Default value: 00000000
1. Value is expressed in sign-module format.
DS12171 - Rev 4
page 91/113
ISM330DLC
MAG_SI_YX (27h)
12.17
MAG_SI_YX (27h)
Soft-iron matrix correction register (R/W)
Table 259. MAG_SI_YX register
MAG_SI_YX_7
MAG_SI_YX_6
MAG_SI_YX_5
MAG_SI_YX_4
MAG_SI_YX_3
MAG_SI_YX_2
MAG_SI_YX_1
MAG_SI_YX_0
Table 260. MAG_SI_YX register description
MAG_SI_YX_[7:0]
Soft-iron correction row2 col1 coefficient(1). Default value: 00000000
1. Value is expressed in sign-module format.
12.18
MAG_SI_YY (28h)
Soft-iron matrix correction register (R/W)
Table 261. MAG_SI_YY register
MAG_SI_YY_7
MAG_SI_YY_6
MAG_SI_YY_5
MAG_SI_YY_4
MAG_SI_YY_3
MAG_SI_YY_2
MAG_SI_YY_1
MAG_SI_YY_0
Table 262. MAG_SI_YY register description
MAG_SI_YY_[7:0]
Soft-iron correction row2 col2 coefficient(1). Default value: 00001000
1. Value is expressed in sign-module format.
12.19
MAG_SI_YZ (29h)
Soft-iron matrix correction register (R/W)
Table 263. MAG_SI_YZ register
MAG_SI_YZ_7
MAG_SI_YZ_6
MAG_SI_YZ_5
MAG_SI_YZ_4
MAG_SI_YZ_3
MAG_SI_YZ_2
MAG_SI_YZ_1
MAG_SI_YZ_0
Table 264. MAG_SI_YZ register description
MAG_SI_YZ_[7:0]
Soft-iron correction row2 col3 coefficient(1). Default value: 00000000
1. Value is expressed in sign-module format.
12.20
MAG_SI_ZX (2Ah)
Soft-iron matrix correction register (R/W)
Table 265. MAG_SI_ZX register
MAG_SI_ZX_7
MAG_SI_ZX_6
MAG_SI_ZX_5
MAG_SI_ZX_4
MAG_SI_ZX_3
MAG_SI_ZX_2
MAG_SI_ZX_1
MAG_SI_ZX_0
Table 266. MAG_SI_ZX register description
MAG_SI_ZX_[7:0]
Soft-iron correction row3 col1 coefficient(1). Default value: 00000000
1. Value is expressed in sign-module format.
DS12171 - Rev 4
page 92/113
ISM330DLC
MAG_SI_ZY (2Bh)
12.21
MAG_SI_ZY (2Bh)
Soft-iron matrix correction register (R/W)
Table 267. MAG_SI_ZY register
MAG_SI_ZY_7
MAG_SI_ZY_6
MAG_SI_ZY_5
MAG_SI_ZY_4
MAG_SI_ZY_3
MAG_SI_ZY_2
MAG_SI_ZY_1
MAG_SI_ZY_0
Table 268. MAG_SI_ZY register description
MAG_SI_ZY_[7:0]
Soft-iron correction row3 col2 coefficient(1). Default value: 00000000
1. Value is expressed in sign-module format.
12.22
MAG_SI_ZZ (2Ch)
Soft-iron matrix correction register (R/W)
Table 269. MAG_SI_ZZ register
MAG_SI_ZZ_7
MAG_SI_ZZ_6
MAG_SI_ZZ_5
MAG_SI_ZZ_4
MAG_SI_ZZ_3
MAG_SI_ZZ_2
MAG_SI_ZZ_1
MAG_SI_ZZ_0
Table 270. MAG_SI_ZZ register description
MAG_SI_ZZ_[7:0]
Soft-iron correction row3 col3 coefficient(1). Default value: 00001000
1. Value is expressed in sign-module format.
12.23
MAG_OFFX_L (2Dh)
Offset for X-axis hard-iron compensation register (R/W). The value is expressed as a 16-bit word in two’s
complement.
Table 271. MAG_OFFX_L register
MAG_OFFX_L_7
MAG_OFFX_L_6
MAG_OFFX_L_5
MAG_OFFX_L_4
MAG_OFFX_L_3
MAG_OFFX_L_2
MAG_OFFX_L_1
MAG_OFFX_L_0
Table 272. MAG_OFFX_L register description
MAG_OFFX_L_[7:0]
12.24
Offset for X-axis hard-iron compensation. Default value: 00000000
MAG_OFFX_H (2Eh)
Offset for X-axis hard-iron compensation register (R/W).The value is expressed as a 16-bit word in two’s
complement.
Table 273. MAG_OFFX_H register
MAG_OFFX_H_7 MAG_OFFX_H_6 MAG_OFFX_H_5 MAG_OFFX_H_4 MAG_OFFX_H_3 MAG_OFFX_H_2 MAG_OFFX_H_1 MAG_OFFX_H_0
Table 274. MAG_OFFX_H register description
MAG_OFFX_H_[7:0]
DS12171 - Rev 4
Offset for X-axis hard-iron compensation. Default value: 00000000
page 93/113
ISM330DLC
MAG_OFFY_L (2Fh)
12.25
MAG_OFFY_L (2Fh)
Offset for Y-axis hard-iron compensation register (R/W). The value is expressed as a 16-bit word in two’s
complement.
Table 275. MAG_OFFY_L register
MAG_OFFY_L_7
MAG_OFFY_L_6
MAG_OFFY_L_5
MAG_OFFY_L_4
MAG_OFFY_L_3
MAG_OFFY_L_2
MAG_OFFY_L_1
MAG_OFFY_L_0
Table 276. MAG_OFFY_L register description
MAG_OFFY_L_[7:0]
12.26
Offset for Y-axis hard-iron compensation. Default value: 00000000
MAG_OFFY_H (30h)
Offset for Y-axis hard-iron compensation register (R/W). The value is expressed as a 16-bit word in two’s
complement.
Table 277. MAG_OFFY_H register
MAG_OFFY_H_7 MAG_OFFY_H_6 MAG_OFFY_H_5 MAG_OFFY_H_4 MAG_OFFY_H_3 MAG_OFFY_H_2 MAG_OFFY_H_1 MAG_OFFY_H_0
Table 278. MAG_OFFY_H register description
MAG_OFFY_H_[7:0]
12.27
Offset for Y-axis hard-iron compensation. Default value: 00000000
MAG_OFFZ_L (31h)
Offset for Z-axis hard-iron compensation register (R/W). The value is expressed as a 16-bit word in two’s
complement.
Table 279. MAG_OFFZ_L register
MAG_OFFZ_L_7
MAG_OFFZ_L_6
MAG_OFFZ_L_5
MAG_OFFZ_L_4
MAG_OFFZ_L_3
MAG_OFFZ_L_2
MAG_OFFZ_L_1
MAG_OFFZ_L_0
Table 280. MAG_OFFZ_L register description
MAG_OFFZ_L_[7:0]
12.28
Offset for Z-axis hard-iron compensation. Default value: 00000000
MAG_OFFZ_H (32h)
Offset for Z-axis hard-iron compensation register (R/W). The value is expressed as a 16-bit word in two’s
complement.
Table 281. MAG_OFFZ_H register
MAG_OFFZ_H_7
MAG_OFFZ_H_6
MAG_OFFZ_H_5
MAG_OFFZ_H_4
MAG_OFFZ_H_3
MAG_OFFZ_H_2
MAG_OFFZ_H_1
MAG_OFFZ_H_0
Table 282. MAG_OFFZ_H register description
MAG_OFFZ_H_[7:0]
DS12171 - Rev 4
Offset for Z-axis hard-iron compensation. Default value: 00000000
page 94/113
ISM330DLC
Soldering information
13
Soldering information
The LGA package is compliant with the ECOPACK and RoHS standard.
It is qualified for soldering heat resistance according to JEDEC J-STD-020.
For land pattern and soldering recommendations, consult technical note TN0018 available on www.st.com.
DS12171 - Rev 4
page 95/113
ISM330DLC
Package information
14
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
14.1
LGA-14L package information
Figure 23. LGA-14L 2.5 x 3.0 x 0.86 mm package outline and mechanical data
Pin1 indicator
C
W
H
4x (0.1)
0.5
14x 0.25±0.05
0.5
L
1.5
Pin 1 indicator
1
14x 0.475±0.05
0.05
TOP VIEW
C
BOTTOM VIEW
Dimensions are in millimeter unless otherwise specified
General tolerance is +/-0.1mm unless otherwise specified
OUTER DIMENSIONS
ITEM
Length [L]
Width [W]
Height [H]
DIMENSION [mm]
2.50
3.00
0.86
TOLERANCE [mm]
±0.1
±0.1
MA X
DM00249496_5
DS12171 - Rev 4
page 96/113
ISM330DLC
LGA-14 packing information
14.2
LGA-14 packing information
Figure 24. Carrier tape information for LGA-14 package
Figure 25. LGA-14 package orientation in carrier tape
DS12171 - Rev 4
page 97/113
ISM330DLC
LGA-14 packing information
Figure 26. Reel information for carrier tape of LGA-14 package
T
40mm min.
Access hole at
slot location
B
C
N
D
A
Full radius
G measured at hub
Tape slot
in core for
tape start
2.5mm min. width
Table 283. Reel dimensions for carrier tape of LGA-14 package
Reel dimensions (mm)
DS12171 - Rev 4
A (max)
330
B (min)
1.5
C
13 ±0.25
D (min)
20.2
N (min)
60
G
12.4 +2/-0
T (max)
18.4
page 98/113
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Revision history
Table 284. Document revision history
Date
Revision
15-Jun-2017
1
24-Nov-2017
2
Changes
Initial release
Updated Table 3: Mechanical characteristics
Updated footnote 1 of Table 41: FIFO ODR selection
Added product label indicating ST's 10-year longevity commitment
13-Nov-2018
3
Added sensor resonant frequency to Table 2. Mechanical characteristics
Updated bit 7 in FIFO_CTRL2 (07h)
Updated bit 0 in MD1_CFG (5Eh)
Added product resources on page 1
Updated Note below Figure 3 and Figure 4
08-Mar-2023
4
Updated gyroscope and accelerometer current consumption during power-down in
Table 3. Electrical characteristics
Minor textual updates
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Contents
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2
Embedded smart features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3.1
4
5
Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Module specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.1
Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.4
Communication interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.4.1
SPI - serial peripheral interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.4.2
I²C- inter-IC control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.5
Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.6
Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.6.1
Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.6.2
Zero-g and zero-rate level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
5.1
Operating modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.2
Gyroscope power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.3
Accelerometer power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.4
Block diagram of filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.5
6
Tilt detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5.4.1
Block diagrams of the gyroscope filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.4.2
Block diagrams of the accelerometer filters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.5.1
Bypass mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.5.2
FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.5.3
Continuous mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.5.4
Continuous-to-FIFO mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.5.5
Bypass-to-continuous mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.5.6
FIFO reading procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
6.1
I²C/SPI interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.2
Master I²C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.3
Auxiliary SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.4
I²C serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
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6.4.1
6.5
7
SPI bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6.5.1
SPI read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.5.2
SPI write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6.5.3
SPI read in 3-wire mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
7.1
ISM330DLCelectrical connections in mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.2
ISM330DLC electrical connections in mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7.3
ISM330DLC electrical connections in mode 3 and mode 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
7.3.1
8
I²C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Auxiliary SPI configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
8.1
Gyroscope filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.2
Accelerometer filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8.2.1
Accelerometer full scale set from primary interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8.2.2
Accelerometer full scale set from auxiliary SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
9
Register mapping. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
10
Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
10.1
FUNC_CFG_ACCESS (01h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
10.2
SENSOR_SYNC_TIME_FRAME (04h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
10.3
SENSOR_SYNC_RES_RATIO (05h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
10.4
FIFO_CTRL1 (06h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
10.5
FIFO_CTRL2 (07h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
10.6
FIFO_CTRL3 (08h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
10.7
FIFO_CTRL4 (09h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
10.8
FIFO_CTRL5 (0Ah). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
10.9
DRDY_PULSE_CFG (0Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
10.10 INT1_CTRL (0Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
10.11 INT2_CTRL (0Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
10.12 WHO_AM_I (0Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
10.13 CTRL1_XL (10h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
10.14 CTRL2_G (11h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
10.15 CTRL3_C (12h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
10.16 CTRL4_C (13h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
10.17 CTRL5_C (14h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
10.18 CTRL6_C (15h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
10.19 CTRL7_G (16h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
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10.20 CTRL8_XL (17h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
10.21 CTRL9_XL (18h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
10.22 CTRL10_C (19h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
10.23 MASTER_CONFIG (1Ah). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
10.24 WAKE_UP_SRC (1Bh). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
10.25 TAP_SRC (1Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
10.26 D6D_SRC (1Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
10.27 STATUS_REG/STATUS_SPIAux (1Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
10.28 OUT_TEMP_L (20h), OUT_TEMP_H (21h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
10.29 OUTX_L_G (22h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
10.30 OUTX_H_G (23h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
10.31 OUTY_L_G (24h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
10.32 OUTY_H_G (25h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
10.33 OUTZ_L_G (26h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
10.34 OUTZ_H_G (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
10.35 OUTX_L_XL (28h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
10.36 OUTX_H_XL (29h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
10.37 OUTY_L_XL (2Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
10.38 OUTY_H_XL (2Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
10.39 OUTZ_L_XL (2Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
10.40 OUTZ_H_XL (2Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
10.41 SENSORHUB1_REG (2Eh). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
10.42 SENSORHUB2_REG (2Fh). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
10.43 SENSORHUB3_REG (30h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
10.44 SENSORHUB4_REG (31h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
10.45 SENSORHUB5_REG (32h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
10.46 SENSORHUB6_REG (33h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
10.47 SENSORHUB7_REG (34h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
10.48 SENSORHUB8_REG (35h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
10.49 SENSORHUB9_REG (36h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
10.50 SENSORHUB10_REG (37h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
10.51 SENSORHUB11_REG (38h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
10.52 SENSORHUB12_REG (39h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
10.53 FIFO_STATUS1 (3Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
10.54 FIFO_STATUS2 (3Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
10.55 FIFO_STATUS3 (3Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
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10.56 FIFO_STATUS4 (3Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
10.57 FIFO_DATA_OUT_L (3Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
10.58 FIFO_DATA_OUT_H (3Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
10.59 TIMESTAMP0_REG (40h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
10.60 TIMESTAMP1_REG (41h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
10.61 TIMESTAMP2_REG (42h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
10.62 SENSORHUB13_REG (4Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
10.63 SENSORHUB14_REG (4Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
10.64 SENSORHUB15_REG (4Fh). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
10.65 SENSORHUB16_REG (50h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
10.66 SENSORHUB17_REG (51h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
10.67 SENSORHUB18_REG (52h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
10.68 FUNC_SRC1 (53h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
10.69 FUNC_SRC2 (54h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
10.70 TAP_CFG (58h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
10.71 TAP_THS_6D (59h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
10.72 INT_DUR2 (5Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
10.73 WAKE_UP_THS (5Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
10.74 WAKE_UP_DUR (5Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
10.75 FREE_FALL (5Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
10.76 MD1_CFG (5Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
10.77 MD2_CFG (5Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
10.78 MASTER_CMD_CODE (60h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
10.79 SENS_SYNC_SPI_ERROR_CODE (61h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
10.80 OUT_MAG_RAW_X_L (66h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
10.81 OUT_MAG_RAW_X_H (67h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
10.82 OUT_MAG_RAW_Y_L (68h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
10.83 OUT_MAG_RAW_Y_H (69h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
10.84 OUT_MAG_RAW_Z_L (6Ah). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
10.85 OUT_MAG_RAW_Z_H (6Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
10.86 INT_OIS (6Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
10.87 CTRL1_OIS (70h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
10.88 CTRL2_OIS (71h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
10.89 CTRL3_OIS (72h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
10.90 X_OFS_USR (73h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
10.91 Y_OFS_USR (74h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
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10.92 Z_OFS_USR (75h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
11
Embedded functions register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .85
12
Embedded functions registers description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86
12.1
SLV0_ADD (02h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
12.2
SLV0_SUBADD (03h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
12.3
SLV0_CONFIG (04h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
12.4
SLV1_ADD (05h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
12.5
SLV1_SUBADD (06h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
12.6
SLV1_CONFIG (07h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
12.7
SLV2_ADD (08h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
12.8
SLV2_SUBADD (09h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
12.9
SLV2_CONFIG (0Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
12.10 SLV3_ADD (0Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
12.11 SLV3_SUBADD (0Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
12.12 SLV3_CONFIG (0Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
12.13 DATAWRITE_SRC_MODE_SUB_SLV0 (0Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
12.14 MAG_SI_XX (24h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
12.15 MAG_SI_XY (25h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
12.16 MAG_SI_XZ (26h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
12.17 MAG_SI_YX (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
12.18 MAG_SI_YY (28h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
12.19 MAG_SI_YZ (29h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
12.20 MAG_SI_ZX (2Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
12.21 MAG_SI_ZY (2Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
12.22 MAG_SI_ZZ (2Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
12.23 MAG_OFFX_L (2Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
12.24 MAG_OFFX_H (2Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
12.25 MAG_OFFY_L (2Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
12.26 MAG_OFFY_H (30h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
12.27 MAG_OFFZ_L (31h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
12.28 MAG_OFFZ_H (32h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
13
Soldering information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95
14
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .96
14.1
LGA-14L package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
14.2
LGA-14 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
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Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99
List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
List of figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
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List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Table 30.
Table 31.
Table 32.
Table 33.
Table 34.
Table 35.
Table 36.
Table 37.
Table 38.
Table 39.
Table 40.
Table 41.
Table 42.
Table 43.
Table 44.
Table 45.
Table 46.
Table 47.
Table 48.
Table 49.
Table 50.
Table 51.
Table 52.
Table 53.
Pin description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
SPI slave timing values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
I²C slave timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
I²C slave timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Master I²C pin details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Auxiliary SPI pin details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
I²C terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SAD read/write patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Transfer when master is writing one byte to slave. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Transfer when master is writing multiple bytes to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Transfer when master is receiving (reading) one byte of data from slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Transfer when master is receiving (reading) multiple bytes of data from slave . . . . . . . . . . . . . . . . . . . . . . . . . 25
Internal pin status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Registers address map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
FUNC_CFG_ACCESS register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
FUNC_CFG_ACCESS register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
SENSOR_SYNC_TIME_FRAME register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
SENSOR_SYNC_TIME_FRAME register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
SENSOR_SYNC_RES_RATIO register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
SENSOR_SYNC_RES_RATIO register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
FIFO_CTRL1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
FIFO_CTRL1 register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
FIFO_CTRL2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
FIFO_CTRL2 register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
FIFO_CTRL3 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
FIFO_CTRL3 register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Gyroscope FIFO decimation setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Accelerometer FIFO decimation setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
FIFO_CTRL4 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
FIFO_CTRL4 register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Fourth FIFO data set decimation setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Third FIFO data set decimation setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
FIFO_CTRL5 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
FIFO_CTRL5 register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
FIFO ODR selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
FIFO mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
DRDY_PULSE_CFG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
DRDY_PULSE_CFG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
INT1_CTRL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
INT1_CTRL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
INT2_CTRL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
INT2_CTRL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
WHO_AM_I register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
CTRL1_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
CTRL1_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Accelerometer ODR register setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
CTRL2_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
CTRL2_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
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List of tables
Table 54. Gyroscope ODR configuration setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 55. CTRL3_C register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 56. CTRL3_C register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 57. CTRL4_C register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 58. CTRL4_C register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 59. CTRL5_C register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 60. CTRL5_C register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 61. Output registers wraparound pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 62. Angular rate sensor self-test mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 63. Linear acceleration sensor self-test mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 64. CTRL6_C register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 65. CTRL6_C register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 66. Trigger mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 67. Gyroscope LPF1 bandwidth selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 68. CTRL7_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 69. CTRL7_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 70. CTRL8_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 71. CTRL8_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 72. Accelerometer bandwidth selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 73. CTRL9_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 74. CTRL9_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 75. CTRL10_C register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 76. CTRL10_C register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 77. MASTER_CONFIG register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 78. MASTER_CONFIG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 79. WAKE_UP_SRC register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 80. WAKE_UP_SRC register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 81. TAP_SRC register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 82. TAP_SRC register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 83. D6D_SRC register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Table 84. D6D_SRC register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Table 85. STATUS_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 86. STATUS_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 87. STATUS_SPIAux register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 88. STATUS_SPIAux description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 89. OUT_TEMP_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 90. OUT_TEMP_H register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 91. OUT_TEMP register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 92. OUTX_L_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 93. OUTX_L_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 94. OUTX_H_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 95. OUTX_H_G register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 96. OUTY_L_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 97. OUTY_L_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 98. OUTY_H_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 99. OUTY_H_G register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 100. OUTZ_L_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 101. OUTZ_L_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 102. OUTZ_H_G register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 103. OUTZ_H_G register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 104. OUTX_L_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 105. OUTX_L_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 106. OUTX_H_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 107. OUTX_H_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 108. OUTY_L_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
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List of tables
Table 109. OUTY_L_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 110. OUTY_H_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 111. OUTY_H_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 112. OUTZ_L_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 113. OUTZ_L_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 114. OUTZ_H_XL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 115. OUTZ_H_XL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 116. SENSORHUB1_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 117. SENSORHUB1_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 118. SENSORHUB2_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 119. SENSORHUB2_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 120. SENSORHUB3_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 121. SENSORHUB3_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 122. SENSORHUB4_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 123. SENSORHUB4_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 124. SENSORHUB5_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 125. SENSORHUB5_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 126. SENSORHUB6_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 127. SENSORHUB6_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 128. SENSORHUB7_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 129. SENSORHUB7_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 130. SENSORHUB8_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 131. SENSORHUB8_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 132. SENSORHUB9_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 133. SENSORHUB9_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 134. SENSORHUB10_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 135. SENSORHUB10_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 136. SENSORHUB11_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 137. SENSORHUB11_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 138. SENSORHUB12_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 139. SENSORHUB12_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 140. FIFO_STATUS1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 141. FIFO_STATUS1 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 142. FIFO_STATUS2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 143. FIFO_STATUS2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 144. FIFO_STATUS3 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 145. FIFO_STATUS3 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 146. FIFO_STATUS4 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 147. FIFO_STATUS4 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 148. FIFO_DATA_OUT_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 149. FIFO_DATA_OUT_L register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 150. FIFO_DATA_OUT_H register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 151. FIFO_DATA_OUT_H register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 152. TIMESTAMP0_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table 153. TIMESTAMP0_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table 154. TIMESTAMP1_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table 155. TIMESTAMP1_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table 156. TIMESTAMP2_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table 157. TIMESTAMP2_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table 158. SENSORHUB13_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 159. SENSORHUB13_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 160. SENSORHUB14_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 161. SENSORHUB14_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 162. SENSORHUB15_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 163. SENSORHUB15_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
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Table 164. SENSORHUB16_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 165. SENSORHUB16_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 166. SENSORHUB17_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Table 167. SENSORHUB17_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Table 168. SENSORHUB18_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Table 169. SENSORHUB18_REG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Table 170. FUNC_SRC1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Table 171. FUNC_SRC1 register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Table 172. FUNC_SRC2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Table 173. FUNC_SRC2 register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Table 174. TAP_CFG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Table 175. TAP_CFG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Table 176. TAP_THS_6D register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Table 177. TAP_THS_6D register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Table 178. Threshold for D4D/D6D function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Table 179. INT_DUR2 register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Table 180. INT_DUR2 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Table 181. WAKE_UP_THS register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Table 182. WAKE_UP_THS register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Table 183. WAKE_UP_DUR register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Table 184. WAKE_UP_DUR register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Table 185. FREE_FALL register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Table 186. FREE_FALL register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Table 187. Threshold for free-fall function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Table 188. MD1_CFG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table 189. MD1_CFG register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table 190. MD2_CFG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Table 191. MD2_CFG register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Table 192. MASTER_CMD_CODE register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Table 193. MASTER_CMD_CODE register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Table 194. SENS_SYNC_SPI_ERROR_CODE register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 195. SENS_SYNC_SPI_ERROR_CODE register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 196. OUT_MAG_RAW_X_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 197. OUT_MAG_RAW_X_L register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 198. OUT_MAG_RAW_X_H register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 199. OUT_MAG_RAW_X_H register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 200. OUT_MAG_RAW_Y_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 201. OUT_MAG_RAW_Y_L register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 202. OUT_MAG_RAW_Y_H register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 203. OUT_MAG_RAW_Y_H register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 204. OUT_MAG_RAW_Z_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 205. OUT_MAG_RAW_Z_L register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 206. OUT_MAG_RAW_Z_H register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 207. OUT_MAG_RAW_Z_H register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 208. INT_OIS register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 209. INT_OIS register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 210. CTRL1_OIS register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 211. CTRL1_OIS register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 212. DEN mode selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 213. CTRL2_OIS register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Table 214. CTRL2_OIS register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Table 215. Gyroscope OIS chain LPF1 bandwidth selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Table 216. CTRL3_OIS register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Table 217. CTRL3_OIS register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Table 218. Accelerometer OIS channel bandwidth selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
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List of tables
Table 219. Self-test nominal output variation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 220. X_OFS_USR register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 221. X_OFS_USR register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 222. Y_OFS_USR register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 223. Y_OFS_USR register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 224. Z_OFS_USR register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 225. Z_OFS_USR register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 226. Register address map embedded functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Table 227. SLV0_ADD register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Table 228. SLV0_ADD register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Table 229. SLV0_SUBADD register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Table 230. SLV0_SUBADD register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Table 231. SLV0_CONFIG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 232. SLV0_CONFIG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 233. SLV1_ADD register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 234. SLV1_ADD register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 235. SLV1_SUBADD register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Table 236. SLV1_SUBADD register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Table 237. SLV1_CONFIG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Table 238. SLV1_CONFIG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Table 239. SLV2_ADD register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 240. SLV2_ADD register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 241. SLV2_SUBADD register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 242. SLV2_SUBADD register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 243. SLV2_CONFIG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 244. SLV2_CONFIG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 245. SLV3_ADD register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Table 246. SLV3_ADD register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Table 247. SLV3_SUBADD register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Table 248. SLV3_SUBADD register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Table 249. SLV3_CONFIG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Table 250. SLV3_CONFIG register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Table 251. DATAWRITE_SRC_MODE_SUB_SLV0 register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 252. DATAWRITE_SRC_MODE_SUB_SLV0 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 253. MAG_SI_XX register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 254. MAG_SI_XX register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 255. MAG_SI_XY register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 256. MAG_SI_XY register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 257. MAG_SI_XZ register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 258. MAG_SI_XZ register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 259. MAG_SI_YX register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 260. MAG_SI_YX register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 261. MAG_SI_YY register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 262. MAG_SI_YY register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 263. MAG_SI_YZ register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 264. MAG_SI_YZ register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 265. MAG_SI_ZX register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 266. MAG_SI_ZX register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 267. MAG_SI_ZY register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 268. MAG_SI_ZY register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 269. MAG_SI_ZZ register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 270. MAG_SI_ZZ register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 271. MAG_OFFX_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 272. MAG_OFFX_L register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 273. MAG_OFFX_H register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
DS12171 - Rev 4
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ISM330DLC
List of tables
Table 274. MAG_OFFX_H register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 275. MAG_OFFY_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Table 276. MAG_OFFY_L register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Table 277. MAG_OFFY_H register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Table 278. MAG_OFFY_H register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Table 279. MAG_OFFZ_L register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Table 280. MAG_OFFZ_L register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Table 281. MAG_OFFZ_H register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Table 282. MAG_OFFZ_H register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Table 283. Reel dimensions for carrier tape of LGA-14 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Table 284. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
DS12171 - Rev 4
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ISM330DLC
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
DS12171 - Rev 4
Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
ISM330DLC connection modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
SPI slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
I²C timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Block diagram of filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Gyroscope digital chain - mode 1 (GP) and mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Gyroscope digital chain - mode 3 / mode 4 (OIS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Accelerometer chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Accelerometer composite filter (for modes 1/2 and mode 3*). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Accelerometer composite filter (Mode 4 only*) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Read and write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SPI read protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Multiple byte SPI read protocol (2-byte example). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SPI write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Multiple byte SPI write protocol (2-byte example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
SPI read protocol in 3-wire mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
ISM330DLC electrical connections in mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
ISM330DLC electrical connections in mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
ISM330DLC electrical connections in mode 3 and mode 4 (auxiliary 3-wire SPI) . . . . . . . . . . . . . . . . . . . . . . 31
ISM330DLC electrical connections in mode 3 and mode 4 (auxiliary 4-wire SPI) . . . . . . . . . . . . . . . . . . . . . . 32
Gyroscope chain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Accelerometer chain (available only in mode 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
LGA-14L 2.5 x 3.0 x 0.86 mm package outline and mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Carrier tape information for LGA-14 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
LGA-14 package orientation in carrier tape. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Reel information for carrier tape of LGA-14 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
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ISM330DLC
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DS12171 - Rev 4
page 113/113
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