STMicroelectronics TS507 Datasheet


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STMicroelectronics TS507 Datasheet | Manualzz

TS507

Output

1

SOT23-5

SO-8

High precision rail-to-rail operational amplifier

Pin connections (top view)

Datasheet

-

production data

Applications

• Battery-powered applications

• Portable devices

• Signal conditioning

• Medical instrumentation

Description

The TS507 is a high performance rail-to-rail input/output amplifier with very low offset voltage.

This amplifier uses a new trimming technique that yields ultra low offset voltages without any need for external zeroing.

The circuit offers very stable electrical characteristics over the entire supply voltage range, and is particularly intended for automotive and industrial applications.

The TS507 is housed in the space-saving 5-pin

SOT23 package, making it well suited for batterypowered systems. This micropackage simplifies the PC board design because of its ability to be placed in small spaces (external dimensions are

2.8 mm x 2.9 mm).

Features

• Ultra low offset voltage: 25 µV typ, 100 µV max

• Rail-to-rail input/output voltage swing

• Operates from 2.7 V to 5.5 V

• High speed: 1.9 MHz

• 45° phase margin with 100 pF

• Low consumption: 0.8 mA at 2.7 V

• Very large signal voltage gain: 131 dB

• High-power supply rejection ratio: 105 dB

• Very high ESD protection 5kV (HBM)

• Latchup immunity

• Available in SOT23-5 micropackage

• Automotive qualification

March 2013

This is information on a product in full production.

DocID10958 Rev 6 1/20

www.st.com

20

5

6

1

2

3

Contents

Contents

4

TS507

Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Application note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.1

Out-of-the-loop compensation technique . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.2

In-the-loop-compensation technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.1

SOT23-5 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.2

SO-8 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2/20 DocID10958 Rev 6

TS507

1

Absolute maximum ratings and operating conditions

Absolute maximum ratings and operating conditions

Symbol

V

CC

V id

V in

T stg

R thja

R thjc

T j

ESD

Table 1. Absolute maximum ratings (AMR)

Parameter Value

Supply voltage

(1)

Differential input voltage

(2)

Input voltage

(3)

Storage temperature

Thermal resistance junction to ambient

(4)(5)

SOT23-5

SO-8

Thermal resistance junction to case

SOT23-5

SO-8

Maximum junction temperature

HBM: human body model

(6)

MM: machine model

(7)

CDM: charged device model

(8)

Latchup immunity

6

±2.5

V

DD

-0.3 to V

CC

+0.3

-65 to +150

250

125

81

40

150

5

300

2 class A

Unit

V

°C

°C/W

1. Value with respect to V

DD

pin.

2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.

3. V

CC

-V in

and V in

must not exceed 6 V.

4. Short-circuits can cause excessive heating and destructive dissipation.

5. R thja/c

are typical values.

6. Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a

1.5 k while the other pins are floating.

7. Machine model: A 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5

Ω). This is done for all couples of connected pin combinations while the other pins are floating.

8. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins.

°C kV

V kV

Symbol

V

CC

V icm

V id

T oper

Table 2. Operating conditions

Parameter

Supply voltage

(1)

Common mode input voltage range

Differential input voltage

(2)

Operating free air temperature range

TS507C

TS507I

Value

2.7 to 5.5

V

DD

to V

CC

±2.5

0 to +85

-40 to +125

1. Value with respect to V

DD

pin.

2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.

Unit

V

°C

DocID10958 Rev 6 3/20

Electrical characteristics TS507

Table 3. Electrical characteristics at V

CC

= +5 V, V

R

L

connected to V

CC

DD

= 0 V, V icm

= V

/2 (unless otherwise specified)

Symbol Parameter Conditions Min.

/2, T

amb

= 25 °C,

Typ.

Max.

Unit

DC performance

V io

I ib

I io

CMRR

PSRR

A vd

V

OL

Input offset voltage

(2)

ΔV io

/

Δt

V io

drift vs. temperature

Input bias current

Input offset current

Common mode rejection ratio

20 log (

ΔV icm

/

ΔV io

)

Power supply rejection ratio

20 log (

ΔV

CC

/

ΔV io

)

Large signal voltage gain

V

CC

-V

OH

High level output voltage drop

Low level output voltage

V icm

= 0 to 3.8 V, T=25 °C

TS507C full temperature range

TS507I full temperature range

V icm

= 0 V to 5 V, T=25 °C

TS507C full temperature range

TS507I full temperature range

T min

< T op

< T max

T = 25 °C

TS507C full temperature range

TS507I full temperature range

T = 25 °C

TS507C full temperature range

TS507I full temperature range

V icm from 0 V to 3.8 V, T=25 °C

TS507C full temperature range

TS507I full temperature range

V icm from 0 V to 5 V

V

CC

from 2.7 V to 5.5 V,

V icm

=V cc

/2, T=25 °C

TS507C full temperature range

TS507I full temperature range

R

L

= 10 k Ω, V out

= 0.5 V to 4.5 V

Full temperature range

R

L

= 600 Ω, T=25°C

TS507C full temperature range

TS507I full temperature range

R

L

= 10 k

Ω, T=25 °C

Full temperature range

R

L

= 600

Ω, T=25 °C

TS507C full temperature range

TS507I full temperature range

R

L

= 10 k

Ω, T=25 °C

Full temperature range

91

90

89

99

98

94

94

91

25

1

8

2

115

96

105

131

67

4

64

4

95

110

120

15

15

90

110

125

15

15

70

75

110

25

35

50

100

250

400

450

550

750

µV

µV/°C nA dB mV

4/20 DocID10958 Rev 6

TS507 Electrical characteristics

Table 3. Electrical characteristics at V

CC

R

L

connected to V

CC

= +5 V, V

DD

= 0 V, V

/2 (unless otherwise specified)

Symbol Parameter Conditions

= V

Min.

CC

/2, T

amb

= 25 °C,

(continued)

Typ.

Max.

Unit

104

I out

I

CC

I sink

I source

Supply current (per operator)

(2)

V out

= V

CC,

V id

=-1 V, T=25 °C

TS507C full temperature range

TS507I full temperature range

V out

= V

DD

, V id

=1 V, T=25 °C

TS507C full temperature range

TS507I full temperature range

No load, V out

=V

CC

/2,

V icm

=0 to 5 V, T=25 °C

Full temperature range

Dynamic performance

GBP Gain bandwidth product

R

L

= 2 k

Ω, C f = 100 kHz

L

= 100 pF,

φ m

G m

Phase margin

Gain margin

R

L

= 2 k

Ω, C

L

=100 pF

SR Slew rate

R

L

V

= 2 k

Ω, C out

= 1.25 V to 3.75 V

10% to 90%

L

=100 pF,

, e

N i

N

THD+e

N

Equivalent input noise voltage f = 1 kHz

Equivalent input noise current f = 10 kHz

THD + noise f=1 kHz, G=1, R

L

V icm

=2 V, V out

=2 k

Ω

=3.5 V pp

,

1. All parameter limits at temperatures different from 25 ° C are guaranteed by correlation.

2. Measurements made at 4 V icm

values: V icm

=0 V, V icm

=3.8 V, V icm

=4.2 V, V icm

=5 V.

90

77

70

74

60

53

128

0.85

1.9

45

10

0.6

12

1.2

0.0003

1.15

1.25

mA

MHz

Degrees dB

V/µs nV/ √ Hz pA/

√ Hz

%

DocID10958 Rev 6 5/20

Electrical characteristics TS507

Table 4. Electrical characteristics at V

R

L

connected to V

CC

CC

= +3.3 V, V

DD

= 0 V, V icm

= V

/2 (unless otherwise specified)

Symbol Parameter Conditions Min.

/2, T amb

= 25 °C,

Typ.

Max.

Unit

DC performance

V io

Input offset voltage

(2)

V icm

= 0 to 2.1 V, T=25 °C

TS507C full temperature range

TS507I full temperature range

V icm

= 0 V to 3.3 V, T=25 °C

TS507C full temperature range

TS507I full temperature range

ΔV

I

I ib io io

V io

drift vs. temperature

Input bias current

Input offset current

T min

< T op

< T max

T = 25 °C

TS507C full temperature range

TS507I full temperature range

T = 25 °C

TS507C full temperature range

TS507I full temperature range

CMRR

Common mode rejection ratio

20 log (

ΔV icm

/

ΔV io

)

Large signal voltage gain

V icm

from 0 V to 2.1 V

V

CC

-V

OH

V

I

A

I vd

OL out

CC

I

I

High level output voltage drop

Low level output voltage sink source

Supply current (per operator)

(2)

R

L

= 10 k

Ω, V out

= 0.5 V to 2.8 V

R

L

= 600 Ω, T=25 °C

TS507C full temperature range

TS507I full temperature range

R

L

= 10 k

Ω, T=25 °C

Full temperature range

R

L

= 600

Ω, T=25 °C

TS507C full temperature range

TS507I full temperature range

R

L

= 10 k

Ω, T=25 °C

Full temperature range

V out

= V

CC,

V id

=-1 V, T=25 °C

TS507C full temperature range

TS507I full temperature range

V out

= V

DD

, V id

=1 V, T=25 °C

TS507C full temperature range

TS507I full temperature range

No load, V out

=V

CC

/2,

V icm

=0 to 3.3 V, T=25 °C

Full temperature range

37

32

29

33

26

22

25

1

6

2

115

127

59

4

57

4

48

56

0.81

85

100

110

15

15

80

100

115

15

15

70

75

145

25

40

45

100

250

400

450

550

750

1.1

1.2

µV

µV/°C nA dB mV mA

6/20 DocID10958 Rev 6

TS507 Electrical characteristics

Table 4. Electrical characteristics at V

CC

R

L

connected to V

CC

= +3.3 V, V

DD

= 0 V, V

/2 (unless otherwise specified)

Symbol Parameter Conditions

= V

(continued)

Min.

CC

/2, T amb

= 25 °C,

Typ.

Max.

Unit

Dynamic performance

GBP Gain bandwidth product

R

L

= 2 k Ω, C f = 100 kHz

L

= 100 pF,

φ m

G m

Phase margin

Gain margin

R

L

= 2 k Ω, C

L

=100 pF

SR Slew rate

R

L

V

= 2 k Ω, C out

10 % to 90 %

L

=100 pF,

= 0.5 V to 2.8 V

, e

N

THD+e

N

Equivalent input noise voltage f = 1 kHz

THD + noise f=1 KHz, G=1, R

V icm

=1.15 V, V out

L

=2 k Ω

=1.8 V

, pp

1. All parameter limits at temperatures different from 25 ° C are guaranteed by correlation.

2. Measurements done at 4 V icm

values: V icm

=0 V, V icm

=2.1 V, V icm

=2.5 V, V icm

=3.3 V.

1.9

45

10

0.6

12

0.0004

MHz

Degrees dB

V/µs nV/

√ Hz

%

DocID10958 Rev 6 7/20

Electrical characteristics TS507

Table 5. Electrical characteristics at V

CC

= +2.7 V V

R

L

connected to V

CC

DD

= 0 V, V icm

= V

/2 (unless otherwise specified)

Symbol Parameter Conditions Min.

/2, T amb

= 25 °C,

Typ.

Max.

Unit

DC performance

V io

Input offset voltage

(2)

V icm

= 0 to 1.9 V, T=25 °C

TS507C full temperature range

TS507I full temperature range

V icm

= 0 V to 2.7 V, T=25 °C

TS507C full temperature range

TS507I full temperature range

ΔV

I

I ib io io

V io

drift vs. temperature

Input bias current

Input offset current

T min

< T op

< T max

T = 25 °C

TS507C full temperature range

TS507I full temperature range

T = 25 °C

TS507C full temperature range

TS507I full temperature range

CMRR

Common mode rejection ratio

20 log (

ΔV icm

/

ΔV io

)

Large signal voltage gain

V icm

from 0 V to 1.5 V

V

CC

-V

OH

V

I

A

I vd

OL out

CC

I

I

High level output voltage drop

Low level output voltage sink source

Supply current (per operator)

(2)

R

L

= 10 k

Ω, V out

= 0.5 V to 2.2 V

R

L

= 600 Ω, T=25 °C

TS507C full temperature range

TS507I full temperature range

R

L

= 10 k

Ω, T=25 °C

Full temperature range

R

L

= 600

Ω, T=25 °C

TS507C full temperature range

TS507I full temperature range

R

L

= 10 k

Ω, T=25 °C

Full temperature range

V out

= V

CC,

V id

=-1 V, T=25 °C

TS507C full temperature range

TS507I full temperature range

V out

= V

DD

, V id

=1 V, T=25 °C

TS507C full temperature range

TS507I full temperature range

No load, V out

=V

CC

/2,

V icm

=0 to 2.7 V, T=25 °C

Full temperature range

22

19

17

20

15

13

25

1

8

2

115

126

57

4

57

4

30

35

0.79

85

100

105

15

15

80

100

115

15

15

70

75

160

25

45

45

100

250

400

450

550

750

1.1

1.2

µV

µV/°C nA dB mV mA

8/20 DocID10958 Rev 6

TS507 Electrical characteristics

Table 5. Electrical characteristics at V

CC

R

L

connected to V

CC

= +2.7 V V

DD

= 0 V, V

/2 (unless otherwise specified)

Symbol Parameter Conditions

= V

(continued)

Min.

CC

/2, T amb

= 25 °C,

Typ.

Max.

Unit

Dynamic performance

GBP Gain bandwidth product

R

L

= 2 k Ω, C f = 100 kHz

L

= 100 pF,

φ m

G m

Phase margin

Gain margin

R

L

= 2 k Ω, C

L

=100 pF

SR Slew rate

R

L

V

= 2 k Ω, C out

10 % to 90 %

L

=100 pF,

= 0.5 V to 2.2 V, e

N

THD+e

N

Equivalent input noise voltage f = 1 kHz

THD + noise f=1 KHz, G=1, R

V icm

=0.85 V, V out

L

=2 k Ω

=1.2 V

, pp

1. All parameter limits at temperatures different from 25 ° C are guaranteed by correlation.

2. Measurements done at 4 V icm

values: V icm

=0 V, V icm

=1.5 V, V icm

=1.9 V, V icm

=2.7 V.

1.9

45

11

0.6

12

0.0005

MHz

Degrees dB

V/µs nV/

√ Hz

%

DocID10958 Rev 6 9/20

Electrical characteristics TS507

Figure 1. Input offset voltage distribution for

V icm

V

CC

-1.2 V at T=25 °C

30

25

Vio distribution at T=25°C for 0V<=Vicm<=Vcc-1.2V

20

15

10

5

0

-120 -100 -80 -60 -40 -20 0 20 40

Input offset voltage (µV)

60 80 100 120

Figure 2. Input offset voltage distribution vs. temperature for V icm

V

CC

-1.2 V

400

350

300

250

200

150

100

50

0

-50

0V<=Vicm<=Vcc-1.2V

-100

-150

-200

-250

-300

-350

-400

-50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130

Temperature (°C)

Figure 3. Input offset voltage distribution vs. temperature for V icm

V

CC

-0.8 V

-100

-200

-300

-400

300

200

100

0

700

600

500

400

-500

-600

-700

Vcc-0.8V<=Vicm<=Vcc

-50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130

Temperature (°C)

Figure 4. Input offset voltage distribution for

V icm

V

CC

-1.2 V at T=25 °C after HTB

45

40

Vio distribution at T=25°C for 0V<=Vicm<=Vcc-1.2V

after HTB (1000 hours at 125°C)

35

30

25

20

15

10

5

0

-100 -80 -60 -40 -20 0 20 40

Input offset voltage (µV)

60 80 100

Figure 5. Input offset voltage distribution for

V icm

V

CC

-1.2 V at T=25 °C after THB

Figure 6. Input offset voltage vs. input common mode voltage at T=25 °C

35

30

25

10

5

20

15

Vio distribution at T=25°C for 0V<=Vicm<=Vcc-1.2V

after THB (1000 hours at 85°C, humidity 85%)

0

-120 -100 -80 -60 -40 -20 0 20 40

Input offset voltage (µV)

60 80 100 120

00

Vcc=3.3V

Vcc=2.7V

Vcc=5.5V

Vcc=5V

-1.5

Vicm-Vcc (V)

10/20 DocID10958 Rev 6

TS507

Figure 7. Supply current vs. input common mode voltage in closed loop configuration at V

CC

=5 V

Electrical characteristics

Figure 8. Supply current vs. supply voltage at V icm

=V

CC

/2

T=125°C

0.8

0.7

T=-40°C

T=25°C

T=125°C

0.3

0.2

Vcc=5V

Closed loop

00 11 22 33

Input common mode voltage (V)

44 55

0.8

0.7

0.3

0.2

00

T=25°C

T=-40°C

11

Vicm=Vcc/2

22 33

Supply voltage (V)

44 55

Figure 9. Supply current vs. input common mode voltage in follower configuration at V

CC

=2.7 V

T=125°C

0.8

0.7

T=25°C

T=-40°C

0.3

0.2

0.0

0.0

Follower configuration

Vcc=2.7V

Input Common Mode Voltage (V)

Figure 10. Supply current vs. input common mode voltage in follower configuration

0.8

0.7

0.3

0.2

00

at V

CC

=5 V

T=125°C

T=25°C

T=-40°C

Follower configuration

Vcc=5V

11 22 33

Input Common Mode Voltage (V)

44 55

Figure 11. Output current vs. supply voltage at V icm

=V

CC

/2

150

125

Source

Vid = 1V

T=-40°C

T=125°C

T=25°C

75

50

25

00

-25

-50

-75

-125

-150

Sink

Vid = -1V

T=125°C

T=25°C

T=-40°C

Vicm=Vcc/2

Supply voltage (V)

Figure 12. Output current vs. output voltage at V

CC

=2.7 V

35

30

25

T=-40°C

15

10

5

00

-5

-10

-15

T=25°C

T=125°C

Vcc=2.7V

T=125°C

-25

-30

-35

-40

0.0

Sink

Vid=-1V

T=-40°C

Output Voltage (V)

Source

Vid=1V

T=25°C

DocID10958 Rev 6 11/20

Electrical characteristics TS507

Figure 13. Output current vs. output voltage at V

CC

=5 V

150

125

T=25°C

Source

Vid=1V

T=-40°C

00

-25

-50

-75

75

50

25

T=125°C

-125

-150

0.0

Sink

Vid=-1V

Vcc=5V

T=-40°C

Output Voltage (V)

T=125°C

T=25°C

Figure 14. Positive and negative slew rate vs. supply voltage

-1.0

2.0

2.5

Positive slew rate

Vin : from 0.5V to Vcc-0.5V

SR : calculated from 10% to 90%

T=-40°C T=25°C

T=-40°C

T=25°C

Negative slew rate

3.5

4.0

4.5

Supply Voltage (V)

T=125°C

T=125°C

5.5

6.0

Figure 15. Voltage gain and phase vs. frequency at V

CC

=5 V and V icm

=2.5 V at T=25 °C

Figure 16. Voltage gain and phase vs. frequency at V

CC

=5 V and V icm

=2.5 V at T=-40 °C

10

00

-10

50

30

-30

-50

10

4

Gain

Vcc=5V, Vicm=2.5V, G= -100

Rl=2kOhms, Vrl=Vcc/2

Tamb=25°C

10

5

10

6

Frequency (Hz)

Phase

Cl=100pF

Cl=230pF

180

150

120

90

60

30

0

-30

-60

-90

-120

-150

-180

10

7

10

00

-10

50

30

Gain

-30

-50

10

4

Vcc=5V, Vicm=2.5V, G= -100

Rl=2kOhms, Cl=100pF, Vrl=Vcc/2

Tamb=-40°C

10

5

10

6

Frequency (Hz)

Phase

10

7

180

150

120

90

60

30

0

-30

-60

-90

-120

-150

-180

Figure 17. Voltage gain and phase vs. frequency at V

CC

=5 V and V icm

=2.5 V at T=125 °C

Figure 18. Closed loop gain in voltage follower configuration for different capacitive load at T=25 °C

50 180

30

10

00

TS507 :

V cc

= 5 V

V icm

= 2,5 V

T = 25 °C

R

L

= 10 k Ω

-10

10

00

-10

-30

-50

10

4

Gain

Vcc=5V, Vicm=2.5V, G= -100

Rl=2kOhms, Cl=100pF, Vrl=Vcc/2

Tamb=125°C

10

5

10

6

Frequency (Hz)

Phase

0

10

7

-180

-30

-40

10k

Gain without C

L

Gain with C

L

=300 pF

Gain with C

L

=550 pF

100k

Frequency (Hz)

1M 10M

12/20 DocID10958 Rev 6

TS507 Electrical characteristics

Figure 19. Gain margin according to the output load, at V

CC

=5 V and T=25 °C

1E-6

1E-7

1E-8

UNSTABLE

V

V

T cc

= 5 V icm

= 2,5 V amb

= 25 °C

1E-9

1E-10

1E-11

30 dB

1E-12

1 10

0 dB

10 dB

20 dB

STABLE

100 1k 10k

Load Resistor (

Ω

)

100k 1M 10M

Figure 20. Phase margin according to the output load, at V

CC

=5 V and T=25 °C

1E-6

1E-7

0 °

1E-8

10 °

1E-9

1E-10

1E-11

1E-12

1

UNSTABLE

20 °

30 °

40 °

10

STABLE

50 °

100 1k 10k

Load Resistor (

Ω

)

100k

V cc

= 5 V

V icm

= 2,5 V

T amb

= 25 °C

1M 10M

Figure 21. Gain margin vs. output current, at V

CC

=5 V and T=25 °C

17.5

Recommended area

100 pF

12.5

7.5

2.5

-2.5

-4

550 pF

-3

300 pF

-1 00 1

Output Current (mA)

22

V

V

R cc

= 5 V icm

= 2,5 V

T amb

L

= 25 °C

= 2 k

Ω

3 44

10

00

-10

Figure 23. Phase and gain margins vs capacitive load at = 25 °C

30

-30

-40

10p

75

V cc

= 5 V

V icm

= 2,5 V

T amb

R

L

= 25 °C

= 2 k

Ω

50

25

0

100p

Gain Margin

-25

-50

Phase Margin

-75

1n

Load Capacitor (F)

-100

10n

Figure 22. Phase margin vs. output current, at V

CC

=5 V and T=25 °C

70

Recom m ended area

50

100 pF

300 pF

30

550 pF

10

00

-10

-3 -1 00 1

Output Current (mA)

V

V

T

R cc

= 5 V icm

= 2,5 V amb

= 25 °C

L

= 2 k

Ω

22 3 44

Figure 24. Distortion + noise vs. output voltage

0.1000

0.0100

0.0010

0.0001

0.01

Vcc=5V f=1kHz

Rl=2kOhms

Gain=1

BW =22kHz

Vicm=(Vcc-1V)/2

Vcc=3.3V

Vcc=2.7V

0.1

Output Voltage (Vpp)

1

DocID10958 Rev 6 13/20

Electrical characteristics

Figure 25. Distortion + noise vs. frequency

0.01

Vout=Vcc-1.5Vpp

Rl=2kOhms

Gain=1

BW =80kHz

Vicm=(Vcc-1V)/2

Vcc=2.7V

1E-3

Vcc=3.3V

Vcc=5V

1E-4

10 100 1000

Frequency (Hz)

10000

TS507

1000

Figure 26. Noise vs. frequency

100

10

1

1

Vcc=5V, Vicm=2.5V, Tamb=25°C

10 100

Frequency (Hz)

1000 10000

14/20 DocID10958 Rev 6

TS507 Application note

The application note AN2653, based on the TS507, describes three compensation techniques for solving stability issues when driving large capacitive loads. Two of these techniques are briefly explained below. For more details, refer to the AN2653 on:

www.st.com

.

The first technique, named out-of-the-loop compensation, uses an isolation resistor, R

OL

, added

in series between the output of the amplifier and its load (see

Figure 27

). The resistor

isolates the op-amp feedback network from the capacitive load. This compensation method is effective, but the drawback is a limitation on the accuracy of V resistive load value.

out

depending on the

Figure 27. Out-of-the-loop compensation schematics

To help implement the compensation, the abacus given in

Figure 28

and

Figure 29

provides

the R

OL

value to be chosen for a given C

L

and phase/gain margins. These abacus are plotted for voltage follower configuration with a load resistor of 10 k

Ω at 25 °C.

Figure 28. Gain margin abacus: serial resistor to be added in a voltage follower configuration at 25 °C

Figure 29. Phase margin abacus: serial resistor to be added in a voltage follower configuration at 25 °C

100

100

10

1

0.1

0.01

10p 100p

STABLE

UNSTABLE

1n 10n 100n

Load Capacitor (F)

V cc

= 5 V

V icm

= 2,5 V

T = 25 °C

R

L

= 10 k

Ω

1µ 10µ

10

1

0.1

0.01

10p 100p

STABLE

30 °

20 °

10 °

0 °

UNSTABLE

1n 10n 100n

Load Capacitor (F)

V

V cc

= 5 V icm

= 2,5 V

T = 25 °C

R

L

= 10 k

Ω

1µ 10µ

DocID10958 Rev 6 15/20

Application note TS507

3.2 In-the-loop-compensation technique

The second technique is called in-the-loop-compensation technique, because the additional components (a resistor and a capacitor) used to improve the stability are inserted in the feedback loop (see

Figure 30

).

Figure 30. In-the-loop compensation schematics

This compensation method allows (by a good choice of compensation components) the original pole caused by the capacitive load to be compensated. Stability is thus improved.

The main drawback of this circuit is the reduction of the output swing, because the isolation resistor is in the signal path.

Table 6

shows the best compensation components for different ranges of load capacitors

(with R

L

= 10 k Ω) in voltage follower configuration.

Table 6. Best compensation components for different load capacitor ranges in voltage follower configuration for TS507 (with R

L

= 10 k

Ω)

Load capacitor range

R

IL

(k

Ω)

C

IL

(pF)

Minimum gain margin (dB)

(1)

Minimum phase

margin (degree)

(1)

10 pF to 100 pF

100 pF to 1 nF

1

1

250

250

1 nF to 10 nF 1

1. Parameter guaranteed by design at 25 °C.

630

17

16

11

55

42

27

16/20 DocID10958 Rev 6

TS507 Package information

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK

® specifications, grade definitions and product status are available at:

www.st.com

.

ECOPACK

®

is an ST trademark.

Figure 31. SOT23-5 package mechanical drawing

Ref.

D

E b

C

A

A1

A2

E1 e e1

L

Min.

0.90

0.00

0.90

0.35

0.09

2.80

2.60

1.50

Table 7. SOT23-5 package mechanical data

Dimensions

Millimeters Mils

Typ.

Max.

1.45

0.15

1.30

0.50

0.20

3.00

3.00

1.75

Min.

35.4

0.00

35.4

13.7

3.5

110.2

102.3

59.0

Typ.

0.95

1.9

37.4

74.8

0.35

0.55

13.7

Max.

57.1

5.9

51.2

19.7

7.8

118.1

118.1

68.8

21.6

DocID10958 Rev 6 17/20

Package information

Figure 32. SO-8 package mechanical drawing

TS507

18/20

Ref.

c

D

E

E1

A

A1

A2 b

L k e h ccc

Min.

0.10

1.25

0.28

0.17

4.80

5.80

3.80

0.25

0.40

Table 8. SO-8 package mechanical data

Dimensions

Millimeters

Typ.

Min.

Max.

1.75

0.25

4.90

6.00

3.90

1.27

0.48

0.23

5.00

6.20

4.00

0.004

0.049

0.011

0.007

0.189

0.228

0.150

0.50

1.27

0.10

0.010

0.016

Inches

Typ.

0.193

0.236

0.154

0.050

DocID10958 Rev 6

Max.

0.069

0.010

0.019

0.010

0.197

0.244

0.157

0.020

0.050

0.004

TS507 Ordering information

Order code

Table 9. Order codes

Temperature range Package Packing Marking

TS507ID

TS507IDT

TS507ILT

TS507IYLT

(2)

-40°C to 125 °C

-40°C to 125 °C

SO-8

SOT23-5

(1)

SOT23-5

(1)

(automotive grade)

Tube or tape and reel

Tape and reel

TS507I

K131

K137

TS507CD

TS507CDT

TS507CLT

0°C to 85 °C

SO-8

Tube or tape and reel

Tape and reel

TS507C

SOT23-5

(1)

K136

1. All information related to the SOT23-5 package is subject to change without notice.

2. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent are qualified.

Date

01-Oct-2004

02-May-2006

15-Dec-2006

03-May-2007

08-Apr-2008

21-Mar-2013

Figure 33. Document revision history

Revision Changes

3

4

1

2

5

6

Preliminary data release for product in development.

Update preliminary data release for product in development.

First public release.

Automotive grade products added.

Electrical characteristics curves for Bode and AC stability added and updated.

Application note section added.

Features

: added automotive qualification

Updated

Table 9: Order codes

DocID10958 Rev 6 19/20

TS507

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20/20 DocID10958 Rev 6

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