General notes for specifications at maximum junction temperature. STMicroelectronics SPC572L64E3, SPC572L64F2
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Package characteristics SPC572Lx
Symbol C
Table 54. Thermal characteristics for eTQFP100 (1)
Parameter Conditions Value Unit
R
θ JA
CC D Junction-to-ambient, natural convection (2)
D
Junction-to-moving-air, ambient
Four layer board—2s2p 27.9
°C/W
R
θ JMA
CC At 200 ft./min., four layer board—2s2p
22.8
°C/W
R
θ JB
R
θ JCtop
R
θ JCbotttom
Ψ
JT
CC
CC
CC
CC
D Junction-to-board
(3)
D Junction-to-case top
(4)
D Junction-to-case bottom
D Junction-to-package top
(5)
(6)
Ring cold plate
Cold plate
Cold plate
Natural convection
11.3
13.0
1.0
0.4
°C/W
°C/W
°C/W
°C/W
1. The values are based on simulation; actual data may vary in the given range. The specified characteristics are subject to change per final device design and characterization. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance.
2. Per JEDEC JESD51-6 with the board (JESD51-7) horizontal.
3. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on the top surface of the board near the package.
4. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
5. Thermal resistance between the die and the solder pad on the bottom of the package. Interface resistance is ignored.
6. Thermal characterization parameter indicating the temperature difference between package top and the junction temperature per JEDEC JESD51-2.
4.4.1 General notes for specifications at maximum junction temperature
An estimation of the chip junction temperature, T
J
, can be obtained from the equation:
Equation 1 T
J
= T
A
+ (R
θ JA
* P
D
) where:
T
A
= ambient temperature for the package (°C)
R
θ JA
P
D
= junction-to-ambient thermal resistance (°C/W)
= power dissipation in the package (W)
The thermal resistance values used are based on the JEDEC JESD51 series of standards to provide consistent values for estimations and comparisons. The difference between the values determined for the single-layer (1s) board compared to a four-layer board that has two signal layers, a power and a ground plane (2s2p), demonstrate that the effective thermal resistance is not a constant. The thermal resistance depends on the:
• Construction of the application board (number of planes)
• Effective size of the board which cools the component
• Quality of the thermal and electrical connections to the planes
• Power dissipated by adjacent components
Connect all the ground and power balls to the respective planes with one via per ball. Using fewer vias to connect the package to the planes reduces the thermal performance. Thinner planes also reduce the thermal performance. When the clearance between the vias leave the planes virtually disconnected, the thermal performance is also greatly reduced.
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SPC572Lx Package characteristics
As a general rule, the value obtained on a single-layer board is within the normal range for the tightly packed printed circuit board. The value obtained on a board with the internal planes is usually within the normal range if the application board has:
• One oz. (35 micron nominal thickness) internal planes
• Components are well separated
• Overall power dissipation on the board is less than 0.02 W/cm
2
The thermal performance of any component depends on the power dissipation of the surrounding components. In addition, the ambient temperature varies widely within the application. For many natural convection and especially closed box applications, the board temperature at the perimeter (edge) of the package is approximately the same as the local air temperature near the device. Specifying the local ambient conditions explicitly as the board temperature provides a more precise description of the local ambient conditions that determine the temperature of the device.
At a known board temperature, the junction temperature is estimated using the following equation:
Equation 2 T
J
= T
B
+ (R
θ JB
* P
D
) where:
T
B
= board temperature for the package perimeter (°C)
R
θ JB
P
D
= junction-to-board thermal resistance (°C/W) per JESD51-8
= power dissipation in the package (W)
When the heat loss from the package case to the air does not factor into the calculation, the junction temperature is predictable if the application board is similar to the thermal test condition, with the component soldered to a board with internal planes.
The thermal resistance is expressed as the sum of a junction-to-case thermal resistance plus a case-to-ambient thermal resistance:
Equation 3 R
θ JA
= R
θ JC
+ R
θ CA where:
R
θ JA
= junction-to-ambient thermal resistance (°C/W)
R
θ JC
= junction-to-case thermal resistance (°C/W)
R
θ CA
= case to ambient thermal resistance (°C/W)
R
θ JC
is device related and is not affected by other factors. The thermal environment can be controlled to change the case-to-ambient thermal resistance, R
θ CA
. For example, change the air flow around the device, add a heat sink, change the mounting arrangement on the printed circuit board, or change the thermal dissipation on the printed circuit board surrounding the device. This description is most useful for packages with heat sinks where 90% of the heat flow is through the case to heat sink to ambient. For most packages, a better model is required.
A more accurate two-resistor thermal model can be constructed from the junction-to-board thermal resistance and the junction-to-case thermal resistance. The junction-to-case thermal resistance describes when using a heat sink or where a substantial amount of heat is dissipated from the top of the package. The junction-to-board thermal resistance describes the thermal performance when most of the heat is conducted to the printed circuit board. This model can be used to generate simple estimations and for computational fluid dynamics
(CFD) thermal models. More accurate compact Flotherm models can be generated upon request.
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Package characteristics SPC572Lx
To determine the junction temperature of the device in the application on a prototype board, use the thermal characterization parameter ( Ψ
JT
) to determine the junction temperature by measuring the temperature at the top center of the package case using the following equation:
Equation 4 T
J
= T
T
+ ( Ψ
JT
x P
D
) where:
T
T
= thermocouple temperature on top of the package (°C)
Ψ
JT
= thermal characterization parameter (°C/W)
P
D
= power dissipation in the package (W)
The thermal characterization parameter is measured in compliance with the JESD51-2 specification using a 40-gauge type T thermocouple epoxied to the top center of the package case. Position the thermocouple so that the thermocouple junction rests on the package.
Place a small amount of epoxy on the thermocouple junction and approximately 1 mm of wire extending from the junction. Place the thermocouple wire flat against the package case to avoid measurement errors caused by the cooling effects of the thermocouple wire.
When board temperature is perfectly defined below the device, it is possible to use the thermal characterization parameter ( Ψ
JPB
) to determine the junction temperature by measuring the temperature at the bottom center of the package case (exposed pad) using the following equation:
Equation 5 T
J
= T
B
+ ( Ψ
JPB
x P
D
) where:
T
T
= thermocouple temperature on bottom of the package (°C)
Ψ
JT
= thermal characterization parameter (°C/W)
P
D
= power dissipation in the package (W)
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