Package information. STMicroelectronics STM32F412RG, STM32F412RE, STM32F412CG, STM32F412ZE, STM32F412VG, STM32F412CE, STM32F412ZG, STM32F412VE
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STM32F412xE/G Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com.
ECOPACK ® is an ST trademark.
Figure 60. WLCSP64 - 64-pin, 3.658 x 3.686 mm, 0.4 mm pitch wafer level chip scale package outline
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1. Drawing is not to scale.
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Package information STM32F412xE/G
Table 99. WLCSP64 - 64-pin, 3.658 x 3.686 mm, 0.4 mm pitch wafer level chip scale package mechanical data inches
(1)
Symbol millimeters
Min Typ Max Min Typ Max
F
G aaa e e1 e2
A
A1
A2
A3 (2) b
(3)
D
E bbb ccc ddd eee
0.525
-
-
-
0.220
3.588
3.616
-
-
-
-
-
-
-
-
-
-
0.555
0.170
0.380
0.025
0.250
3.623
3.651
0.400
2.800
2.800
0.4115
0.4255
-
-
-
-
-
0.585
-
-
-
0.280
3.658
3.686
-
-
-
-
-
0.100
0.100
0.100
0.050
0.050
1. Values in inches are converted from mm and rounded to 4 decimal digits.
2. Back side coating.
3. Dimension is measured at the maximum bump diameter parallel to primary datum Z.
-
-
-
-
-
-
-
0.0207
-
-
-
0.0087
0.1413
0.1424
-
-
-
0.0162
0.0168
-
-
-
-
-
0.0219
0.0067
0.0150
0.0010
0.0098
0.1426
0.1437
0.0157
0.1102
0.1102
-
-
0.0039
0.0039
0.0039
0.0020
0.0020
0.0230
-
-
-
0.0110
0.1440
0.1451
-
-
-
Figure 61. WLCSP64 - 64-pin, 3.658 x 3.686 mm, 0.4 mm pitch wafer level chip scale recommended footprint
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STM32F412xE/G Package information
Pitch
Dpad
Dsm
Table 100. WLCSP64 recommended PCB design rules (0.4 mm pitch)
Dimension Recommended values
Stencil opening
Stencil thickness
0.4 mm
0.225 mm
0.290 mm typ. (depends on the soldermask registration tolerance)
0.250 mm
0.100 mm
Device marking for WLCSP64
The following figure gives an example of topside marking and pin 1 position identifier location.
Other optional marking or inset/upset marks, which depend on supply chain operations, are not indicated below.
Figure 62. WLCSP64 marking example (package top view)
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1. Parts marked as “ES” or “E” or accompanied by an Engineering Sample notification letter are not yet qualified and therefore not approved for use in production. ST is not responsible for any consequences resulting from such use. In no event will ST be liable for the customer using any of these engineering samples in production. ST’s Quality department must be contacted prior to any decision to use these engineering samples to run a qualification activity.
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