STM8S001J3 Functional overview
The clock controller distributes the system clock (f
MASTER)
coming from different oscillators to the core and the peripherals. It also manages clock gating for low power modes and ensures clock robustness.
Features
• Clock prescaler : To get the best compromise between speed and current consumption the clock frequency to the CPU and peripherals can be adjusted by a programmable prescaler.
• Safe clock switching : Clock sources can be changed safely on the fly in run mode through a configuration register. The clock signal is not switched until the new clock source is ready. The design guarantees glitch-free switching.
• Clock management : To reduce power consumption, the clock controller can stop the clock to the core, individual peripherals or memory.
• Master clock sources : Three different clock sources can be used to drive the master clock:
– Up to 16 MHz high-speed user-external clock (HSE user-ext)
– 16 MHz high-speed internal RC oscillator (HSI)
– 128 kHz low-speed internal RC (LSI)
• Startup clock : After reset, the microcontroller restarts by default with an internal
2 MHz clock (HSI/8). The prescaler ratio and clock source can be changed by the application program as soon as the code execution starts.
• Clock security system (CSS) : This feature can be enabled by software. If an HSE clock failure occurs, the internal RC (16 MHz/8) is automatically selected by the CSS and an interrupt can optionally be generated.
• Configurable main clock output (CCO) : This outputs an external clock for use by the application.
Table 2. Peripheral clock gating bit assignments in CLK_PCKENR1/2 registers
Bit
Peripheral clock
Bit
Peripheral clock
Bit
Peripheral clock
Bit
Peripheral clock
PCKEN17 TIM1 PCKEN13 UART1 PCKEN27 Reserved PCKEN23 ADC
PCKEN16 Reserved PCKEN12 Reserved PCKEN26 Reserved PCKEN22
PCKEN15 TIM2 PCKEN11 SPI PCKEN25 Reserved PCKEN21
AWU
Reserved
PCKEN14 TIM4 PCKEN10 I2C PCKEN24 Reserved PCKEN20 Reserved
DS12129 Rev 4 15/84
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