- Computers & electronics
- Computer components
- Interface components
- Digital & analog I/O modules
- ADLINK Technology
- PCI-7200
- Specification
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4
Operation Theorem
In PCI-7200, there are four data transfer modes can be used for digital
I/O access and control, these modes are:
1. Direct Program Control: the digital inputs and outputs can be read/written and controlled by its corresponding I/O port address directly.
2. Internal Timer Pacer Mode: the digital input and output operations are paced by internal timer pacer and transferred by bus mastering DMA.
3. External Clock Mode: the digital input operation is clocked by external I_REQ strobe and transferred by bus mastering DMA.
4. Handshaking: through REQ and ACK signals, the digital I/O can have simple handshaking data transfer.
4.1 Direct Program Control
The digital I/O operations can be controlled by I/O port BASE+10 for digital input and BASE+14 for digital output.
The I/O port address BASE is assigned by system BIOS, please refer to Section 5 for more detailed description.
Operation Theorem
••
23
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Table of contents
- 11 CHAPTER 1 Introduction
- 12 Applications
- 12 Features
- 13 Specifications
- 15 CHAPTER 2 Installation
- 15 What You Have
- 16 Unpacking
- 16 Device Driver Installation for Windows
- 18 PCI-7200’s Layout
- 20 PCI-7200 Installation Outline
- 20 2.5.1 Hardware configuration
- 20 2.5.2 Slot selection
- 20 2.5.3 Installation Procedure
- 21 2.5.4 Running the 7200UTIL.EXE
- 21 Connector Pin Assignment
- 21 2.6.1 PCI-7200 Pin Assignment
- 23 2.6.2 cPCI-7200 Pin Assignment
- 23 8254 for Timer Pacer Generation
- 25 CHAPTER 3 Register Structure & Format
- 25 I/O Registers Format
- 26 Digital Input Register (BASE + 10)
- 26 Digital Output Register (BASE + 14)
- 27 DIO Status & Control Register (BASE + 18)
- 29 Interrupt Status & Control Register (BASE + 1C)
- 33 CHAPTER 4 Operation Theorem
- 33 4.1 Direct Program Control
- 34 4.2 Timer Pacer Mode
- 36 4.3 External Trigger
- 37 4.4 Handshaking
- 39 4.5 Timing Characteristic
- 43 CHAPTER 5 C/C++ & DLL Libraries
- 43 Installation
- 43 5.1.1 Installation
- 45 Running Testing Utility (7200UTIL.EXE)
- 46 Software Driver Naming Convention
- 46 _7200_Initial
- 48 _7200_Switch_Card_No
- 49 _7200_AUX_DI
- 50 _7200_AUX_DI_Channel
- 51 _7200_AUX_DO
- 52 _7200_AUX_DO_Channel
- 53 5.10 _7200_DI
- 54 5.11 _7200_DI_Channel
- 55 5.12 _7200_DO
- 56 5.13 _7200_DO_Channel
- 57 5.14 _7200_Alloc_DMA_Mem
- 59 5.15 _7200_Free_DMA_Mem
- 60 5.16 _7200_Alloc_DBDMA_Mem
- 61 5.17 _7200_Free_DBDMA_Mem
- 62 5.18 _7200_DI_DMA_Start
- 66 5.19 _7200_DI_DMA_Status
- 67 5.20 _7200_DI_DMA_Stop
- 68 5.21 _7200_DblBufferMode
- 69 5.22 _7200_CheckHalfReady
- 70 5.23 _7200_DblBufferTransfer
- 71 5.24 _7200_GetOverrunStatus
- 72 5.25 _7200_DO_DMA_Start
- 74 5.26 _7200_DO_DMA_Status
- 75 5.27 _7200_DO_DMA_Stop
- 76 5.28 _7200_DI_Timer
- 78 5.29 _7200_DO_Timer
- 81 CHAPTER 6 Double Buffer Mode Principle
- 83 CHAPTER 7 Limitation
- 85 The Intel (NEC)
- 86 The Control Byte
- 87 Mode Definition
- 91 Product Warranty/Service