- Computers & electronics
- Computer components
- Interface components
- Digital & analog I/O modules
- ADLINK Technology
- PCI-7200
- Specification
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6
Double Buffer Mode Principle
The data buffer for double-buffered DMA DI operation is a circular buffer logically. It logically divided into two equal halves.
The double-buffered DI begins when device starts writing data into the first half of the circular buffer (Figure 6-1a). After device begins writing to the second half of the circular buffer, you can copy the data from the first half into the transfer buffer (Figure 6-
1b). You now can process the data in the transfer buffer according to application needs. After the board has filled the second half of the circular buffer, the board returns to the first half buffer and overwrites the old data. You now can copy the second half of the circular buffer to the transfer buffer (Figure 6-
1c). The data in the transfer buffer is again available for process.
The process can be repeated endlessly to provide a continuous stream of data to your application (Figure 6-1d).
Double Buffer Mode Principle
••
71
a
Incoming DMA input data
Circular Buffer c
> >
Transfer Buffer
> > b d
> > >
> > >
Empty Buffer Untransferred Data Transferred Data
Figure 6-1
The PCI-7200 double buffer mode functions were designed according to the principle described above. If you use
_7200_DblBufferMode() to enable double buffer mode, the following _7200_DI_DMA_Start() will perform double-buffered
DMA DI. You can call _7200_CheckHalfReady() to check if data in the circular buffer is half full and ready for copying to the transfer buffer. Then you can call _7200_DblBufferTransfer() to copy data from the ready half buffer to the transfer buffer.
In Win-95 version, W_7200_Alloc_DBDMA_Mem() is needed to allocates a contiguous DMA memory for the circular buffer. The buf_size argument of W_7200_Alloc_DBDMA_Mem() is the half size of circular buffer in byte, that is, the size of each half buffer in byte. The DMA memory is referenced by the return parameter handle. This memory is system memory, users are not allowed to access it directly.
72
••
Double Buffer Mode Principle
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Table of contents
- 11 CHAPTER 1 Introduction
- 12 Applications
- 12 Features
- 13 Specifications
- 15 CHAPTER 2 Installation
- 15 What You Have
- 16 Unpacking
- 16 Device Driver Installation for Windows
- 18 PCI-7200’s Layout
- 20 PCI-7200 Installation Outline
- 20 2.5.1 Hardware configuration
- 20 2.5.2 Slot selection
- 20 2.5.3 Installation Procedure
- 21 2.5.4 Running the 7200UTIL.EXE
- 21 Connector Pin Assignment
- 21 2.6.1 PCI-7200 Pin Assignment
- 23 2.6.2 cPCI-7200 Pin Assignment
- 23 8254 for Timer Pacer Generation
- 25 CHAPTER 3 Register Structure & Format
- 25 I/O Registers Format
- 26 Digital Input Register (BASE + 10)
- 26 Digital Output Register (BASE + 14)
- 27 DIO Status & Control Register (BASE + 18)
- 29 Interrupt Status & Control Register (BASE + 1C)
- 33 CHAPTER 4 Operation Theorem
- 33 4.1 Direct Program Control
- 34 4.2 Timer Pacer Mode
- 36 4.3 External Trigger
- 37 4.4 Handshaking
- 39 4.5 Timing Characteristic
- 43 CHAPTER 5 C/C++ & DLL Libraries
- 43 Installation
- 43 5.1.1 Installation
- 45 Running Testing Utility (7200UTIL.EXE)
- 46 Software Driver Naming Convention
- 46 _7200_Initial
- 48 _7200_Switch_Card_No
- 49 _7200_AUX_DI
- 50 _7200_AUX_DI_Channel
- 51 _7200_AUX_DO
- 52 _7200_AUX_DO_Channel
- 53 5.10 _7200_DI
- 54 5.11 _7200_DI_Channel
- 55 5.12 _7200_DO
- 56 5.13 _7200_DO_Channel
- 57 5.14 _7200_Alloc_DMA_Mem
- 59 5.15 _7200_Free_DMA_Mem
- 60 5.16 _7200_Alloc_DBDMA_Mem
- 61 5.17 _7200_Free_DBDMA_Mem
- 62 5.18 _7200_DI_DMA_Start
- 66 5.19 _7200_DI_DMA_Status
- 67 5.20 _7200_DI_DMA_Stop
- 68 5.21 _7200_DblBufferMode
- 69 5.22 _7200_CheckHalfReady
- 70 5.23 _7200_DblBufferTransfer
- 71 5.24 _7200_GetOverrunStatus
- 72 5.25 _7200_DO_DMA_Start
- 74 5.26 _7200_DO_DMA_Status
- 75 5.27 _7200_DO_DMA_Stop
- 76 5.28 _7200_DI_Timer
- 78 5.29 _7200_DO_Timer
- 81 CHAPTER 6 Double Buffer Mode Principle
- 83 CHAPTER 7 Limitation
- 85 The Intel (NEC)
- 86 The Control Byte
- 87 Mode Definition
- 91 Product Warranty/Service