Q Corresponding Serial Communication Module User's Manual


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Q Corresponding Serial Communication Module User's Manual | Manualzz

9 DEDICATED INSTRUCTIONS

MELSEC-Q

9.8 CSET (Receive data clear)

Set data

(S1)

(S2)

(D1)

(D2)

Bit

Internal device

(System, user)

Word

File register

Bit

Applicable device

MELSECNET/H,

MELSECNET/10

Direct J \

Word

Special module

U \G

Index register Zn Constant Others

K, H —

[Instruction code]

CSET

[Executing condition]

[Instruction form]

ZP.CSET

"Un" (S1) (S2) (D1) (D2)

Set data

Set data

"Un"

(S1)

(S2)

(D1)

(D2)

Description

Start I/O signal of the module

(00 to FE: Top two-digit when I/O signals are expressed in 3-digit.)

Number of the channel that demands to clear receiving data.

1: Channel 1 (CH1 side)

2: Channel 2 (CH2 side)

Head number of the device that stores the control data.

Set by

User

Dummy

Head number of the bit device at the self-station that turns on for one scan at the completion of the instruction.

(D2) + 1 also turns on at an abnormal completion.

User, System

System

Data type

BIN16 bit

Device name

Device name

Bit

Each of file registers for local device and program cannot be used as the setting data.

Control data

Device

(S2) + 0

(S2) + 1

(S2) + 2

(S2) + 3 to

(S2) + 111

Item

Execution type

Complete status

Request type

For system

Set data

Select 0.

The execution result at the completion of the instruction is stored.

0: Normal

Other than 0: Abnormal (error code)

Specify the request.

4: Receive data clear request

Setting range

0

4

— —

Set by

User

System

User

System

REMARK

(1) See the "Error" explanation on the following page for details on errors caused by wrong data specifications by the user.

(2) The setting sides are partitioned as follows:

• User: Data set by the user before executing the dedicated instruction.

• System: The PLC CPU stores the execution result of the dedicated instruction.

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9 DEDICATED INSTRUCTIONS

MELSEC-Q

Function

Sequence program

CSET instruction

Complete device

Complete device+1

Q series C24

Error

(1) This function clears reception data in the OS area. It does not clear the user data reception area in the buffer memory.

(2) If the CSET instruction is executed while the read request (X03/X0A) or reception abnormal detection signal (X04/X0B) is turned on, the CSET instruction is kept waiting until the signal is turned off.

(3) The status of the CSET instruction, whether it is being executed or completed normally/abnormally, can be checked by the complete device (D2) specified by the setting data.

(a) Complete device ((D2) + 0)

This device turns on at the End processing of the scan at which the CSET instruction is completed and turns off at the next End processing.

(b) Complete device ((D2) + 1)

It turns on/off by the status at which the CSET instruction is completed.

• At normal completion: It is kept turned off and does not change.

• At abnormal completion: It turns on at the END processing of the scan at which the CSET instruction is completed and turns off at the next END processing.

[Operation at execution of CSET instruction]

Scan

End processing

Scan

End processing

Scan

Execution of instruction

End processing

Setting processing

At abnormal completion

(1) If the dedicated instruction is abnormally completed, the error flag (SM0) turns on and the error code is stored in SD0.

See the following manuals according to the error code, and check/take action according to the error.

<Error code>

4FFF

H

or less : QCPU User's Manual

(Hardware Design, Maintenance and Inspection)

7000

H or more: Section 10.2 of the User's Manual (Basic)

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9 DEDICATED INSTRUCTIONS

MELSEC-Q

Program example

This is an example of a program that clears reception data on the Q series C24 side.

It is assumed that the input/output signals of the Q series C24 are X/Y00 to X/Y1F.

Set the execution type

Set the request type

(Reception data clear)

Execute the reception data clear

Normal completion

Abnomal completion

Reset the complete flag by external command

9 - 21 9 - 21

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