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S3F80N8_UM_REV1.10 ADDRESS
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PROGRAMMING TIP — Addressing the Common Working Register Area
As the following examples show, you should access working registers in the common area, locations C0H–CFH, using working register addressing mode only.
Examples 1. LD 0C2H,40H ; Invalid addressing mode!
Use working register addressing instead:
R2,40H
2. ADD 0C3H,#45H ; Invalid addressing mode!
Use working register addressing instead:
4-BIT WORKING REGISTER ADDRESSING
Each register pointer defines a movable 8-byte slice of working register space. The address information stored in a register pointer serves as an addressing "window" that makes it possible for instructions to access working registers very efficiently using short 4-bit addresses. When an instruction addresses a location in the selected working register area, the address bits are concatenated in the following way to form a complete 8-bit address:
— The high-order bit of the 4-bit address selects one of the register pointers ("0" selects RP0, "1" selects RP1).
— The five high-order bits in the register pointer select an 8-byte slice of the register space.
— The three low-order bits of the 4-bit address select one of the eight registers in the slice.
As shown in Figure 2-10, the result of this operation is that the five high-order bits from the register pointer are concatenated with the three low-order bits from the instruction address to form the complete address. As long as the address stored in the register pointer remains unchanged, the three bits from the address will always point to an address in the same 8-byte register slice.
Figure 2-11 shows a typical example of 4-bit working register addressing. The high-order bit of the instruction
"INC R6" is "0", which selects RP0. The five high-order bits stored in RP0 (01110B) are concatenated with the three low-order bits of the instruction's 4-bit address (110B) to produce the register address 76H (01110110B).
2-11
ADDRESS SPACES S3F80N8_UM_REV1.10
Selects
RP0 or RP1
Address OPCODE
RP0
RP1
Register pointer provides five high-order bits
4-bit address provides three low-order bits
Together they create an
8-bit register address
Figure 2-10. 4-Bit Working Register Addressing
RP0
0 1 1 1 0 0 0 0
0 1 1 1 0 1 1 0
Register address
(76H)
Selects RP0
RP1
0 1 1 1 1 0 0 0
R6
0 1 1 0
OPCODE
1 1 1 0
Instruction
'INC R6'
Figure 2-11. 4-Bit Working Register Addressing Example
2-12
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Table of contents
- 31 WORKING REGISTERS
- 32 USING THE REGISTER POINTS
- 36 COMMON WORKING REGISTER AREA (C0H–CFH)
- 37 4-BIT WORKING REGISTER ADDRESSING
- 39 8-BIT WORKING REGISTER ADDRESSING
- 60 BTCON — Basic Timer Control Register
- 61 CLKCON — System Clock Control Register
- 62 EXTINT — External Interrupt Enable Register
- 63 EXTPND — External Interrupt Pending Register
- 64 FLAGS — System Flags Register
- 65 IMR — Interrupt Mask Register
- 66 IPH — Instruction Pointer (High Byte)
- 66 IPL — Instruction Pointer (Low Byte)
- 67 IPR — Interrupt Priority Register
- 68 IRQ — Interrupt Request Register
- 69 P0CONH — Port 0 Control Register (High Byte)
- 70 P0CONL — Port 0 Control Register (Low Byte)
- 71 P0PUR — Port 0 Pull-up Control Register
- 72 P1CONH — Port 1 Control Register (High Byte)
- 73 P1CONL — Port 1 Control Register (Low Byte)
- 74 P1PUR — Port 1 Pull-up Control Register
- 75 P2CONH — Port 2 Control Register (High Byte)
- 76 P2CONL — Port 2 Control Register (Low Byte)
- 77 P2PUR — Port 2 Pull-up Control Register
- 78 P3CON — Port 3 Control Register
- 79 P3PUR — Port 3 Pull-up Control Register
- 80 PP — Register Page Pointer
- 81 RP0 — Register Pointer 0
- 81 RP1 — Register Pointer 1
- 82 SPL — Stack Pointer (Low Byte)
- 83 STOPCON — Stop Control Register
- 84 SYM — System Mode Register
- 85 T0CON — Timer 0 Control Register
- 88 INTERRUPT TYPES
- 89 S3F80N8 INTERRUPT STRUCTURE
- 91 SYSTEM-LEVEL INTERRUPT CONTROL REGISTERS
- 92 INTERRUPT PROCESSING CONTROL POINTS
- 93 PERIPHERAL INTERRUPT CONTROL REGISTERS
- 94 SYSTEM MODE REGISTER (SYM)
- 95 INTERRUPT MASK REGISTER (IMR)
- 96 INTERRUPT PRIORITY REGISTER (IPR)
- 98 INTERRUPT REQUEST REGISTER (IRQ)
- 99 INTERRUPT PENDING FUNCTION TYPES
- 100 INTERRUPT SOURCE POLLING SEQUENCE
- 100 INTERRUPT SERVICE ROUTINES
- 101 GENERATING INTERRUPT VECTOR ADDRESSES
- 101 NESTING OF VECTORED INTERRUPTS
- 101 INSTRUCTION POINTER (IP)
- 101 FAST INTERRUPT PROCESSING
- 102 PROCEDURE FOR INITIATING FAST INTERRUPTS
- 102 FAST INTERRUPT SERVICE ROUTINE
- 102 RELATIONSHIP TO INTERRUPT PENDING BIT TYPES
- 102 PROGRAMMING GUIDELINES
- 103 DATA TYPES
- 103 REGISTER ADDRESSING
- 103 ADDRESSING MODES
- 108 FLAGS REGISTER (FLAGS)
- 109 FLAG DESCRIPTIONS
- 110 INSTRUCTION SET NOTATION
- 114 CONDITION CODES
- 115 INSTRUCTION DESCRIPTIONS
- 191 SYSTEM CLOCK CIRCUIT
- 192 MAIN OSCILLATOR CIRCUITS
- 193 CLOCK STATUS DURING POWER-DOWN MODES
- 194 SYSTEM CLOCK CONTROL REGISTER (CLKCON)
- 195 OVERVIEW
- 197 NORMAL MODE RESET OPERATION
- 197 HARDWARE RESET VALUES
- 199 STOP MODE
- 200 IDLE MODE
- 202 PORT DATA REGISTERS
- 203 PORT 0
- 205 PORT 1
- 209 PORT 2
- 211 PORT3 (32-PIN S3F80N8)
- 214 BASIC TIMER CONTROL REGISTER (BTCON)
- 215 BASIC TIMER FUNCTION DESCRIPTION
- 219 TIMER/COUNTER 0 CONTROL REGISTER (T0CON)
- 221 TIMER 0 FUNCTION DESCRIPTION
- 245 TARGET BOARDS
- 245 PROGRAMMING SOCKET ADAPTER
- 247 TB80N8 TARGET BOARD
- 252 OTP/MTP PROGRAMMER (WRITER)