STMicroelectronics TS2012 Datasheet
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TS2012
20 LIN +
19 LIN -
15 G0
1 G1
16
17
RIN +
RIN -
7
8
STBY L
STBY R
Gain
Select
Filter-free stereo 2x2.8 W class D audio power amplifier
TS2012 - QFN20 (4x4 mm)
Pin connections (top view)
Block diagram
Gain
Select
Standby
Control
PWM
H
Bridge
LOUT+
LOUT-
2
5
Oscillator
PWM
H
Bridge
ROUT+
ROUT-
14
11
Datasheet
-
production data
Features
• Operating range from V
CC
= 2.5 V to 5.5 V
• Standby mode active low
• Output power per channel: 1.35 W @ 5 V or
0.68 W @ 3.6 V into 8 Ω with 1 % THD+N max
• Output power per channel: 2.2 W @ 5 V into
4 Ω with 1 % THD+N max
• Four gains can be selected: 6, 12, 18, 24 dB
• Low current consumption
• PSRR: 70 dB typ @ 217 Hz with 6 dB gain
• Fast startup phase: 1 ms
• Thermal shutdown protection
• QFN20 4x4 mm lead-free package
Applications
• Cellular phone
• PDA
• Flat panel TV
Description
The TS2012 is a fully differential, class D, power amplifier stereo. It is able to drive up to 1.35 W into an 8 Ω load at 5 V per channel. It achieves outstanding efficiency compared to typical class
AB audio amps.
The device has four different gain settings utilizing two discrete pins: G0 and G1.
Pop and click reduction circuitry provides low on/off switch noise while allowing the device to start within 1 ms.
Two standby pins (active low) allow each channel to be switched off independently.
The TS2012 is available in a QFN20 4x4 mm package.
July 2013
This is information on a product in full production.
DocID14236 Rev 2 1/29 www.st.com
Contents
Contents
TS2012
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Common mode feedback loop limitations . . . . . . . . . . . . . . . . . . . . . . . . 21
Low frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
wu
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Consumption in shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
QFN20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2/29 DocID14236 Rev 2
TS2012
1
Absolute maximum ratings and operating conditions
Absolute maximum ratings and operating conditions
Symbol
Table 1. Absolute maximum ratings
Parameter
V
CC
V i
T oper
T stg
T j
R thja
P d
Supply voltage
Input voltage (2)
(1)
Operating free air temperature range
Storage temperature
ESD
Maximum junction temperature
Thermal resistance junction to ambient
(3)
Power dissipation
HBM: human body model (5)
MM: machine model
(6)
Latch-up Latch-up immunity
V
STBY
Standby pin voltage maximum voltage
Lead temperature (soldering, 10 s)
Value
6
GND to V
CC
-40 to + 85
-65 to +150
150
100
Internally limited
(4)
2
200
200
GND to V
CC
260
Unit
V
°C
°C/W
°C
1. All voltage values are measured with respect to the ground pin.
2. The magnitude of the input signal must never exceed V
CC
+ 0.3 V / GND - 0.3 V.
3. The device is protected in case of over temperature by a thermal shutdown active @ 150 °C.
4. Exceeding the power derating curves over a long period causes abnormal operation.
5. Human body model: 100 pF discharged through a 1.5 k Ω resistor between two pins of the device, done for all couples of pin combinations with other pins floating.
6. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 combinations with other pins floating.
Ω), done for all couples of pin kV
V mA
V
DocID14236 Rev 2 3/29
29
Absolute maximum ratings and operating conditions TS2012
Symbol
Table 2. Operating conditions
Parameter Value Unit
V
V
CC
V
V
I ic
STBY
R
L
V
IH
Supply voltage
Input voltage range
Input common mode voltage
(1)
Standby voltage input (2)
Device ON
Device in STANDBY
Load resistor
(3)
GO, G1 - high level input voltage
(4)
2.5 to 5.5
GND to V
CC
GND+0.5V to V
CC
-0.9V
1.4
≤ V
STBY
GND ≤ V
STBY
≤ V
CC
≤ 0.4
≥ 4
1.4
≤ V
IH
≤ V
CC
V
Ω
GO, G1 - low level input voltage
V
V
IL
GND ≤ V
IL
≤ 0.4
R thja
Thermal resistance junction to ambient
(5)
40
1. I V oo
I ≤ 40 mV max with all differential gains except 24 dB. For 24 dB gain, input decoupling caps are
°C/W
2. Without any signal on V
STBY
, the device is in standby (internal 300 k Ω ± 20 % pull-down resistor).
3. Minimum current consumption is obtained when V
STBY
= GND.
4. Between G0, G1pins and GND, there is an internal 300k Ω (±20 %) pull-down resistor. When pins are floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors are disconnected
(HiZ input).
5. With 4-layer PCB.
4/29 DocID14236 Rev 2
TS2012 Typical application
Left IN+
Differential
Left Input
Left IN-
Input capacitors are optional
Cin
Cin
Right IN+
Differential
Right Input
Right IN-
Cin
Cin
Figure 1. Typical application schematics
Cs
100nF
VCC
CsL
VCC VCC
CsR
1 F
Gain Select
Control
TS2012
LIN +
LIN -
G0
G1
RIN +
RIN -
Gain
Select
Gain
Select
STBY L
Standby
STBY R
Control
PWM
H
Bridge
LOUT+
LOUT-
Oscillator
PWM
H
Bridge
ROUT+
ROUT-
Standby Control
Left speaker
Right speaker
Input capacitors are optional
Left IN+
Differential
Left Input
Left IN-
Cin
Cin
Right IN+
Differential
Right Input
Right IN-
Cin
Cin
Gain Select
Control
LIN +
LIN -
G0
G1
RIN +
RIN -
Gain
Select
Gain
Select
STBY L
Standby
STBY R
Control
Standby Control
Cs
100nF
VCC
CsL
VCC VCC
CsR
PWM
Oscillator
PWM
TS2012
H
Bridge
LOUT+
LOUT-
LC Output Filter
H
Bridge
ROUT+
ROUT-
LC Output Filter
Load
Load
DocID14236 Rev 2 5/29
29
Typical application TS2012
Components
Table 3. External component descriptions
Functional description
C
S
, C
SL
, C
SR
C in
Supply capacitor that provides power supply filtering.
Input coupling capacitors (optional) that block the DC voltage at the amplifier input terminal. The capacitors also form a high pass filter with Z in
(F cl
= 1 / (2 x π x Z in
x C in
)).
Pin number
14
15
16
17
18
11
12
13
19
20
5
6
7
8
9
10
3
4
1
2
Pin name
G1
Lout+
PVCC
PGND
Lout-
NC
STBYL
STBYR
AVCC
NC
Rout-
PGND
PVCC
Rout+
G0
Rin+
Rin-
AGND
Lin-
Lin+
Thermal pad
Table 4. Pin descriptions
Pin description
Gain select pin (MSB)
Left channel positive output
Power supply
Power ground
Left channel negative output
No internal connection
Standby pin (active low) for left channel output
Standby pin (active low) for right channel output
Analog supply
No internal connection
Right channel negative output
Power ground
Power supply
Right channel positive output
Gain select pin (LSB)
Right channel positive differential input
Right channel negative differential input
Analog ground
Left channel negative differential input
Left channel positive differential input
Connect the thermal pad of the QFN package to PCB ground
6/29 DocID14236 Rev 2
TS2012 Electrical characteristics
3.1 Electrical characteristic tables
Symbol
I
CC
I
STBY
V oo
P o
THD + N
Efficiency
PSRR
Crosstalk
CMRR
Gain
Z in
F
PWM
SNR t
WU t
STBY
Table 5. V
CC
= +5 V, GND = 0 V, V ic
= 2.5 V, T amb
= 25 °C
(unless otherwise specified)
Parameters and test conditions Min.
Typ.
Supply current
No input signal, no load, both channels
Standby current
No input signal, V
STBY
= GND
Output offset voltage
Floating inputs, G = 6dB, R
L
= 8 Ω
Output power
THD + N = 1 % max, f = 1 kHz, R
THD + N = 1 % max, f = 1 kHz, R
L
L
= 4 Ω
= 8 Ω
THD + N = 10 % max, f = 1 kHz, R
L
THD + N = 10 % max, f = 1 kHz, R
L
= 4 Ω
= 8 Ω
Total harmonic distortion + noise
P o
= 0.8 W, G = 6 dB, f =1 kHz, R
L
= 8 Ω
Efficiency per channel
P o
P o
= 2.2 W, R
L
= 1.25 W, R
= 4 Ω +15 µH
L
= 8 Ω+15 µH
Power supply rejection ratio with inputs grounded
C in
= 1 µF (1) , f = 217 Hz, R
L
= 8 Ω, Gain = 6 dB,
V ripple
= 200 mV pp
Channel separation
P o
= 0.9 W, G = 6 dB, f = 1 kHz, R
L
= 8 Ω
Common mode rejection ratio
C in
= 1 µF, f = 217 Hz, R
L
= 8 Ω, Gain = 6 dB,
Δ
VICM
= 200 mV pp
Gain value
G1 = G0 = V
IL
G1 = V
IL
& G0 = V
IH
G1 = V
IH
& G0 = V
IL
G1 = G0 = V
IH
Single ended input impedance
All gains, referred to ground
Pulse width modulator base frequency
Signal to noise ratio (A-weighting)
P o
= 1.3 W, G = 6 dB, R
L
= 8 Ω
Wakeup time
Standby time
5.5
11.5
17.5
23.5
24
190
5
0.2
2.2
1.35
2.8
1.65
0.07
81
89
70
90
70
1
1
6
12
18
24
30
280
99
Max.
8
2
25
3
6.5
12.5
18.5
24.5
36
370
Unit mA
µA mV
W
% dB k Ω kHz dB ms
DocID14236 Rev 2 7/29
29
Electrical characteristics TS2012
Table 5. V
CC
= +5 V, GND = 0 V, V ic
= 2.5 V, T amb
= 25 °C
(unless otherwise specified) (continued)
Parameters and test conditions Min.
Typ.
Symbol Max.
Unit
V
N
Output voltage noise f = 20 Hz to 20 kHz, R
L
=8 Ω
Unweighted (filterless, G = 6 dB)
A-weighted (filterless, G = 6 dB)
Unweighted (with LC output filter, G = 6 dB)
A-weighted (with LC output filter, G = 6 dB)
Unweighted (filterless, G = 24 dB)
A-weighted (filterless, G = 24 dB)
Unweighted (with LC output filter, G = 24 dB)
A-weighted (with LC output filter, G = 24 dB)
63
35
60
35
115
72
109
71
µV
1. Dynamic measurements - 20*log(rms(V out
)/rms(V ripple
)). V ripple
is the superimposed sinus signal to V
CC
@ f = 217 Hz.
RMS
8/29 DocID14236 Rev 2
TS2012 Electrical characteristics
Symbol
I
CC
I
STBY
V oo
P o
THD + N
Efficiency
PSRR
Crosstalk
CMRR
Gain
Z in
F
PWM
SNR t
WU t
STBY
Table 6. V
CC
= +3.6 V, GND = 0 V, V ic
= 1.8 V, T amb
= 25 °C
(unless otherwise specified)
Parameter Min.
Typ.
Supply current
No input signal, no load, both channels
Standby current
No input signal, V
STBY
= GND
Output offset voltage
Floating inputs, G = 6dB, R
L
= 8 Ω
Output power
THD + N = 1 % max, f = 1 kHz, R
THD + N = 1 % max, f = 1 kHz, R
L
L
= 4 Ω
= 8 Ω
THD + N = 10 % max, f = 1 kHz, R
L
THD + N = 10 % max, f = 1 kHz, R
L
= 4 Ω
= 8 Ω
Total harmonic distortion + noise
P o
= 0.4 W, G = 6 dB, f =1 kHz, R
L
= 8 Ω
Efficiency per channel
P o
= 1.15 W, R
L
P o
= 0.68 W, R
L
= 4 Ω +15 µH
= 8 Ω +15 µH
Power supply rejection ratio with inputs grounded
C in
= 1 µF (1) , f = 217 Hz, R
L
= 8 Ω, Gain = 6 dB,
V ripple
= 200 mV pp
Channel separation
P o
= 0.5 W, G = 6 dB, f =1 kHz, R
L
= 8 Ω
Common mode rejection ratio
C in
= 1 µF, f = 217 Hz, R
L
= 8 Ω, Gain = 6 dB,
Δ
VICM
= 200 mV pp
Gain value
G1 = G0 = V
IL
G1 = V
IL
& G0 = V
IH
G1 = V
IH
& G0 = V
IL
G1 = G0 = V
IH
Single ended input impedance
All gains, referred to ground
Pulse width modulator base frequency
Signal to noise ratio (A-weighting)
P o
= 0.65 W, G = 6 dB, R
L
= 8 Ω
Wakeup time
Standby time
5.5
11.5
17.5
23.5
24
190
3.3
0.2
1.15
0.68
1.3
0.9
0.05
80
88
70
90
70
1
1
6
12
18
24
30
280
96
Max.
6.5
2
25
3
6.5
12.5
18.5
24.5
36
370 k Ω kHz dB ms
Unit mA
µA mV
W
% dB
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29
Electrical characteristics TS2012
Table 6. V
CC
= +3.6 V, GND = 0 V, V ic
= 1.8 V, T amb
(unless otherwise specified) (continued)
= 25 °C
Parameter Min.
Typ.
Symbol Max.
Unit
V
N
Output voltage noise f = 20 Hz to 20 kHz, R
L
= 4 Ω
Unweighted (filterless, G = 6 dB)
A-weighted (filterless, G = 6 dB)
Unweighted (with LC output filter, G = 6 dB)
A-weighted (with LC output filter, G = 6 dB)
Unweighted (filterless, G = 24 dB)
A-weighted (filterless, G = 24 dB)
Unweighted (with LC output filter, G = 24 dB)
A-weighted (with LC output filter, G = 24 dB)
58
34
55
34
111
70
105
69
µV
1. Dynamic measurements - 20*log(rms(V out
)/rms(V ripple
)). V ripple
is the superimposed sinus signal to V
CC
@ f = 217 Hz.
RMS
10/29 DocID14236 Rev 2
TS2012 Electrical characteristics
Symbol
I
CC
I
STBY
V oo
P o
THD + N
Efficiency
PSRR
Crosstalk
CMRR
Gain
Z in
F
PWM
SNR t
WU t
STBY
Table 7. V
CC
= +2.5V, GND = 0V, V ic
=1.25V, T amb
= 25°C
(unless otherwise specified)
Parameter Min.
Typ.
Supply current
No input signal, no load, both channels
Standby current
No input signal, V
STBY
= GND
Output offset voltage
Floating inputs, G = 6dB, R
L
= 8 Ω
Output power
THD + N = 1 % max, f = 1 kHz, R
THD + N = 1 % max, f = 1 kHz, R
L
L
= 4 Ω
= 8 Ω
THD + N = 10 % max, f = 1 kHz, R
L
THD + N = 10 % max, f = 1 kHz, R
L
= 4 Ω
= 8 Ω
Total harmonic distortion + noise
P o
= 0.2 W, G = 6 dB, f =1 kHz, R
L
= 8 Ω
Efficiency per channel
P o
= 0.53 W, R
L
P o
= 0.32 W, R
L
= 4 Ω +15 µH
= 8 Ω+15 µH
Power supply rejection ratio with inputs grounded
C in
= 1 µF
(1)
, f = 217 Hz, R
L
= 8 Ω, Gain = 6 dB,
V ripple
= 200 mV pp
Channel separation
P o
= 0.2 W, G = 6 dB, f = 1 kHz, R
L
= 8 Ω
Common mode rejection ratio
C in
= 1 µF, f = 217 Hz, R
L
= 8 Ω, Gain = 6 dB,
Δ
VICM
= 200 mV pp
Gain value
G1 = G0 = V
IL
G1 = V
IL
& G0 = V
IH
G1 = V
IH
& G0 = V
IL
G1 = G0 = V
IH
Single ended input impedance
All gains, referred to ground
Pulse width modulator base frequency
Signal to noise ratio (A-weighting)
P o
= 0.3 W, G = 6 dB, R
L
= 8 Ω
Wakeup time
Standby time
5.5
11.5
17.5
23.5
24
190
2.8
0.2
0.53
0.32
0.75
0.45
0.04
80
88
70
90
70
1
1
6
12
18
24
30
280
93
Max.
4
2
25
3
6.5
12.5
18.5
24.5
36
370 k Ω kHz dB ms
Unit mA
µA mV
W
% dB
DocID14236 Rev 2 11/29
29
Electrical characteristics TS2012
Table 7. V
CC
= +2.5V, GND = 0V, V ic
=1.25V, T amb
= 25°C
(unless otherwise specified) (continued)
Parameter Min.
Typ.
Symbol Max.
Unit
V
N
Output voltage noise f = 20 Hz to 20 kHz, R
L
= 8 Ω
Unweighted (filterless, G = 6 dB)
A-weighted (filterless, G = 6 dB)
Unweighted (with LC output filter, G = 6 dB)
A-weighted (with LC output filter, G = 6 dB)
Unweighted (filterless, G = 24 dB)
A-weighted (filterless, G = 24 dB)
Unweighted (with LC output filter, G = 24 dB)
A-weighted (with LC output filter, G = 24 dB)
57
34
54
33
110
71
104
69
µV
1. Dynamic measurements - 20*log(rms(V out
)/rms(V ripple
)). V ripple
is the superimposed sinus signal to V
CC
@ f = 217 Hz.
RMS
3.2 Electrical characteristic curves
The graphs shown in this section use the following abbreviations:
• R
L
+ 15 µH or 30 µH = pure resistor + very low series resistance inductor
• Filter = LC output filter (1 µF + 30 µH for 4 Ω and 0.5 µF + 60 µH for 8 Ω)
All measurements are made with C for the PSRR where C
SL,R
SL
= C
SR
= 1 µF and C
).
S
), except
Figure 2. Test diagram for measurements
CsL
(CsR)
Vcc
C
S
100nF
Cin
Cin
GND
In+
Out+
1/2 TS2012
In-
Out-
GND or
LC Filter
GND
Audio Measurement
Bandwith < 30kHz
RL
4 or 8 Ω
5th order
50kHz low-pass filter
12/29 DocID14236 Rev 2
TS2012 Electrical characteristics
Figure 3. Test diagram for PSRR measurements
VCC
Cs
100nF
20Hz to 20kHz
Vripple
Vcc
GND
1 F
Cin
Cin
1 F
GND
5th order
50kHz low-pass filter
GND
In+
Out+
1/2 TS2012
In-
Out-
GND reference or
LC Filter
RL
4 or 8 Ω
5th order
50kHz low-pass filter
RMS Selective Measurement
Bandwith =1% of Fmeas
Table 8. Index of graphics
Description
Current consumption vs. power supply voltage
Current consumption vs. standby voltage
Efficiency vs. output power
Output power vs. power supply voltage
PSRR vs. common mode input voltage
PSRR vs. frequency
CMRR vs. common mode input voltage
CMRR vs. frequency
Gain vs. frequency
THD+N vs. output power
THD+N vs. frequency
Crosstalk vs. frequency
Power derating curves
Startup and shutdown time
Figure
,
,
DocID14236 Rev 2 13/29
29
Electrical characteristics
3
2
1
0
2.5
Figure 4. Current consumption vs. power supply voltage
6
5
T
AMB
=25°C
No Loads
4
Both channels ON
One channel ON
3.0
3.5
4.0
4.5
Power Supply Voltage (V)
5.0
5.5
100
80
60
40
20
0
0.0
Figure 6. Efficiency vs. output power (i)
0.1
Efficiency
125
Power
Dissipation
50
0.2
0.3
Output Power (W)
Vcc=2.5V
RL=4 Ω + ≥ 15 μ H
F=1kHz
THD+N ≤ 1%
0.4
25
0.5
0
100
75
TS2012
Figure 5. Current consumption vs. standby voltage (one channel)
2.5
2.0
V
CC
=5V
1.5
1.0
0.5
0.0
0 1
V
CC
=2.5V
2 3
Standby Voltage (V)
V
CC
=3.6V
4
No Load
T
AMB
=25°C
5
100
80
60
40
20
0
0.0
Figure 7. Efficiency vs. output power (ii)
Efficiency
500
400
300
200
Power
Dissipation
0.5
1.0
Output Power (W)
Vcc=5V
RL=4 Ω + ≥ 15 μ H
F=1kHz
THD+N ≤ 1%
1.5
100
2.0
0
Figure 8. Efficiency vs. output power (iii)
100 50
80 40
Efficiency
60 30
40
20
0
0.00
0.05
20
Power
Dissipation
0.10
0.15
Output Power (W)
0.20
Vcc=2.5V
RL=8 Ω + ≥ 15 μ H
F=1kHz
THD+N ≤ 1%
0.25
10
0
0.30
Figure 9. Efficiency vs. output power (iv)
100
80
60
Efficiency
200
160
120
40
20
0
0.0
0.2
80
Power
Dissipation
0.4
0.6
0.8
Output Power (W)
Vcc=5V
RL=8 Ω + ≥ 15 μ H
F=1kHz
THD+N ≤ 1%
1.0
1.2
40
1.4
0
14/29 DocID14236 Rev 2
TS2012 Electrical characteristics
Figure 10. Output power vs. power supply voltage (i)
3.5
3.0
2.5
2.0
RL = 4 Ω + ≥ 15 μ H
F = 1kHz
BW < 30kHz
Tamb = 25 ° C
THD+N=10%
1.5
1.0
0.5
0.0
2.5
3.0
3.5
4.0
4.5
Power Supply Voltage (V)
THD+N=1%
5.0
5.5
Figure 12. PSRR vs. common mode input voltage
0
-10
-20
Vripple = 200mVpp, F = 217Hz
RL ≥ 4 Ω + ≥ 15 μ H, Tamb = 25 ° C
Vcc=2.5V
Vcc=3V Vcc=5V
-30
-40
Gain=24dB
Gain=6dB
-50
-60
-70
-80
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Common Mode Input Voltage (V)
Figure 14. CMRR vs. common mode input voltage
0
-10
-20
-30
-40
-50
Δ Vicm=200mVpp, F = 217Hz
RL ≥ 4 Ω + ≥ 15 μ H, Tamb = 25 ° C
Gain=24dB
Gain=6dB
Vcc=2.5V
Vcc=3V
Vcc=5V
-60
-70
-80
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Common Mode Input Voltage (V)
Figure 11. Output power vs. power supply voltage (ii)
2.0
1.6
RL = 8 Ω + ≥ 15 μ H
F = 1kHz
BW < 30kHz
Tamb = 25 ° C
1.2
THD+N=10%
0.8
THD+N=1%
0.4
0.0
2.5
3.0
3.5
4.0
4.5
Power Supply Voltage (V)
5.0
5.5
Figure 13. PSRR vs. frequency
0
-10
-20
-30
-40
-50
-60
-70
-80
20
Inputs grounded, Vripple = 200mVpp
RL ≥ 4 Ω + ≥ 15 μ H, Cin=1 μ F, Tamb=25 ° C
Vcc = 2.5, 3.6, 5V
Gain=24dB
100
Gain=6dB
1k
Frequency (Hz)
Figure 15. CMRR vs. frequency
10k 20k
0
-10
-20
-30
-40
-50
-60
-70
-80
20
Δ Vicm=200mVpp, Vcc = 2.5, 3.6, 5V
RL ≥ 4 Ω + ≥ 15 μ H, Cin=1 μ F, Tamb=25 ° C
Gain=24dB
100 1k
Frequency (Hz)
Gain=6dB
10k 20k
DocID14236 Rev 2 15/29
29
Electrical characteristics
Figure 16. Gain vs. frequency (i)
8 no load
6
4
2
0
20
Gain = 6dB
Vin = 500mV
Cin = 4.7
μ F
T
AMB
= 25 ° C
100
RL=8 Ω +15 μ H
RL=8 Ω +30 μ H
RL=4 Ω +15 μ H
RL=4 Ω +30 μ H
1k
Frequency (Hz)
10k 20k
Figure 18. THD+N vs. output power (i)
10
1
RL = 4 Ω + 15 μ H
F = 1kHz
G = 6dB
BW < 30kHz
Tamb = 25 ° C
Vcc=5V
Vcc=3.6V
Vcc=2.5V
TS2012
Figure 17. Gain vs. frequency (ii)
26
24
no load
22
20
18
20
Gain = 24dB
Vin = 5mV
Cin = 4.7
μ F
T
AMB
= 25 ° C
100
RL=8 Ω +15 μ H
RL=8 Ω +30 μ H
RL=4 Ω
1k
Frequency (Hz)
+15 μ
RL=4
H
Ω +30 μ H
10k 20k
Figure 19. THD+N vs. output power (ii)
10
1
RL = 4 Ω + 30 μ H
F = 1kHz
G = 6dB
BW < 30kHz
Tamb = 25 ° C
Vcc=5V
Vcc=3.6V
Vcc=2.5V
0.1
1E-3 0.01
0.1
Output Power (W)
1
Figure 20. THD+N vs. output power (iii)
10
1
RL = 8 Ω + 15 μ H
F = 1kHz
G = 6dB
BW < 30kHz
Tamb = 25 ° C
Vcc=5V
Vcc=3.6V
Vcc=2.5V
3
0.1
1E-3 0.01
0.1
Output Power (W)
1 3
Figure 21. THD+N vs. output power (iv)
10
1
RL = 8 Ω + 30 μ H
F = 1kHz
G = 6dB
BW < 30kHz
Tamb = 25 ° C
Vcc=5V
Vcc=3.6V
Vcc=2.5V
0.1
1E-3 0.01
0.1
Output Power (W)
1 2
0.1
1E-3 0.01
0.1
Output Power (W)
1 2
16/29 DocID14236 Rev 2
TS2012
Figure 22. THD+N vs. output power (v)
10
1
RL = 4 Ω + 15 μ H
F = 100Hz
G = 6dB
BW < 30kHz
Tamb = 25 ° C
Vcc=5V
Vcc=3.6V
Vcc=2.5V
0.1
Electrical characteristics
Figure 23. THD+N vs. output power (vi)
10
1
RL = 4 Ω + 30 μ H
F = 100Hz
G = 6dB
BW < 30kHz
Tamb = 25 ° C
Vcc=5V
Vcc=3.6V
Vcc=2.5V
0.1
0.01
1E-3 0.01
0.1
Output Power (W)
1
Figure 24. THD+N vs. output power (vii)
10
1
RL = 8 Ω + 15 μ H
F = 100Hz
G = 6dB
BW < 30kHz
Tamb = 25 ° C
Vcc=5V
Vcc=3.6V
Vcc=2.5V
3
0.1
0.01
1E-3 0.01
0.1
Output Power (W)
1 3
Figure 25. THD+N vs. output power (viii)
10
1
RL = 8 Ω + 30 μ H
F = 100Hz
G = 6dB
BW < 30kHz
Tamb = 25 ° C
Vcc=5V
Vcc=3.6V
Vcc=2.5V
0.1
0.01
1E-3 0.01
0.1
Output Power (W)
Figure 26. THD+N vs. frequency (i)
10
1
RL=4 Ω + 15 μ H
G=6dB
BW < 30kHz
Vcc=2.5V
Tamb = 25 ° C
Po=0.4W
1 2
0.01
1E-3 0.01
0.1
Output Power (W)
Figure 27. THD+N vs. frequency (ii)
10
1
RL=4 Ω + 30 μ H
G=6dB
BW < 30kHz
Vcc=2.5V
Tamb = 25 ° C
Po=0.4W
1 2
0.1
0.01
20
0.1
100 1000
Frequency (Hz)
Po=0.2W
10000 20k
0.01
20 100 1000
Frequency (Hz)
Po=0.2W
10000 20k
DocID14236 Rev 2 17/29
29
Electrical characteristics
Figure 28. THD+N vs. frequency (iii)
10
1
RL=8 Ω + 15 μ H
G=6dB
BW < 30kHz
Vcc=2.5V
Tamb = 25 ° C
Po=0.2W
Figure 29. THD+N vs. frequency (iv)
10
1
RL=8 Ω + 30 μ H
G=6dB
BW < 30kHz
Vcc=2.5V
Tamb = 25 ° C
Po=0.2W
TS2012
0.1
Po=0.1W
0.01
20 100 1000
Frequency (Hz)
10000 20k
Figure 30. THD+N vs. frequency (v)
10
1
RL=4 Ω + 15 μ H
G=6dB
BW < 30kHz
Vcc=3.6V
Tamb = 25 ° C
Po=0.9W
0.1
0.01
20 100 1000
Frequency (Hz)
Po=0.1W
10000 20k
Figure 31. THD+N vs. frequency (vi)
10
1
RL=4 Ω + 30 μ H
G=6dB
BW < 30kHz
Vcc=3.6V
Tamb = 25 ° C
Po=0.9W
0.1
0.01
20 100 1000
Frequency (Hz)
Po=0.45W
10000 20k
Figure 32. THD+N vs. frequency (vii)
10
1
RL=8 Ω + 15 μ H
G=6dB
BW < 30kHz
Vcc=3.6V
Tamb = 25 ° C
Po=0.5W
0.1
0.01
20 100 1000
Frequency (Hz)
Po=0.45W
10000 20k
Figure 33. THD+N vs. frequency (viii)
10
1
RL=8 Ω + 30 μ H
G=6dB
BW < 30kHz
Vcc=3.6V
Tamb = 25 ° C
Po=0.5W
0.1
0.01
20
0.1
100 1000
Frequency (Hz)
Po=0.25W
10000 20k
0.01
20 100 1000
Frequency (Hz)
Po=0.25W
10000 20k
18/29 DocID14236 Rev 2
TS2012
Figure 34. THD+N vs. frequency (ix)
10
1
RL=4 Ω + 15 μ H
G=6dB
BW < 30kHz
Vcc=5V
Tamb = 25 ° C
Po=1.5W
Electrical characteristics
Figure 35. THD+N vs. frequency (x)
10
1
RL=4 Ω + 30 μ H
G=6dB
BW < 30kHz
Vcc=5V
Tamb = 25 ° C
Po=1.5W
0.1
0.01
20 100
Po=0.75W
1000
Frequency (Hz)
10000 20k
Figure 36. THD+N vs. frequency (xi)
10
1
RL=8 Ω + 15 μ H
G=6dB
BW < 30kHz
Vcc=5V
Tamb = 25 ° C
Po=0.9W
0.1
0.01
20 100
Po=0.75W
1000
Frequency (Hz)
10000 20k
Figure 37. THD+N vs. frequency (xii)
10
1
RL=8 Ω + 30 μ H
G=6dB
BW < 30kHz
Vcc=5V
Tamb = 25 ° C
Po=0.9W
0.1
0.1
0.01
20 100
Po=0.45W
1000
Frequency (Hz)
10000 20k
0.01
20 100
Po=0.45W
1000
Frequency (Hz)
10000 20k
Figure 38. Crosstalk vs. frequency (i)
0
-20
-40
Vcc=2.5, 3.6, 5V
RL=4 Ω +30 μ H
Gain = 6dB
T
AMB
= 25 ° C
-60
-80
-100
-120
20 100
R -> L
1k
Frequency (Hz)
L -> R
10k 20k
Figure 39. Crosstalk vs. frequency (ii)
0
-20
-40
Vcc=2.5, 3.6, 5V
RL=8 Ω +30 μ H
Gain = 6dB
T
AMB
= 25 ° C
-60
-80
-100
-120
20 100
R -> L
1k
Frequency (Hz)
L -> R
10k 20k
DocID14236 Rev 2 19/29
29
Electrical characteristics TS2012
Figure 40. Crosstalk vs. frequency (iii)
0
-20
-40
Vcc = 2.5, 3.6, 5V
RL = 4 Ω +30 μ H
Gain = 24dB
T
AMB
= 25 ° C
-60
-80
-100
-120
20 100
R -> L
1k
Frequency (Hz)
L -> R
10k 20k
Figure 41. Crosstalk vs. frequency (iv)
0
-20
-40
Vcc=2.5, 3.6, 5V
RL=8 Ω +30 μ H
Gain = 24dB
T
AMB
= 25 ° C
-60
-80
-100
-120
20 100
R -> L
1k
Frequency (Hz)
L -> R
10k 20k
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
Figure 42. Power derating curves
With 4-layer PCB
No Heat sink
25 50 75 100
Ambient Temperature ( ° C)
125 150
Figure 44. Startup and shutdown phase (ii)
Figure 43. Startup and shutdown phase (i)
20/29 DocID14236 Rev 2
TS2012 Application information
4.1 Differential configuration principle
The TS2012 is a monolithic fully-differential input/output class D power amplifier. The
TS2012 also includes a common-mode feedback loop that controls the output bias value to average it at V
CC
/2 for any DC common mode input voltage. This allows the device to always have a maximum output voltage swing, and by consequence, maximize the output power. Moreover, as the load is connected differentially compared with a single-ended topology, the output is four times higher for the same power supply voltage.
The advantages of a full-differential amplifier are:
• High PSRR (power supply rejection ratio)
• High common mode noise rejection
• Virtually zero pop without additional circuitry, giving a faster startup time compared with conventional single-ended input amplifiers
• Easier interfacing with differential output audio DAC
• No input coupling capacitors required thanks to common mode feedback loop
Note:
4.3
In the flat region of the frequency-response curve (no input coupling capacitor or internal feedback loop + load effect), the differential gain can be set to 6, 12 18, or 24 dB depending on the logic level of the G0 and G1 pins, as shown in
G1
0
0
1
1
Table 9. Gain settings with G0 and G1 pins
G0 Gain (dB)
0
1
0
1
6
12
18
24
Gain (V/V)
2
4
8
16
Between pins G0, G1 and GND there is an internal 300 k
Ω
(±20 %) resistor. When the pins are floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors are disconnected (HiZ input).
Common mode feedback loop limitations
The common mode feedback loop allows the output DC bias voltage to be averaged at
V
CC
/2 for any DC common mode bias input voltage.
Due to the V ic
limitation of the input stage (see Table 2: Operating conditions ), the common
mode feedback loop can fulfill its role only within the defined range.
DocID14236 Rev 2 21/29
29
Application information TS2012
If a low frequency bandwidth limitation is required, it is possible to use input coupling capacitors. In the low frequency region, the input coupling capacitor, C in effect. C in
, with the input impedance Z in off frequency (see
:
, starts to have an
, forms a first order, high-pass filter with a -3 dB cut-
Equation 1
F
CL
=
2 ⋅ ⋅ in
⋅ C in
So, for a desired cut-off frequency, F
CL,
C in
is calculated as shown in Equation 2
:
Equation 2
C in
=
2 ⋅ ⋅ in
⋅ F
CL with F
CL
in Hz, Z in
in Ω and C in
in F.
The input impedance Z in
is typically 30 k Ω for the whole power supply voltage range. There is also a tolerance around the typical value (see
minimum tolerance of the F
CL respectively.
can be calculated using
Equation 3
F
CLmax
=
1.103
⋅ F
CL
Equation 4
F
CLmin
= 0.915
⋅ F
CL
4.5 Decoupling of the circuit
Power supply capacitors, referred to as C
S the TS2012.
, C
SL
, and C
SR
are needed to correctly bypass
The TS2012 has a typical switching frequency of 280 kHz and an output fall and rise time of about 5 ns. Due to these very fast transients, careful decoupling is mandatory.
A 1 µF ceramic capacitor between each PVCC and PGND and also between AVCC and
AGND is enough, but they must be located very close to the TS2012 in order to avoid any extra parasitic inductance created by a long track wire. Parasitic loop inductance, in relation to di/dt, introduces overvoltage that decreases the global efficiency of the device and may also cause a TS2012 breakdown if the parasitic inductance is too high.
In addition, even if a ceramic capacitor has an adequate high frequency ESR value, its current capability is also important. A 0603 size is a good compromise, particularly when a
4 Ω load is used.
22/29 DocID14236 Rev 2
TS2012 Application information
Another important parameter is the rated voltage of the capacitor. A 1 µF/6.3 V capacitor used at 5 V, loses about 50 % of its value. With a power supply voltage of 5 V, the decoupling value, instead of 1 µF, could be reduced to 0.5 µF. As C
S
has particular influence on the THD+N in the medium to high frequency region, this capacitor variation becomes decisive. In addition, less decoupling means higher overshoots which can be problematic if they reach the power supply AMR value (6 V).
4.6 Wakeup (t
wu
)
When standby is released to set the device ON, there is typically a delay of 1 ms. The
TS2012 has an internal digital delay that mutes the outputs and releases them after this delay time to avoid any pop noise.
Note:
The gain increases smoothly (see Figure 44 ) from the mute to the gain selected by the G1
).
Note:
4.8
When the standby command is set, the time required to set the output stage to high impedance and to put the internal circuitry in shutdown mode, is typically 1 ms. This time is used to decrease the gain and avoid any pop noise during shutdown.
The gain decreases smoothly until the outputs are muted (see
).
Consumption in shutdown mode
Between the shutdown pin and GND there is an internal 300 k Ω (±20 %) resistor. This resistor forces the TS2012 to be in shutdown when the shutdown input is left floating.
However, this resistor also introduces additional shutdown power consumption if the shutdown pin voltage is not 0 V.
For example, with a 0.4 V shutdown voltage pin, the following typical and maximum values respectively for each shutdown pin must be added to the standby current specified in
: 0.4 V/300 k Ω = 1.3 µA and 0.4 V/240 kΩ = 1.66 µA. This current is provided by the external control device for standby pins.
DocID14236 Rev 2 23/29
29
Application information
4.9 Single-ended input configuration
TS2012
It is possible to use the TS2012 in a single-ended input configuration. However, input
coupling capacitors are mandatory in this configuration. The schematic diagram in Figure 45
shows a typical single-ended input application.
Left Input
Right Input
Figure 45. Typical application for single-ended input configuration
Cs
100nF
VCC
CsL
VCC VCC
CsR
Cin
Cin
Cin
Cin
Gain Select
Control
LIN +
LIN -
G0
G1
RIN +
RIN -
Gain
Select
Gain
Select
STBY L
Standby
STBY R
Control
PWM
Oscillator
PWM
TS2012
H
Bridge
LOUT+
LOUT-
H
Bridge
ROUT+
ROUT-
Left speaker
Right speaker
Standby Control
4.10 Output filter considerations
The TS2012 is designed to operate without an output filter. However, due to very sharp transients on the TS2012 output, EMI radiated emissions may cause some standard compliance issues.
These EMI standard compliance issues can appear if the distance between the TS2012 outputs and the loudspeaker terminal are long (typically more than 50 mm or 100 mm, in both directions, to the speaker terminals). As the PCB layout and internal equipment device are different for each configuration, it is difficult to provide a one-size-fits-all solution.
However, to decrease the probability of EMI issues, the following simple rules should be followed:
• Reduce as much as possible the distance between the TS2012 output pins and the speaker terminals.
• Use a ground plane for “shielding” sensitive wires.
• Place, as close as possible to the TS2012 and in series with each output, a ferrite bead with a minimum rated current of 2.5 A and an impedance greater than 50 Ω at frequencies above 30 MHz. If, after testing, these ferrite beads are not necessary, replace them by a short-circuit.
• Allow extra footprint to place, if necessary, a capacitor to short perturbations to ground
).
24/29 DocID14236 Rev 2
TS2012
Figure 46. Ferrite chip bead placement
Application information
From output
Ferrite chip bead to speaker about 100pF gnd
If the distance between the TS2012 output and the speaker terminals is too long, it is possible to have low frequency EMI issues due to the fact that the typical operating frequency is 280 kHz. In this configuration, it is necessary to place the output filter shown in
Figure 1: Typical application schematics as close as possible to the TS2012.
DocID14236 Rev 2 25/29
29
Package information TS2012
5.1
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
QFN20 package information
The QFN20 package has an exposed pad E2 x D2. For enhanced thermal performance, the exposed pad must be soldered to a copper area on the PCB, acting as a heatsink. This copper area can be electrically connected to pin 4, 12, 18 (PGND, AGND) or left floating.
Figure 47. QFN20 package mechanical drawing
26/29 DocID14236 Rev 2
TS2012
Ref
A3 b
D
D2
A
A1
A2
E
E2 e
L ddd
Package information
Min
0.8
0.18
3.85
3.85
0.45
0.3
Table 10. QFN20 package mechanical data
Dimensions in mm Dimensions in inches
Typ
0.9
0.02
0.65
0.25
0.23
4
2.6
4
2.6
0.5
0.4
Max
1
0.05
1
0.3
4.15
4.15
0.55
0.5
0.08
Min
0.031
0.007
0.152
0.152
0.018
0.012
Typ
0.035
0.001
0.026
0.010
0.009
0.157
0.102
0.157
0.102
0.020
0.016
Max
0.039
0.002
0.039
0.012
0.163
0.163
0.022
0.020
0.003
Figure 48. QFN20 footprint recommendation
Ref.
F
G
D
E
A
B
C
Table 11. QFN20 footprint data
Dimensions in mm Dimensions in inches
4.55
0.50
0.35
0.65
2.45
0.40
0.179
0.020
0.014
0.026
0.096
0.016
DocID14236 Rev 2 27/29
29
Ordering information TS2012
Part number
TS2012IQT
Table 12. Order code
Temperature range Package
-40 °C to +85 °C QFN20
Packaging
Tape and reel
Marking
K012
Date
17-Dec-2007
17-Jul-2013
Revision
Table 13. Document revision history
Changes
1
2
First release.
Small text changes throughout document.
Table 10: QFN20 package mechanical data
: added package mechanical dimensions in inches.
Added
Table 11: QFN20 footprint data
; updated “Marking”
28/29 DocID14236 Rev 2
TS2012
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