STMicroelectronics TS2012EI Datasheet
Reklaam
Reklaam
TS2012EI
Filter-free Flip Chip stereo 2 x 2.5 W class D
audio power amplifier
Datasheet
-
production data
Applications
Cellular phones
PDA
Description
The TS2012EI is a fully-differential stereo class D power amplifier able to drive up to 1.15 W into an
8
load at 5 V per channel. It achieves better efficiency compared to typical class AB audio amps.
The device has four different gain settings utilizing two digital pins: G0 and G1.
Flip Chip 16
Pop and click reduction circuitry provides low on/off switch noise while allowing the device to start within 8 ms.
Pin connection (top view)
Two standby pins (active low) allow each channel to be switched off separately.
Features
Operates from V
CC
= 2.5 to 5.5 V
Dedicated standby mode active low for each channel
Output power per channel: 1.15 W at 5 V or
0.63 W at 3.6 V into 8
with 1% THD+N max.
Output power per channel: 1.85 W at 5 V into
4
with 1% THD+N max.
The TS2012EI is available in a Flip Chip 16 bump lead-free package.
Output short-circuit protection
Four gain setting steps: 6, 12, 18, 24 dB
Low current consumption
PSSR: 63 dB typ. at 217 Hz.
Fast startup phase: 7.8 ms
Thermal shutdown protection
Flip Chip 16 bump lead-free package
Table 1. Device summary
Order code Temperature range Package Packing Marking
TS2012EIJT - 40 °C to +85 °C Flip Chip 16 Tape and reel K0
April 2014
This is information on a product in full production.
DocID026152 Rev 1 1/32 www.st.com
Contents
Contents
TS2012EI
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Common mode feedback loop limitations . . . . . . . . . . . . . . . . . . . . . . . . 21
Low frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
) and shutdown time (t
STBY
) . . . . . . . . . . . . . . . . . . . . 23
Consumption in shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/32 DocID026152 Rev 1
TS2012EI
1
Absolute maximum ratings and operating conditions
Absolute maximum ratings and operating conditions
Symbol
V
CC
V in
T oper
T stg
T j
R thja
P d
ESD
Table 2. Absolute maximum ratings
Parameter
Supply voltage
(1)
Input voltage
(2)
Operating free air temperature range
Storage temperature
Maximum junction temperature
Thermal resistance junction to ambient
(3)
Power dissipation
HBM: human body model
(5)
MM: machine model
(6)
Value
6
GND to V
CC
-40 to + 85
-65 to +150
150
200
Internally limited
2
200
(4)
Unit
V
V
°C
°C
°C
°C/W kV
V
Latch-up Latch-up immunity
V
STBY
Standby pin maximum voltage
Lead temperature (soldering, 10sec)
Output short-circuit protection
(7)
200
GND to V
CC
260 mA
V
°C
1.
All voltage values are measured with respect to the ground pin.
2.
The magnitude of the input signal must never exceed V
CC
+ 0.3 V / GND - 0.3 V.
3.
The device is protected in case of over temperature by a thermal shutdown active at 150°C.
4.
Exceeding the power derating curves during a long period will cause abnormal operation.
5.
Human body model: 100 pF discharged through a 1.5 k
resistor between two pins of the device, done for all couples of pin combinations with other pins floating.
6.
Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5
), done for all couples of pin combinations with other pins floating.
7.
Implemented short-circuit protection protects the amplifier against damage by short-circuit between positive and negative outputs of each channel and between outputs and ground.
DocID026152 Rev 1 3/32
32
Absolute maximum ratings and operating conditions TS2012EI
Symbol
Table 3. Operating conditions
Parameter Value Unit
V
CC
Supply voltage 2.5 to 5.5
V
V in
Input voltage range GND to V
CC
V
V ic
Input common mode voltage
(1)
GND+0.5V to V
CC
-0.9V
V
V
STBY
Standby voltage input
(2)
Device ON
Device in STANDBY
(3)
1.4
V
STBY
GND
V
STBY
V
CC
0.4
4
V
R
L
Load resistor
V
IH
V
IL
GO, G1 - high level input voltage
GO, G1 - low level input voltage
(4)
1.4
V
IH
V
CC
GND
V
IL
0.4
V
V
R thja
Thermal resistance junction to ambient
(5)
90 °C/W
1.
I V oo
I
40 mV max with all differential gains except 24 dB. For 24 dB gain, input decoupling capacitors are mandatory.
2.
Without any signal on standby pin, the device is in standby (internal 300 k
+/-20% pull-down resistor).
3.
Minimum current consumption is obtained when V
STBY
= GND.
4.
Between G0, G1pins and
GND
, there is an internal 300 k
(+/-20%) pull-down resistor. When pins are floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors are disconnected
(HiZ input).
5.
With a 4-layer PCB.
4/32 DocID026152 Rev 1
TS2012EI Typical application
Figure 1. Typical application schematics
Cs2
0.1uF
Gain Select
Control
Differential
Left Input
Left IN+
Input capacitors are optional
Cin
Cin
Left IN-
Differential
Right Input
Right IN+
Right IN-
Cin
Cin
TS2012
AVCC
A1 Lin+
B1 Lin-
Gain
Select
PWM
C2 G0
B2 G1
D1 Rin+
C1 Rin-
Gain
Select
Oscillator
PWM
B4
B3
STBYL
STBYR
Standby
Control
AGND
Protection
Circuit
VCC
Cs1
1uF
PVCC
Lout+ A3
H
Bridge
LoutA4
Rout+ D3
H
Bridge
RoutD4
PGND
Left speaker
Right speaker
Standby Control
Cs2
0.1uF
Gain Select
Control
Differential
Left Input
Left IN+
Input capacitors are optional
Cin
Cin
Left IN-
Differential
Right Input
Right IN+
Right IN-
Cin
Cin
TS2012
AVCC
A1 Lin+
B1 Lin-
Gain
Select
PWM
C2 G0
B2 G1
D1 Rin+
C1 Rin-
Gain
Select
Oscillator
PWM
B4
B3
STBYL
STBYR
Standby
Control
AGND
Protection
Circuit
VCC
Cs1
1uF
PVCC
Lout+ A3
H
Bridge
LoutA4
LC Output Filter
Rout+ D3
H
Bridge
RoutD4
LC Output Filter
PGND
Standby Control
Load
Load
DocID026152 Rev 1 5/32
32
Typical application TS2012EI
Components
C
S1
, C
S2
C in
Table 4. External component description
Functional description
Supply capacitor that provides power supply filtering.
Input coupling capacitors (optional) that block the DC voltage at the amplifier input terminal. The capacitors also form a high pass filter with Z in
(F cl
= 1 / (2 x
x Z in
x C in
)). Be aware that value of Z in is changing with gain setting.
Pin number
B4
C1
C2
C3
C4
D1
D2
D3
D4
A1
A2
A3
A4
B1
B2
B3
Pin name
Lin+
PVCC
Lout+
Lout-
Lin-
G1
STBYR
STBYL
Rin-
G0
AGND
PGND
Rin+
AVCC
Rout+
Rout-
Table 5. Pin description
Description
Left channel positive differential input
Power supply voltage
Left channel positive output
Left channel negative output
Left channel negative differential input
Gain select pin (MSB)
Standby pin (active low) for right channel output
Standby pin (active low) for left channel output
Right channel negative differential input
Gain select pin (LSB)
Analog ground
Power ground
Right channel positive differential input
Analog supply voltage
Right channel positive output
Right channel negative output
6/32 DocID026152 Rev 1
TS2012EI Electrical characteristics
3.1 Electrical characteristics tables
Table 6. V
CC
= +5 V, GND = 0 V, V ic
= 2.5 V, T amb
= 25° C (unless otherwise specified)
Symbol Parameters and test conditions Min.
Typ.
Max.
Unit
I
CC
I
STBY
V oo
P o
THD + N
Efficiency
PSRR
Crosstalk
CMRR
Gain
Z in
F
PWM
Supply current
No input signal, no load, both channels
Standby current
No input signal, V
STBY
= GND
Output offset voltage
Floating inputs, G = 6 dB, R
L
= 8
Output power
THD + N = 1% max, f = 1 kHz, R
L
THD + N = 1% max, f = 1 kHz, R
L
= 4
= 8
THD + N = 10% max, f = 1 kHz, R
L
THD + N = 10% max, f = 1 kHz, R
L
= 4
= 8
Total harmonic distortion + noise
P o
= 0.8 W, G = 6 dB, f =1 kHz, R
L
= 8
Efficiency per channel
P o
= 1.85 W, R
L
P o
= 1.16 W, R
L
= 4
+ 15 µH
= 8
+ 15 µH
Power supply rejection ratio with inputs grounded
C in
= 1 µF
(1)
,f = 217 Hz, R
L
= 8
Gain = 6 dB
V ripple
= 200 mV pp
Channel separation
P o
= 0.9 W, G = 6 dB, f =1 kHz, R
L
= 8
Common mode rejection ratio
C in
= 1 µF, f = 217 Hz, R
VICM
= 200 mV pp
L
= 8
Gain = 6 dB
Gain value with no load
G1 = G0 = V
IL
G1 = V
IL
and G0 = V
IH
G1 = V
IH
and G0 = V
IL
G1 = G0 = V
IH
Single-ended input impedance
Referred to ground
Gain = 6 dB
Gain = 12 dB
Gain = 18 dB
Gain = 24 dB
Pulse width modulator base frequency
5.5
11.5
17.5
23.5
24
24
12
6
190
5
1
1.85
1.15
2.5
1.6
0.5
78
88
65
90
63
30
30
15
7.5
280
6
12
18
24
7
2
25
6.5
12.5
18.5
24.5
36
36
18
9
370 mA
µA mV
W
%
% dB dB dB dB k
kHz
DocID026152 Rev 1 7/32
32
Electrical characteristics TS2012EI
Table 6. V
CC
= +5 V, GND = 0 V, V ic
= 2.5 V, T amb
= 25° C (unless otherwise specified) (continued)
Symbol Parameters and test conditions Min.
Typ.
Max.
Unit
SNR t
WU t
STBY
Signal to noise ratio (A-weighting)
P o
= 1.1 W, G = 6 dB, R
L
= 8
Total wake-up time
(2)
Standby time
(2)
9
11
99
13
15.8
16.5
20 dB ms ms
V
N
Output voltage noise f = 20 Hz to 20 kHz, R
L
= 8
Unweighted (filterless, G = 6 dB)
A-weighted (filterless, G = 6 dB)
Unweighted (with LC output filter, G = 6 dB
A-weighted (with LC output filter, G = 6 dB
Unweighted (filterless, G = 24 dB)
A-weighted (filterless, G = 24 dB)
Unweighted (with LC output filter, G = 24 dB
A-weighted (with LC output filter, G = 24 dB
87
52
87
53
61
31
59
31 µV
1.
Dynamic measurements - 20*log(rms(V out
)/rms(V ripple
)). V ripple
is the superimposed sinus signal to V
CC
at f = 217 Hz.
2.
See
RMS
8/32 DocID026152 Rev 1
TS2012EI Electrical characteristics
Table 7. V
CC
= +3.6 V, GND = 0 V, V ic
= 1.8V , T amb
= 25° C (unless otherwise specified)
Symbol Parameter Min.
Typ.
Max.
Unit
I
CC
I
STBY
V oo
P o
THD + N
Efficiency
PSRR
Crosstalk
CMRR
Gain
Z in
F
PWM
SNR t
WU
Supply current
No input signal, no load, both channels
Standby current
No input signal, V
STBY
= GND
Output offset voltage
Floating inputs, G = 6 dB, R
L
= 8
Output power
THD + N = 1% max, f = 1 kHz, R
L
THD + N = 1% max, f = 1 kHz, R
L
= 4
= 8
THD + N = 10% max, f = 1 kHz, R
L
THD + N = 10% max, f = 1 kHz, R
L
= 4
= 8
Total harmonic distortion + noise
P o
= 0.45 W, G = 6 dB, f = 1 kHz, R
L
= 8
Efficiency per channel
P o
= 0.96 W, R
L
P o
= 0.63 W, R
L
= 4
= 8
Power supply rejection ratio with inputs grounded
C in
= 1 µF
(1)
,f = 217 Hz, R
L
= 8
Gain = 6 dB
V ripple
= 200 mV pp
Channel separation
G = 6 dB, f = 1 kHz, R
L
= 8
Common mode rejection ratio
C in
= 1 µF, f = 217 Hz, R
VICM
= 200 mV pp
L
= 8
Gain = 6 dB
Gain value with no load
G1 = G0 = V
IL
G1 = V
IL
and G0 = V
IH
G1 = V
IH
and G0 = V
IL
G1 = G0 = V
IH
Single-ended input impedance
Referred to ground
Gain = 6 dB
Gain = 12 dB
Gain = 18 dB
Gain = 24 dB
Pulse width modulator base frequency
Signal-to-noise ratio (A-weighting)
P o
= 0.6 W, G = 6 dB, R
L
= 8
Total wake-up time
(2)
5.5
11.5
17.5
23.5
24
24
12
6
190
7.5
3.5
0.7
0.96
0.63
1.3
0.8
0.35
78
88
65
90
62
30
30
15
7.5
280
6
12
18
24
96
11.3
5.5
2
25
6.5
12.5
18.5
24.5
36
36
18
9
370
15 mA
µA mV
W
%
% dB dB dB k
kHz dB ms
DocID026152 Rev 1 9/32
32
Electrical characteristics TS2012EI
Table 7. V
CC
= +3.6 V, GND = 0 V, V ic
= 1.8V , T amb
= 25° C (unless otherwise specified) (continued)
Symbol Parameter Min.
Typ.
Max.
Unit t
STBY
V
N
Standby time
(2)
Output voltage noise f = 20 Hz to 20 kHz, R
L
= 8
Unweighted (filterless, G = 6 dB)
A-weighted (filterless, G = 6 dB)
Unweighted (with LC output filter, G = 6 dB
A-weighted (with LC output filter, G = 6 dB
Unweighted (filterless, G = 24 dB)
A-weighted (filterless, G = 24 dB)
Unweighted (with LC output filter, G = 24 dB
A-weighted (with LC output filter, G = 24 dB
10 13.8
54
28
52
27
80
50
79
49
18 ms
µV
RMS
1.
Dynamic measurements - 20*log(rms(V out
)/rms(V ripple
)). V ripple
is the superimposed sinus signal to V
CC
at f = 217 Hz.
2.
See
10/32 DocID026152 Rev 1
TS2012EI Electrical characteristics
Table 8. V
CC
= +2.5 V, GND = 0 V, V ic
= 1.25 V, T amb
= 25 °C (unless otherwise specified)
Symbol Parameter Min.
Typ.
Max.
Unit
I
CC
I
STBY
V oo
P o
THD + N
Efficiency
PSRR
Crosstalk
CMRR
Gain
Z in
F
PWM
SNR t
WU
Supply current
No input signal, no load, both channels
Standby current
No input signal, V
STBY
= GND
Output offset voltage
Floating inputs, G = 6 dB, R
L
= 8
Output power
THD + N = 1% max, f = 1 kHz, R
L
THD + N = 1% max, f = 1 kHz, R
L
= 4
= 8
THD + N = 10% max, f = 1 kHz, R
L
THD + N = 10% max, f = 1 kHz, R
L
= 4
= 8
Total harmonic distortion + noise
P o
= 0.2 W, G = 6 dB, f = 1 kHz, R
L
= 8
Efficiency per channel
P o
= 0.45 W, R
L
P o
= 0.3 W, R
L
= 4
+ 15 µH
= 8
+ 15 µH
Power supply rejection ratio with inputs grounded
C in
= 1 µF
(1)
,f = 217 Hz, R
L
= 8
Gain = 6 dB
V ripple
= 200 mV pp
Channel separation
G = 6 dB, f = 1 kHz, R
L
= 8
Common mode rejection ratio
C in
= 1 µF, f = 217 Hz, R
VICM
= 200 mV pp
L
= 8
Gain = 6 dB
Gain value with no load
G1 = G0 = V
IL
G1 = V
IL
and G0 = V
IH
G1 = V
IH
and G0 = V
IL
G1 = G0 = V
IH
Single-ended input impedance
Referred to ground
Gain = 6 dB
Gain = 12 dB
Gain = 18 dB
Gain = 24 dB
Pulse width modulator base frequency
Signal-to-noise ratio (A-weighting)
P o
= 0.28 W, G = 6 dB, R
L
= 8
Total wake-up time
(2)
5.5
11.5
17.5
23.5
24
24
12
6
190
3
2.8
0.45
0.45
0.3
0.6
0.38
0.2
78
87
65
90
62
30
30
15
7.5
280
6
12
18
24
93
7.8
4
2
25
6.5
12.5
18.5
24.5
36
36
18
9
370
12 mA
µA mV
W
%
% dB dB dB k
kHz dB ms
DocID026152 Rev 1 11/32
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Electrical characteristics TS2012EI
Table 8. V
CC
= +2.5 V, GND = 0 V, V ic
= 1.25 V, T amb
= 25 °C (unless otherwise specified) (continued)
Symbol Parameter Min.
Typ.
Max.
Unit t
STBY
V
N
Standby time
(2)
Output voltage noise f = 20 Hz to 20 kHz, R
L
= 8
Unweighted (filterless, G = 6 dB)
A-weighted (filterless, G = 6 dB)
Unweighted (with LC output filter, G = 6 dB
A-weighted (with LC output filter, G = 6 dB
Unweighted (filterless, G = 24 dB)
A-weighted (filterless, G = 24 dB)
Unweighted (with LC output filter, G = 24 dB
A-weighted (with LC output filter, G = 24 dB
8 12
51
26
49
26
77
49
76
48
16 ms
µV
RMS
1.
Dynamic measurements - 20*log(rms(V out
)/rms(V ripple
)). V ripple
is the superimposed sinus signal to V
CC
at f = 217 Hz.
2.
See
12/32 DocID026152 Rev 1
TS2012EI
3.2
Electrical characteristics
Electrical characteristic curves
The graphs shown in this section use the following abbreviations.
R
L
+ 15 µH or 30 µH = pure resistor + very low series resistance inductor.
Filter = LC output filter (1 µF+ 30 µH for 4
and 0.5 µF+15 µH for 8
).
All measurements are done with C
S1
=1 µF and C
S2
=100 nF (
), except for the
PSRR where C
S1 is removed (
).
Figure 2. Test diagram for measurements
VCC
Cs1
1 F
Cs2
100nF
Cin
Cin
GND
In+
Out+
1/2 TS2012
In-
Out-
GND or
LC Filter
GND
Audio Measurement
Bandwith < 30kHz
RL
4 or 8
5th order
50kHz low-pass filter
DocID026152 Rev 1 13/32
32
Electrical characteristics
Figure 3. Test diagram for PSRR measurements
VCC
Cs2
100nF
20Hz to 20kHz
Vripple
Vcc
Cin
Cin
1 F
GND
5th order
50kHz low-pass filter
GND
In+
Out+
1/2 TS2012
In-
Out-
GND reference
GND or
LC Filter
RMS Selective Measurement
Bandwith =1% of Fmeas
RL
4 or 8
5th order
50kHz low-pass filter
TS2012EI
14/32 DocID026152 Rev 1
TS2012EI
2
1
0
0
Figure 4. Current consumption vs. power supply voltage
6
No load
Tamb = 25 C
5
Both channels active
4
One channel active
3
1 2 3 4
Power Supply Voltage (V)
5
Figure 6. Efficiency vs. output power
(one channel)
80
60
40
100
20
0
0.0
Efficiency
Power dissipation
0.4
0.8
1.2
1.6
Output Power (W)
1.0
Vcc = 5V
RL = 4 + 16 H
F = 1kHz
THD+N 10%
2.0
2.4
0.3
0.2
0.1
0.0
0.9
0.8
0.7
0.6
0.5
0.4
Electrical characteristics
Figure 5. Current consumption vs. standby voltage (one channel)
3
Vcc=5V
2
1
0
0 1
Vcc=3.6V
One channel active
Vcc=2.5V
2 3
Standby Voltage (V)
No load
Tamb = 25 C
4 5
Figure 7. Efficiency vs. output power
(one channel)
100
80
60
40
20
0
0.0
Efficiency
Power dissipation
0.2
0.4
0.6
0.8
Output Power (W)
0.50
0.15
Vcc = 3.6V
RL = 4 + 16 H
F = 1kHz
THD+N 10%
1.0
1.2
0.10
0.05
0.00
1.4
0.45
0.40
0.35
0.30
0.25
0.20
Figure 8. Efficiency vs. output power
(one channel)
100
80
60
40
20
0
0.0
Efficiency
0.24
0.22
0.20
0.18
0.16
0.14
Power dissipation
0.1
0.12
0.10
0.2
0.3
Output Power (W)
0.4
0.08
Vcc = 2.5V
RL = 4 + 16 H
F = 1kHz
THD+N 10%
0.5
0.06
0.04
0.02
0.6
0.00
Figure 9. Efficiency vs. output power
(one channel)
100
80
60
40
20
0
0.0
0.2
Efficiency
Power dissipation
0.4
0.6
0.8
1.0
Output Power (W)
0.10
Vcc = 5V
RL = 8 + 16 H
F = 1kHz
THD+N 10%
1.2
1.4
0.08
0.06
0.04
0.02
0.00
1.6
0.30
0.28
0.26
0.24
0.22
0.20
0.18
0.16
0.14
0.12
DocID026152 Rev 1 15/32
32
Electrical characteristics
Figure 10. Efficiency vs. output power
(one channel)
100 0.15
80
Efficiency
0.10
60
Power dissipation
40
20
0
0.0
0.05
0.1
0.2
0.3
Output Power (W)
Vcc = 3.6V
RL = 8 + 16 H
0.4
0.5
0.6
F = 1kHz
THD+N 10%
0.7
0.8
0.9
0.00
TS2012EI
Figure 11. Efficiency vs. output power
(one channel)
100 0.08
80
0.06
Efficiency
60
Power dissipation
0.04
40
20
Vcc = 2.5V
RL = 8 + 16 H
0.02
F = 1kHz
THD+N 10%
0 0.00
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
Output Power (W)
Figure 12. PSRR vs. frequency
-30
-40
-50
-60
-70
-80
-90
-100
0
-10
-20
Vcc = 5V
Vripple = 200mVpp
Cin = 10 F
RL = 8 + 16 H
Tamb = 25
C
G=+6dB
100
G=+24dB
G=+18dB
G=+12dB
1000
Frequency (Hz)
10000
Figure 14. PSRR vs. frequency
-30
-40
-50
-60
-70
-80
-90
-100
0
-10
-20
Vcc = 2.5V
Vripple = 200mVpp
Cin = 10 F
RL = 8 + 16 H
Tamb = 25 C
G=+6dB
G=+24dB
100
G=+18dB
G=+12dB
1000
Frequency (Hz)
10000
Figure 13. PSRR vs. frequency
-30
-40
-50
-60
-70
-80
-90
-100
0
-10
-20
Vcc = 3.6V
Vripple = 200mVpp
Cin = 10 F
RL = 8 + 16 H
Tamb = 25 C
G=+24dB
G=+6dB
100
G=+18dB
G=+12dB
1000
Frequency (Hz)
10000
Figure 15. PSRR vs. common mode input voltage
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
Vcc = 5V
Vripple = 200mVpp
F = 217Hz
RL = 8 + 16 H
Tamb = 25
C
1
G=+12dB
2
G=+24dB
G=+18dB
3
G=+6dB
Common Mode Input Voltage (V)
4 5
16/32 DocID026152 Rev 1
TS2012EI
Figure 16. PSRR vs. common mode input voltage
-20
-30
-40
-50
-60
-70
0
-10
Vcc = 3.6V
Vripple = 200mVpp
F = 217Hz
RL = 8 + 16 H
Tamb = 25°C
-80
-90
-100
0.0
0.5
1.0
G=+12dB
1.5
G=+24dB
G=+18dB
2.0
G=+6dB
2.5
Common Mode Input Voltage (V)
3.0
3.5
Figure 18. CMRR vs. frequency
-30
-40
-50
-60
-70
-80
-90
-100
0
-10
-20
Vcc = 5V
Vripple = 200mVpp
Cin = 10 F
RL = 8 + 15 H
Tamb = 25 C
G=+18dB
G=+6dB
100
G=+24dB
G=+12dB
1000
Frequency (Hz)
10000
Figure 20. CMRR vs. frequency
-30
-40
-50
-60
-70
-80
-90
-100
0
-10
-20
Vcc = 2.5V
Vripple = 200mVpp
Cin = 10 F
RL = 8 + 15 H
Tamb = 25 C
G=+18dB
G=+6dB
100
G=+24dB
G=+12dB
1000
Frequency (Hz)
10000
Electrical characteristics
Figure 17. PSRR vs. common mode input voltage
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0.0
Vcc = 2.5V
Vripple = 200mVpp
F = 217Hz
RL = 8 + 16 H
Tamb = 25 C
0.5
G=+12dB
1.0
G=+24dB
G=+18dB
G=+6dB
1.5
2.0
Common Mode Input Voltage (V)
2.5
Figure 19. CMRR vs. frequency
-30
-40
-50
-60
-70
-80
-90
-100
0
-10
-20
Vcc = 3.6V
Vripple = 200mVpp
Cin = 10 F
RL = 8 + 15 H
Tamb = 25 C
G=+18dB
G=+6dB
100
G=+24dB
G=+12dB
1000
Frequency (Hz)
10000
Figure 21. CMRR vs. common mode input voltage
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
Vripple = 200mVpp
F = 217Hz, G = +6dB
RL 8 + 15 H
Tamb = 25 C
Vcc=3.6V
Vcc=2.5V
Vcc=5V
1 2 3
Common Mode Input Voltage (V)
4 5
DocID026152 Rev 1 17/32
32
Electrical characteristics
Figure 22. CMRR vs. common mode input voltage
-40
-50
-60
-70
-80
-90
0
-10
-20
-30
-100
0
Vripple = 200mVpp
F = 217Hz, G = +12dB
RL 8 + 15 H
Tamb = 25 C
Vcc=2.5V
Vcc=3.6V
Vcc=5V
1 2 3
Common Mode Input Voltage (V)
4 5
Figure 24. CMRR vs. common mode input voltage
0
-10
-20
-30
-40
-50
Vripple = 200mVpp
F = 217Hz, G = +24dB
RL 8 + 15 H
Tamb = 25
C
Vcc=3.6V
Vcc=2.5V
-60
-70
-80
0
Vcc=5V
1 2 3
Common Mode Input Voltage (V)
4 5
Figure 26. THD+N vs. output power
10
1
F = 1kHz
RL = 8 + 15 H
G = +6dB
BW < 30kHz
Tamb = 25 C
Vcc=5V
Vcc=3.6V
Figure 23. CMRR vs. common mode input voltage
-40
-50
-60
-70
-80
-90
0
-10
-20
-30
-100
0
Vripple = 200mVpp
F = 217Hz, G = +18dB
RL 8 + 15 H
Tamb = 25 C
Vcc=2.5V
Vcc=3.6V
Vcc=5V
1 2 3
Common Mode Input Voltage (V)
4 5
Figure 25. THD+N vs. output power
10
1
F = 1kHz
RL = 4 + 15 H
G = +6dB
BW < 30kHz
Tamb = 25 C
Vcc=5V
Vcc=3.6V
0.1
TS2012EI
Vcc=2.5V
0.01
0.01
0.1
Output power (W)
1
Figure 27. THD+N vs. frequency
10
RL = 4 + 15 H
G = +6dB
BW < 30kHz
Tamb = 25 C
1
Vcc=5V, Po=1300mW
0.1
0.01
0.01
Vcc=2.5V
0.1
Output power (W)
1
0.1
0.01
Vcc=3.6V, Po=700mW
Vcc=2.5V, Po=300mW
100 1000
Frequency (Hz)
10000
18/32 DocID026152 Rev 1
TS2012EI
10
RL = 8 + 15 H
G = +6dB
BW < 30kHz
Tamb = 25 C
1
0.1
Figure 28. THD+N vs. frequency
Vcc=5V, Po=800mW
Vcc=3.6V, Po=450mW
Vcc=2.5V, Po=200mW
0.01
100 1000
Frequency (Hz)
Figure 30. Crosstalk vs. frequency
10000
-90
-100
-110
-120
-50
-60
-70
-80
0
-10
-20
-30
-40
RL = 8 + 15 H
Cin = 1
F
G = +6dB
Tamb = 25 C
Vcc=5V
100
Vcc=2.5V
Vcc=3.6V
1000
Frequency (Hz)
10000
Figure 32. Output power vs. power supply voltage
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
2.5
F = 1kHz
BW < 30kHz
Tamb = 25 C
RL=4
3.0
+15
3.5
H
Vcc (V)
4.0
RL=8 +15 H
4.5
5.0
Electrical characteristics
Figure 29. Crosstalk vs. frequency
-90
-100
-110
-120
-50
-60
-70
-80
0
-10
-20
-30
-40
RL = 4 + 15 H
Cin = 1 F
G = +6dB
Tamb = 25 C
Vcc=5V
100
Vcc=2.5V
Vcc=3.6V
1000
Frequency (Hz)
10000
Figure 31. Output power vs. power supply voltage
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
2.5
F = 1kHz
BW < 30kHz
Tamb = 25 C
RL=4
3.0
+15 H
3.5
4.0
RL=8
Supply voltage (V)
+15
4.5
H
5.0
Figure 33. Power derating curves
1.6
1.4
1.2
1.0
0.8
0.6
With a 4-layer PCB
0.4
0.2
0.0
0
No Heat sink
AMR value
25 50 75 100
Ambiant Temperature ( C)
125 150
DocID026152 Rev 1 19/32
32
Electrical characteristics TS2012EI
Figure 34. Startup and shutdown phase
V
CC
= 5 V, G = 6 dB, C in
= 1 µF, inputs grounded
Figure 35. Startup and shutdown phase
V
CC
= 5 V, G = 6 dB, C in
= 1 µF, V
F = 500 Hz in
= 2 V pp
,
Out+
Out-
Standby
Out+
Out-
Standby
Out+ - Out-
Out+ - Out-
20/32 DocID026152 Rev 1
TS2012EI Application information
4.1 Differential configuration principle
The TS2012EI is a monolithic fully-differential input/output class D power amplifier. The
TS2012EI also includes a common-mode feedback loop that controls the output bias value to average it at V
CC
/2 for any DC common mode input voltage. This allows the device to always have a maximum output voltage swing, and by consequence, maximize the output power. Moreover, as the load is connected differentially compared with a single-ended topology, the output is four times higher for the same power supply voltage.
The advantages of a full-differential amplifier are:
high PSRR (power supply rejection ratio),
high common mode noise rejection,
virtually zero pop without additional circuitry, giving a faster start-up time compared to conventional single-ended input amplifiers,
easier interfacing with differential output audio DACs,
no input coupling capacitors required thanks to the common mode feedback loop.
Note:
4.3
In the flat region of the frequency-response curve (no input coupling capacitor or internal feedback loop + load effect), the differential gain can be set to 6, 12 18, or 24 dB, depending on the logic level of the G0 and G1 pins, as shown in
G1
1
1
0
0
Table 9. Gain settings with G0 and G1 pins
G0 Gain (dB)
0
1
0
1
6
12
18
24
Gain (V/V)
2
4
8
16
Between pins G0, G1 and GND there is an internal 300 k
(+/-20%) resistor. When the pins are floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors are disconnected (HiZ input).
Common mode feedback loop limitations
As explained previously, the common mode feedback loop allows the output DC bias voltage to be averaged at V
CC
/2 for any DC common mode bias input voltage.
Due to the V ic
limitation of the input stage (see
Table 3: Operating conditions on page 4 ), the
common mode feedback loop can fulfill its role only within the defined range.
DocID026152 Rev 1 21/32
32
Application information TS2012EI
If a low frequency bandwidth limitation is required, it is possible to use input coupling capacitors. In the low-frequency region, the input coupling capacitor C in
starts to have an effect. C in
forms, with the input impedance Z in
, a first order high-pass filter with a -3 dB cutoff frequency (see
F
CL
= ------------------------------------
2
1
Z in
C in
So, for a desired cut-off frequency F
CL
, C in is calculated as follows.
C in
=
2
Z
1 in
F
CL with F
CL
in Hz, Z in
in
and C in
in F.
The input impedance Z in
is for the whole power supply voltage range and it changes with the gain setting. There is also a tolerance around the typical values (see
to
Figure 36. Cut-off frequency vs. input capacitor
Tamb=25 C
100
G=24dB
Zin=7.5k
typ.
10
G=18dB
Zin=15k
typ.
G=6dB, G=12dB
Zin=30k typ.
1
0.1
1
Input Capacitor Cin ( F)
22/32 DocID026152 Rev 1
TS2012EI
4.5
Application information
Decoupling of the circuit
Power supply capacitors, referred to as C
S1
and C
TS2012EI.
S2
, are needed to correctly bypass the
The TS2012EI has a typical switching frequency of 280 kHz and an output fall and rise time of approximately 5 ns. Due to these very fast transients, careful decoupling is mandatory.
A 1 µF ceramic capacitor (C
S1
) between PVCC and PGND and one additional ceramic capacitor 0.1 µF (C
S2
) are enough. A 1 µF capacitor must be located as close as possible to the device PVCC pin in order to avoid any extra parasitic inductance or resistance created by a long track wire. Parasitic loop inductance, in relation with di/dt, introduces overvoltage that decreases the global efficiency of the device and may cause, if this parasitic inductance is too high, a breakdown of the TS2012EI. For filtering low-frequency noise signals on the power line, you can use a C
S1 capacitor of 4.7 µF or more.
In addition, even if a ceramic capacitor has an adequate high frequency ESR (equivalent series resistance) value, its current capability is also important. A size of 0603 is a good compromise, particularly when a 4
load is used.
Another important parameter is the rated voltage of the capacitor. A 1 µF/6.3 V capacitor used at 5 V, loses about 50% of its value. With a power supply voltage of 5 V, the decoupling value, instead of 1 µF, could be reduced to 0.5 µF. As C
S
has particular influence on the
THD+N in the medium-to-high frequency region, this capacitor variation becomes decisive.
In addition, less decoupling means higher overshoots, which can be problematic if they reach the power supply AMR value (6 V).
4.6 Wake-up time (t
WU
) and shutdown time (t
STBY
)
During the wake-up sequence when the standby is released to set the device ON, there is a delay. The wake-up sequence of the TS2012EI consists of two phases. During the first phase t
WU-A
, a digitally-generated delay, mutes the outputs. Then, the gain increasing phase t
WU-A
begins. The gain increases smoothly from the mute state to the preset gain selected by the digital pins G0 and G1. This startup sequence avoids any pop noise during startup of the amplifier. Refer to
DocID026152 Rev 1 23/32
32
Application information TS2012EI
STBY
Level
HI
Figure 37. Wake-up phase
STBY
LO
STBY
Gain
Mute
Time
Mute t
WU-A
Gain increasing Preset gain
G = 24dB
G = 18dB
G = 12dB
G = 6dB t
WU-B t
WU
Time
When the standby command is set, the time required to set the output stage to high impedance and to put the internal circuitry in shutdown mode is called the standby time.
This time is used to decrease the gain from its nominal value set by the digital pins G0 and
G1 to mute and avoid any pop noise during shutdown. The gain decreases smoothly until the outputs are muted (
).
Figure 38. Shutdown phase
STBY
Level
HI
STBY
STBY
LO
Gain
Preset gain
G = 24dB
G = 18dB
G = 12dB
G = 6dB
Mute t
Gain decreasing
STBY
Mute
Time
Time
24/32 DocID026152 Rev 1
TS2012EI
4.7
Application information
Consumption in shutdown mode
Between the shutdown pin and GND there is an internal 300 k
(+-/20%) resistor. This resistor forces the TS2012EI to be in shutdown when the shutdown input is left floating.
However, this resistor also introduces additional shutdown power consumption if the shutdown pin voltage is not at 0 V.
With a 0.4 V shutdown voltage pin for example, you must add 0.4 V/300 k
= 1.3 µA typical
(0.4 V/240 k
= 1.66 µA maximum) for each shutdown pin to the standby current specified in
to Table 8 . Of course, this current will be provided by the external control device
for the standby pins.
4.8 Single-ended input configuration
It is possible to use the TS2012EI in a single-ended input configuration. However, input coupling capacitors are mandatory in this configuration.
Figure 39 shows a typical single-
ended input application.
Figure 39. Typical application for single-ended input configuration
VCC
Cs2
0.1uF
VCC
Cs1
1uF
Left Input
Right Input
Cin
Cin
Cin
Cin
Gain Select
Control
TS2012
A1 Lin+
B1 Lin-
Gain
Select
C2 G0
B2 G1
D1 Rin+
C1 Rin-
Gain
Select
AVCC
PWM
Oscillator
PWM
B4
B3
STBYL
STBYR
Standby
Control
AGND
Protection
Circuit
Standby Control
PVCC
Lout+ A3
H
Bridge
LoutA4
Rout+ D3
H
Bridge
RoutD4
PGND
Left speaker
Right speaker
DocID026152 Rev 1 25/32
32
Application information
4.9
TS2012EI
Output filter considerations
The TS2012EI is designed to operate without an output filter. However, due to very sharp transients on the TS2012EI output, EMI-radiated emissions may cause some standard compliance issues.
These EMI standard compliance issues can appear if the distance between the TS2012EI outputs and loudspeaker terminal are long (typically more than 50 mm, or 100 mm in both directions, to the speaker terminals). Because the PCB layout and internal equipment device are different for each configuration, it is difficult to provide a one-size-fits-all solution.
However, to decrease the probability of EMI issues, there are several simple rules to follow.
Reduce, as much as possible, the distance between the TS2012EI output pins and the speaker terminals.
Use a ground plane to "shield" sensitive wires.
Place, as close as possible to the TS2012EI and in series with each output, a ferrite bead with a rated current of at least 2.5 A and an impedance greater than 50
at frequencies above 30 MHz. If, after testing, these ferrite beads are not necessary, replace them by a short-circuit.
Allow extra footprint to place, if necessary, a capacitor to short perturbations to ground
(
).
Figure 40. Ferrite chip bead placement
Ferrite chip bead
From output to speaker about 100pF gnd
In the case where the distance between the TS2012EI output and the speaker terminals is too long, it is possible to have low frequency EMI issues due to the fact that the typical operating frequency is 280 kHz. In this configuration, it is necessary to use the output filter represented in
Figure 1 on page 5 as close as possible to the TS2012EI.
The TS2012EI includes output short-circuit protection. This protection prevents the device from being damaged in case of fault conditions on the amplifier outputs.
When a channel is in operating mode and a short-circuit occurs between two outputs of the channel or between an output and ground, the short-circuit protection detects this situation and puts the appropriate channel into standby. To put the channel back into operating mode, it is necessary to put the channel’s standby pin to logical LO, and then back again to logical
HI and wake up the channel.
26/32 DocID026152 Rev 1
TS2012EI Application information
The TS2012EI device has an internal thermal shutdown protection in the event of extreme temperatures to protect the device from overheating. Thermal shutdown is active when the device reaches 150° C. When the temperature decreases to safe levels, the circuit switches back to normal operation.
DocID026152 Rev 1 27/32
32
Package information TS2012EI
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
Figure 41. Flip Chip 16 package mechanical drawing
2.07mm
250
m
500
m
2.07 mm
Die size: 2.07 x 2.07 mm ± 50 µm
Die height (including bumps):
600 µm
Bump diameter: 315 µm ± 50 µm
Bump diameter before reflow:
300 µm ± 10 µm
Bump height: 250 µm ± 40 µm
Die height: 350 µm ± 20 µm
Pitch: 500 µm ± 50 µm
Bump Coplanarity: 60 µm max
Optional*: back coating height:
40 µm
600
m
40
m*
28/32 DocID026152 Rev 1
TS2012EI
Figure 42. Pinout (top view)
Package information
Figure 43. Marking (top view)
ST Logo
Symbol for lead-free: E
Two first product codes: K0
Third X: assembly line plant code
Three-digit date code: Y for year - WW for week
The dot indicates pin A1
DocID026152 Rev 1 29/32
32
Package information
Figure 44. Tape and reel schematics (top view)
TS2012EI
Figure 45. Recommended footprint
500
m 500
m
75µm min.
100 m max.
=250
m
=400
m typ.
=340
m min.
150
m min.
Pad in Cu 18
m with Flash NiAu (2-6
m, 0.2
m max.)
30/32 DocID026152 Rev 1
TS2012EI
Date
01-Apr-2014
Table 10. Document revision history
Revision Changes
1 Initial release.
Revision history
DocID026152 Rev 1 31/32
32
TS2012EI
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32/32 DocID026152 Rev 1
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