STS5DNF60L
Datasheet
Automotive-grade dual N-channel 60 V, 35 mΩ typ., 5 A STripFET II
Power MOSFET in an SO-8 package
G1(2)
8
D1(7, 8)
S1(1)
5
Features
Order code
STS5DNF60L
V
DS
60 V
R
DS(on)
max.
45 mΩ
I
D
5 A
1
SO-8
4
G2(4)
D2(5, 6)
• AEC-Q101 qualified
• Exceptional dv/dt capability
• 100% avalanche tested
• Low gate charge
Applications
• Switching applications
S2(3)
SC12820
Description
This Power MOSFET has been developed using STMicroelectronics' unique
STripFET process, which is specifically designed to minimize input capacitance and gate charge. This renders the device suitable for use as primary switch in advanced high-efficiency isolated DC-DC converters for telecom and computer applications, and applications with low gate charge driving requirements.
Product status link
STS5DNF60L
Product summary
Order code STS5DNF60L
Marking
Package
Packing
5DF60L
SO-8
Tape and reel
DS5750 - Rev 4 - March 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
STS5DNF60L
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
DS
V
GS
Parameter
Drain-source voltage
Gate-source voltage
I
D
Drain current (continuous) at T amb
= 25 °C
Drain current (continuous) at T amb
= 100 °C
Drain current (pulsed) I
DM
(1)
P
TOT
(2)
T stg
T
J
Total power dissipation at T
Storage temperature range amb
= 25 °C
Operating junction temperature range
1. Pulse width limited by safe operating area.
2. P
TOT
= 1.6 W for single operation.
Table 2. Thermal data
Symbol
R thJB
(1)
Parameter
Thermal resistance, junction-to-board
1. When mounted on 1 inch² FR-4 board, 2 Oz Cu, t ≤ 10 s, dual operation.
Value
60
±15
5
3
16
2
-55 to 150
A
A
A
Unit
V
V
W
°C
°C
Value
62.5
Unit
°C/W
DS5750 - Rev 4 page 2/14
2
STS5DNF60L
Electrical characteristics
Electrical characteristics
T
C
= 25 °C unless otherwise specified.
Table 3. On/off states
Symbol
V
(BR)DSS
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Parameter Test conditions
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 250 μA
V
GS
= 0 V, V
DS
= 60 V
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 60 V, T
C
= 125 °C (1)
Gate-body leakage current
Gate threshold voltage
Static drain-source on-resistance
V
DS
= 0 V, V
GS
= ±15 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 2 A
V
GS
= 4.5 V, I
D
= 2 A
1. Defined by design, not subject to production test.
Table 4. Dynamic
Test conditions Symbol
C iss
C oss
C rss
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
V
DS
= 25 V, f = 1 MHz, V
GS
= 0 V
V
DD
= 48 V, I
D
= 4 A, V
GS
= 4.5 V
(see
Figure 12. Test circuit for gate charge behavior )
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 5. Switching times
Test conditions
V
DD
= 30 V, I
D
= 2.2 A,
R
G
= 4.7 Ω, V
GS
= 4.5 V
(see
Figure 11. Test circuit for resistive load switching times and
Figure 16. Switching time waveform )
Min.
Typ.
Max.
Unit
60 V
1
10
µA
µA
1.0
1.7
35
45
±100 nA
2.5
V
45
55 mΩ
-
-
-
-
Min.
Typ.
Max.
Unit
1030 pF
140 pF
40
15
4
4
-
-
-
pF nC nC nC
Min.
Typ.
Max.
Unit
15 ns
-
-
-
28
45
10
-
-
ns ns ns
DS5750 - Rev 4 page 3/14
STS5DNF60L
Electrical characteristics
Table 6. Source-drain diode
Symbol
I
SD
I
SDM
(1)
V
SD
(2)
t rr
Q rr
I
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
Test conditions
I
SD
= 4 A, V
GS
= 0 V
I
SD
= 4 A, di/dt = 100 A/µs,V
DD
= 20 V
(see
Figure 16. Switching time waveform )
-
-
-
Min.
Typ.
Max.
Unit
5 A
-
16
1.2
A
V
85
85
2 ns nC
A
DS5750 - Rev 4 page 4/14
STS5DNF60L
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
I
D
(A)
Figure 1. Safe operating area
AM06497v1
10
1
Operation
Limited
in
R
by
max
DS(on)
Tj =150°C
Tpcb =25°C
Single pulse
0.1
0.1
1 10 V
DS
(V)
Figure 3. Output characteristics
GC92010
100µs
1ms
100ms
Figure 2. Thermal impedance
AM06498v1
K
δ=0.5
0.2
0.1
0.02
0.05
10 -1
0.01
Zthj-pcb = K * Rthj-pcb
Rthj-pcb = 62.5°C/W
10 -2
10 -5
Single pulse
10
-4
10 -3 10 -2
10
-1
10 0 10 1 t
P
(s)
Figure 4. Transfer characteristics
GC92020
Figure 5. Source-drain diode forward characteristics
GC92090
9
Figure 6. Static drain-source on-resistance
GC92040
DS5750 - Rev 4 page 5/14
Figure 7. Gate charge vs gate-source voltage
GC92050
STS5DNF60L
Electrical characteristics (curves)
Figure 8. Capacitance variations
GC92060
Figure 9. Normalized gate threshold voltage vs temperature
GC92070
Figure 10. Normalized on-resistance vs temperature
GC92080
DS5750 - Rev 4 page 6/14
STS5DNF60L
Test circuits
3
Test circuits
Figure 11. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 13. Test circuit for inductive load switching and diode recovery times
Figure 12. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 14. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 15. Unclamped inductive waveform
V
(BR)DSS
V
D
I
DM
I
D
V
DD
V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF V
DD
D.U.T.
AM01471v1
0
Figure 16. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS5750 - Rev 4 page 7/14
4
4.1
STS5DNF60L
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
SO-8 package information
Figure 17. SO-8 package outline
DS5750 - Rev 4
0016023_So-807_fig2_Rev10 page 8/14
DS5750 - Rev 4
STS5DNF60L
SO-8 package information
Dim.
c c1
D
E
E1
A
A1
A2 b b1
L1
L2 k ccc e h
L
Table 7. SO-8 mechanical data
Min.
mm
Typ.
0.10
0.10
4.80
5.80
3.80
0.10
1.25
0.31
0.28
0.25
0.40
4.90
6.00
3.90
1.27
1.04
0.25
0°
Figure 18. SO-8 recommended footprint (dimensions are in mm)
Max.
1.75
0.25
0.51
0.48
0.25
0.23
5.00
6.20
4.00
0.50
1.27
8°
0.10
0016023_So-807_footprint_Rev10 page 9/14
4.2
SO-8 packing information
Figure 19. SO-8 tape and reel dimensions
STS5DNF60L
SO-8 packing information
A D N
Bo
Ko
T
Po
Ao P
Figure 20. Tape orientation
0016023_SO-8_O7_T_R
DS5750 - Rev 4 page 10/14
Dim.
Ao
Bo
Ko
Po
P
A
C
D
N
T
STS5DNF60L
SO-8 packing information
Table 8. SO-8 tape and reel mechanical data
Min.
mm
Typ.
12.8
20.2
60
6.5
5.4
2.0
3.9
7.9
-
Max.
330
13.2
22.4
6.7
5.6
2.2
4.1
8.1
DS5750 - Rev 4 page 11/14
STS5DNF60L
Revision history
Date
03-Mar-2008
18-Mar-2010
17-Oct-2016
04-Mar-2021
Version
1
2
3
4
Table 9. Document revision history
Changes
First release.
Figure 2: Safe operating area and Figure 3: Thermal impedance have been changed.
Updated title, features and description in cover page.
Added AEC-Q101 qualified in the Features section.
Updated Package information and Packing information .
Minor text changes.
Updated Internal schematic for SO-8 dual N-channel and Features
in cover page.
Updated Table 4. Dynamic
.
Updated Section 4.2 SO-8 packing information .
Minor text changes.
DS5750 - Rev 4 page 12/14
STS5DNF60L
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2
SO-8 packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
DS5750 - Rev 4 page 13/14
STS5DNF60L
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DS5750 - Rev 4 page 14/14
