STMicroelectronics STS8DN6LF6AG Datasheet
Advertisement
Advertisement
STS8DN6LF6AG
Datasheet
Automotive-grade dual N-channel 60 V, 21 mΩ typ., 8 A STripFET F6
Power MOSFET in a SO-8 package
G1(2)
8
D1(7, 8)
S1(1)
5
Features
Order code
STS8DN6LF6AG
V
DS
60 V
R
DS(on)
max.
24 mΩ
I
D
8 A
P
TOT
3.2 W
1
SO-8
4
G2(4)
D2(5, 6)
• AEC-Q101 qualified
• Very low on-resistance
• Very low gate charge
• High avalanche ruggedness
• Low gate drive power loss
• Logic level
Applications
• Switching applications
S2(3)
SC12820
Description
This device is a dual N-channel Power MOSFET developed using the STripFET F6 technology with a new trench gate structure. The resulting Power MOSFET exhibits very low R
DS(on)
in all packages.
Product status link
STS8DN6LF6AG
Product summary
Order code
Marking
Package
Packing
STS8DN6LF6AG
8DN6LF6
SO-8
Tape and reel
DS11953 - Rev 2 - March 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
STS8DN6LF6AG
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
DS
V
GS
Drain-source voltage
Gate-source voltage
Parameter
I
D
Drain current (continuous) at T amb
= 25 °C
Drain current (continuous) at T amb
= 100 °C
Drain current (pulsed) I
DM
P
TOT
T stg
T
J
Total power dissipation at T
Storage temperature range amb
= 25 °C (one channel active)
Operating junction temperature range
1. When mounted on a 1-inch² FR-4, 2 Oz copper board, t < 10 s.
2. Pulse width is limited by safe operating area .
Table 2. Thermal data
Symbol
R thJA
Parameter
Thermal resistance, junction-to-ambient
1. When mounted on a 1-inch² FR-4, 2 Oz copper board, t < 10 s.
Table 3. Avalanche characteristics
Symbol
I
AV
E
AS
Avalanche current, not repetitive
Single pulse avalanche energy
1.
S tarting T
J
= 25 °C, I
D
= I
AV
, V
DD
= 43.5 V.
Parameter
Value
60
±20
8
5.8
32
3.2
-55 to 175
Unit
V
V
A
A
W
°C
°C
Value
47
Unit
°C/W
Value
6
72
Unit
A mJ
DS11953 - Rev 2 page 2/14
2
STS8DN6LF6AG
Electrical characteristics
Electrical characteristics
T
C
= 25 °C unless otherwise specified.
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Table 4. Static
Parameter Test conditions
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 250 µA
Zero gate voltage drain current V
GS
= 0 V, V
DS
= 60 V
Gate-body leakage current
Gate threshold voltage
V
DS
= 0 V, V
GS
= ±20 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 4 A
Static drain-source on-resistance
V
GS
= 4.5 V, I
D
= 4 A
Symbol
C iss
C oss
C rss
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Table 5. Dynamic
Test conditions
V
DS
= 25 V, f = 1 MHz, V
GS
= 0 V
V
DD
= 30 V, I
D
= 8 A, V
GS
= 10 V
(see
Figure 13. Test circuit for gate charge behavior )
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 30 V, I
D
= 4 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see
Figure 12. Test circuit for resistive load switching times and
Figure 17. Switching time waveform )
Min.
Typ.
Max.
Unit
60 V
1
21
22
1 µA
±100 nA
2.5
24
26
V mΩ
-
-
-
-
Min.
Typ.
Max.
Unit
1340 pF
90 pF
60
27
4.6
4.3
-
-
-
pF nC nC nC
Min.
Typ.
Max.
Unit
9.6
ns
-
-
-
20
56
7
-
-
ns ns ns
DS11953 - Rev 2 page 3/14
STS8DN6LF6AG
Electrical characteristics
Table 7. Source-drain diode
Symbol
I
SD
I
SDM
V
I
SD
t
Q rr rr
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Test conditions
V
GS
= 0 V, I
SD
= 8 A
I
SD
= 8 A, di/dt = 100 A/µs,
V
DD
= 48 V, T
J
= 25 °C
(see
Figure 14. Test circuit for inductive load switching and diode recovery times )
1. Pulse width is limited by safe operating area.
2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
Min.
Typ.
Max.
Unit
8 A
-
-
-
22.5
22.2
32
1.3
A
V ns nC
2.0
A
DS11953 - Rev 2 page 4/14
STS8DN6LF6AG
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
I
D
(A)
GADG011220160927SOA
Operation in this area is limited by R
DS(on)
10 1
10 0
10 -1
T
J
≤ 175 °C
T amb
= 25°C single pulse t p
=100 µs t p
=1 ms t p
=10 ms
10 -2
10 -1 10 0 10 1
V
DS
(V)
16
12
8
I
D
(A)
28
24
20
4
0
0
Figure 3. Output characteristics
GADG301120161620OCH
V
GS
= 6, 7, 8, 9, 10 V
1 2 3 4
V
GS
= 3 V
5 V
DS
(V)
Figure 5. Gate charge vs gate-source voltage
V
GS
(V)
GADG011220160851QVG
10
8
V
DS
= 30 V
I
D
= 8 A
6
4
2
0
0 4 8 12 16 20 24 Q g
(nC)
K
Figure 2. Thermal impedance
GADG011220160858ZTH
δ = 0.5
10 -1
δ = 0.2
δ = 0.1
δ = 0.05
δ = 0.02
δ = 0.01
10 -2
Single pulse
10 -3
10 -5 10 -4 10 -3 10 -2 10 -1 10 0 t p
(s)
Figure 4. Transfer characteristics
16
12
8
I
D
(A)
28
24
20
V
DS
= 5 V
GADG011220160823TCH
4
0
0 0.5
1 1.5
2 2.5
3 V
GS
(V)
Figure 6. Static drain-source on-resistance
R
DS(on)
(mΩ)
GADG301120161557RID
21.2
21.0
V
GS
= 10 V
20.8
20.6
20.4
20.2
2 3 4 5 6 7 I
D
(A)
DS11953 - Rev 2 page 5/14
STS8DN6LF6AG
Electrical characteristics (curves)
C
(pF)
Figure 7. Capacitance variations
GADG011220160832CVR
10 3
C
ISS
10 2
C
OSS
C
RSS
10 1
0 10 20 30 40 50 60 V
DS
(V)
Figure 8. Normalized gate threshold voltage vs temperature
V
GS(th)
(norm.)
1.2
GADG301120161608VTH
1.0
0.8
0.6
0.4
0.2
0.0
-75 -25 25
I
D
= 250 µA
75 125 175 T
J
(°C)
Figure 9. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
GADG301120161603RON
2.5
V
GS
= 10 V
2.0
1.5
1.0
0.5
0.0
-75 -25 25 75 125 175 T
J
(°C)
Figure 10. Normalized V
(BR)DSS
vs temperature
V
(BR)DSS
(norm.)
1.12
GADG301120161611BDV
1.08
I
D
= 250 µA
1.04
1.00
0.96
0.92
0.88
-75 -25 25 75 125 175 T
J
(°C)
Figure 11. Source-drain diode forward characteristics
V
SD
(V)
1.0
GADG301120161614SDF
0.9
T
J
= -55 °C
0.8
T
J
= 25 °C
0.7
0.6
0.5
0.4
2 3 4 5
T
J
= 175 °C
6 7 I
SD
(A)
DS11953 - Rev 2 page 6/14
STS8DN6LF6AG
Test circuits
3
Test circuits
Figure 12. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 14. Test circuit for inductive load switching and diode recovery times
Figure 13. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 15. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 16. Unclamped inductive waveform
V
(BR)DSS
V
D
I
DM
I
D
V
DD
V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF V
DD
D.U.T.
AM01471v1
0
Figure 17. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS11953 - Rev 2 page 7/14
4
4.1
STS8DN6LF6AG
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
SO-8 package information
Figure 18. SO-8 package outline
DS11953 - Rev 2
0016023_So-807_fig2_Rev10 page 8/14
DS11953 - Rev 2
STS8DN6LF6AG
SO-8 package information
Dim.
c c1
D
E
E1
A
A1
A2 b b1
L1
L2 k ccc e h
L
Table 8. SO-8 mechanical data
Min.
mm
Typ.
0.10
0.10
4.80
5.80
3.80
0.10
1.25
0.31
0.28
0.25
0.40
4.90
6.00
3.90
1.27
1.04
0.25
0°
Figure 19. SO-8 recommended footprint (dimensions are in mm)
Max.
1.75
0.25
0.51
0.48
0.25
0.23
5.00
6.20
4.00
0.50
1.27
8°
0.10
0016023_So-807_footprint_Rev10 page 9/14
4.2
SO-8 packing information
Figure 20. SO-8 tape and reel dimensions
STS8DN6LF6AG
SO-8 packing information
A D N
Bo
Ko
T
Po
Ao P
Figure 21. Tape orientation
0016023_SO-8_O7_T_R
DS11953 - Rev 2 page 10/14
Dim.
Ao
Bo
Ko
Po
P
A
C
D
N
T
STS8DN6LF6AG
SO-8 packing information
Table 9. SO-8 tape and reel mechanical data
Min.
mm
Typ.
12.8
20.2
60
6.5
5.4
2.0
3.9
7.9
-
Max.
330
13.2
22.4
6.7
5.6
2.2
4.1
8.1
DS11953 - Rev 2 page 11/14
Revision history
Date
01-Dec-2016
08-Mar-2021
Version
1
2
Table 10. Document revision history
Changes
First release
Updated Internal schematic for SO-8 dual N-channel
.
Updated Section 4.2 SO-8 packing information .
Minor text changes.
STS8DN6LF6AG
DS11953 - Rev 2 page 12/14
STS8DN6LF6AG
Contents
Contents
DS11953 - Rev 2 page 13/14
STS8DN6LF6AG
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks . All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
DS11953 - Rev 2 page 14/14
Download
Advertisement