বিজ্ঞাপন
বিজ্ঞাপন
VN5770AKP-E
Quad smart power solid state relay for complete H-bridge configurations
Datasheet
-
production data
– Thermal shutdown indication on both the high and low-side switches
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Features
Type R
DS(on)
VN5770AKP-E 280 m
Ω (1)
I
OUT
(typ)
8.5 A
V
CC
36 V
1.
Total resistance of one side in bridge configuration
• ECOPACK
®
: lead free and RoHS compliant
• Automotive Grade: compliance with AEC guidelines
• General features
– Inrush current management by active power limitation on the high-side switches
– Very low standby current
– Very low electromagnetic susceptibility
– Compliance with European directive
2002/95/EC
• Protection
– High-side drivers undervoltage shutdown
– Overvoltage clamp
– Output current limitation
– High and low-side overtemperature shutdown
– Short circuit protection
– ESD protection
• Diagnostic functions
– Proportional load current sense
Applications
• DC motor driving in full or half bridge configuration
• All types of resistive, inductive and capacitive loads
Description
The VN5770AKP-E is a device formed by three monolithic chips housed in a standard SO-28 package: a double high-side and two low-side switches. The double high-side is made using
STMicroelectronics
®
VIPower
®
M0-5 technology, while the low-side switches are fully protected
VIPower M0-3 OMNIFET II. This device is suitable to drive a DC motor in a bridge configuration as well as to be used as a quad switch for any low voltage application.
The dual high-side switches integrate built in non latching thermal shutdown with thermal hysteresis. An output current limiter protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to a safe level up to thermal shutdown intervention. An analog current sense pin delivers a current proportional to the load current
(according to a known ratio) and indicates overtemperature shutdown of the relevant high-side switch through a voltage flag.
The low-side switches have built in non latching thermal shutdown with thermal hysteresis, linear current limitation and overvoltage clamping.
Fault feedback for overtemperature shutdown of the low-side switch is indicated by the relevant input pin current consumption going up to the fault sink current flag.
July 2015
This is information on a product in full production.
DocID17772 Rev 7
www.st.com
Contents
Contents
VN5770AKP-E
Block diagram and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical characteristics for dual high-side switch . . . . . . . . . . . . . . . . . . 10
Electrical characteristics curves for dual high-side switch . . . . . . . . 14
Electrical characteristics for low-side switches . . . . . . . . . . . . . . . . . . . . . 16
Electrical characteristics curves for low-side switches . . . . . . . . . . . . . . . 18
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Maximum demagnetization energy (V
= 13.5 V) . . . . . . . . . . . . . . . . . 24
Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SO-28 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
SO-28 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
DocID17772 Rev 7
VN5770AKP-E
List of tables
List of tables
j
= 25°C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
j
= 25 °C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Protection and diagnostics (-40 °C < Tj < 150 °C, unless otherwise specified) . . . . . . . . . 17
Thermal calculations in clockwise and anti-clockwise operation in steady-state mode . . . 26
DocID17772 Rev 7
3
List of figures
List of figures
VN5770AKP-E
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
vs T case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Static drain-source on resistance vs I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 26
DocID17772 Rev 7
VN5770AKP-E
1
Block diagram and pin descriptions
Block diagram and pin descriptions
Figure 1. Block diagram
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DocID17772 Rev 7
36
Block diagram and pin descriptions VN5770AKP-E
No
1, 3, 25, 28
2
4, 11
5, 10, 19, 24
6
7
8
9
12, 14, 15, 18
13
16, 17
20, 21
22, 23
26, 27
Name
Table 1. Pin descriptions
Function
DRAIN 3
INPUT 3
N.C.
V
CC
GND
INPUT 1
INPUT 2
CURRENT
SENSE
DRAIN 4
Drain of switch 3 (low-side switch)
Input of switch 3 (low-side switch)
Not connected
Drain of switches 1 and 2 (high-side switches) and power supply voltage
Ground of switches 1 and 2 (high-side switches)
Input of switch 1 (high-side switches)
Input of switch 2 (high-side switch)
Analog current sense pin, it delivers a current proportional to the load current
Drain of switch 4 (low-side switch)
INPUT 4 Input of switch 4 (low-side switch)
SOURCE 4 Source of switch 4 (low-side switch)
SOURCE 2 Source of switch 2 (high-side switch)
SOURCE 1 Source of switch 1 (high-side switch)
SOURCE 3 Source of switch 3 (low-side switch)
Figure 2. Configuration diagram (top view)
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DocID17772 Rev 7
VN5770AKP-E Block diagram and pin descriptions
Symbol
Table 2. Thermal data
Parameter
R thj-case
R thj-case
R thj-amb
Thermal resistance junction-lead (high-side switch)
Thermal resistance junction-lead (low-side switch)
Thermal resistance junction-ambient
Max value Unit
10
7
°C/W
°C/W
See
°C/W
DocID17772 Rev 7
36
Absolute maximum ratings VN5770AKP-E
Stressing the device above the rating listed in
and Table 4 may cause permanent
damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is
not implied. Exposure to the conditions in Section 2.1: Absolute maximum ratings
for extended periods may affect device reliability.
Symbol
V
CC
-V
CC
-I
GND
I
OUT
-I
OUT
I
IN
I
CSD
Table 3. Dual high-side switch
Parameter
DC supply voltage
Reverse DC supply voltage
DC reverse ground pin current
DC output current
Reverse DC output current
DC input current
DC current sense disable input current
V
CSENSE
Current sense maximum voltage
E
MAX
V
ESD
V
ESD
T j
T stg
Maximum switching energy (single pulse)
(L = 3.7 mH; R
L
= 0
Ω
; V bat
= 13.5 V; T jstart
= 150 °C;
I
OUT
= I limL
(Typ.))
Electrostatic discharge (Human Body Model: R = 1.5 K
Ω ;
C = 100 pF)
– INPUT
– CURRENT SENSE
– OUTPUT
– V
CC
Charge device model (CDM-AEC-Q100-011)
Junction operating temperature
Storage temperature
Value Unit
41
0.3
V
V
200 mA
Internally limited A
-12 A
-1 to 10
-1 to 10
V
CC
-41
+V
CC mA mA
V
V
32 mJ
4000
2000
5000
5000
750
-40 to 150
-55 to 150
V
°C
°C
V
V
V
V
DocID17772 Rev 7
VN5770AKP-E Absolute maximum ratings
Symbol
Table 4. Low-side switch
Parameter
V
DSn
V
INn
I
INn
R
IN MINn
I
Dn
I
Rn
V
ESD1
V
ESD2
P
T
T
T tot c j stg
Drain-source voltage (V
INn
= 0 V)
Input voltage
Input current
Minimum input series impedance
Drain current
Reverse DC output current
Electrostatic discharge (R = 1.5 K
Ω
, C = 100 pF)
Electrostatic discharge on output pins only
(R = 330
Ω
, C = 150 pF)
Total dissipation at T c
= 25 °C
Operating junction temperature
Case operating temperature
Storage temperature
Value
Internally clamped
Internally clamped
+/-20
220
Internally limited
-12
4000
16500
4
Internally limited
Internally limited
-55 to 150
Unit
V
V mA
Ω
A
A
V
V
W
°C
°C
°C
DocID17772 Rev 7
36
Electrical characteristics VN5770AKP-E
3.1
Electrical characteristics for dual high-side switch
Values specified in this section are for 8 V < V
CC
< 36 V; -40 °C < T j
< 150 °C, unless otherwise specified (for each channel).
Symbol Parameter
V
CC
Operating supply voltage
V
USD
Undervoltage shutdown
V
USDhyst
Undervoltage shutdown hysteresis
Table 5. Power section
Test conditions
R
ON
V clamp
Clamp Voltage
I
S
I
L(off)
On-state resistance
Supply current
Off-state output current
(2)
I
OUT
= 3 A; T j
= 25 °C
I
OUT
= 3 A; T j
= 150 °C
I
OUT
= 3 A; V
CC
= 5 V; T j
= 25 °C
I
S
= 20 mA
Off-state; V
CC
= 13 V; T j
= 25 °C;
V
IN
= V
OUT
= V
SENSE
= 0 V
On-state; V
CC
= 13 V; V
IN
= 5 V;
I
OUT
= 0 A
V
IN
= V
OUT
= 0 V; V
CC
= 13 V;
T j
= 25 °C
V
IN
= V
OUT
= 0 V; V
CC
= 13 V;
T j
= 125 °C
V
F
Output - V
CC
diode voltage
(2)
1.
PowerMOS leakage included
2.
For each channel
-I
OUT
= 3 A; T j
= 150 °C
Min.
Typ. Max. Unit
4.5
41
0
0
13 36 V
3.5
4.5
V
0.5
V
160 m Ω
320 m Ω
210 m
Ω
46 52 V
2
(1)
5
(1)
µA
3 6
3
5 mA
µA
µA
0.7
V
Symbol Parameter
Table 6. Switching (V
CC
= 13 V)
Test conditions Min.
Typ.
Max. Unit t t d(on) d(off)
(dV
OUT
/dt) on
(dV
OUT
/dt) off
W
ON
Turn-on delay time R
L
= 4.3
Ω
(see
) —
Turn-off delay time R
L
= 4.3 Ω (see
) —
15
10
—
—
µs
µs
Turn-on voltage slope
R
L
= 4.3
Ω
—
V / µs
Turn-off voltage slope R
L
= 4.3
Ω
—
V
/
µs
Switching energy losses during t won
R
L
= 4.3 Ω (see
) — 0.16
— mJ
W
OFF
Switching energy losses during t woff
R
L
= 4.3 Ω (see
) — 0.08
— mJ
DocID17772 Rev 7
VN5770AKP-E Electrical characteristics
Symbol
V
IL
I
IL
V
IH
I
IH
V
I(hyst)
Parameter
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
Table 7. Logic input
Test conditions
V
IN
= 0.9 V
V
IN
= 2.1 V
V
ICL
Input clamp voltage
I
IN
= 1 mA
I
IN
= -1 mA
Min.
Typ.
Max.
Unit
0.9
1
2.1
0.25
5.5
-0.7
10
7
V
µA
V
µA
V
V
V
Parameter
Table 8. Protection and diagnostics
(1)
Test conditions Min.
Symbol Typ.
Max.
Unit
I limH
DC Short circuit current
V
CC
= 13 V
5 V < V
CC
< 36 V
6 8.5
12
12
A
A
I limL
Short circuit current during thermal cycling
Shutdown temperature T
TSD
T
T
R
RS
Reset temperature
Thermal reset of
STATUS
T
HYST
Thermal hysteresis
(T
TSD
-T
R
)
V
DEMAG
Turn-off output voltage clamp
V
CC
= 13 V; T
R
< T j
< T
TSD
150
T
RS
135
3.5
175
+ 1 T
RS
7
+ 5
200
A
°C
°C
°C
°C
V
ON
Output voltage drop limitation
I
OUT
= 1 A; V
IN
= 0;
L = 20 mH
I
T
OUT j
= 0.03 A;
= -40 °C to 150 °C
(see
)
V
CC
-41 V
CC
-46 V
25
CC
-52 V
1.
To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles mV
DocID17772 Rev 7
36
Electrical characteristics VN5770AKP-E
Symbol
Table 9. Current sense (8V<V
CC
<16V)
Parameter Test conditions Min.
Typ.
Max. Unit
I
V
V
K
K
K
K
0
1
2
3
SENSE0
SENSE
SENSEH
I
I
I
I
OUT
OUT
OUT
OUT
/I
/I
/I
/I
SENSE
SENSE
SENSE
SENSE
Analog sense current
I
OUT
= 0.08 A;
V
SENSE
= 0.5 V;
T j
= -40°C to 50°C
I
OUT
= 0.35 A; V
SENSE
= 0.5V;
T j
= -40°C to 150°C
T j
= 25°C to 150°C
I
T
OUT j
= 3A; V
SENSE
= 4V;
= -40°C to 150°C
I
T
OUT j
= 4A; V
SENSE
= 4V;
= -40°C to 150°C
I
OUT
= 0A; V
SENSE
= 0V;
V
IN
= 0V; T j
= -40°C to 150°C
I
OUT
= 0A; V
SENSE
= 0V;
V
IN
= 5V; T j
= -40°C to 150°C
850
840
980
1450 2120
1360
1360
2000
1740
1200 1270 1350
1200 1270 1350
0
0
1
2
Max analog sense output voltage
I
OUT
= 5A; R
SENSE
= 3.9 K
Ω
Analog sense output voltage in overtemperature condition
V
CC
= 13V; R
SENSE
= 3.9 K
Ω
5
9 t
DSENSE2H t
I
SENSEH
DSENSE2L
Analog sense output current in overtemperature condition
V
CC
= 13V
Delay response time from rising edge of INPUT pin
Delay response time from falling edge of INPUT pin
V
SENSE
<4 V; 0.35 A<I out
<5 A;
I
SENSE
= 90% of I
SENSE max
(see
)
V
SENSE
<4 V; 0.35 A<I out
<5 A;
I
SENSE
= 10% of I
SENSE max
(see
)
8
70
100
300
250
µA
µA
V
V mA
µs
µs
Figure 3. Switching time waveforms
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DocID17772 Rev 7
VN5770AKP-E Electrical characteristics
Figure 4. Output voltage drop limitation
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Conditions
Normal operation
Overtemperature
Undervoltage
Short circuit to GND
Short circuit to V
CC
Negative output voltage clamp
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Table 10. Truth table
Input Output
L
H
L
H
L
H
L
H
L
H
L
L
L
L
L
L
L
H
H
H
L
Figure 5. Current sense delay characteristics
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0
V
SENSEH
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0
0
0
0
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DocID17772 Rev 7
36
Electrical characteristics curves for dual high-side switch
4
VN5770AKP-E
Electrical characteristics curves for dual high-side switch
Figure 6. Off-state output current
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DocID17772 Rev 7
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VN5770AKP-E Electrical characteristics curves for dual high-side switch
Figure 12. On-state resistance vs T case
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Figure 13. On-state resistance vs V
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LIMH
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6CC 6
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DocID17772 Rev 7
7F& ("1($'5
36
Electrical characteristics curves for dual high-side switch
4.1
VN5770AKP-E
Electrical characteristics for low-side switches
Values specified in this section are for -40 °C < T j
< 150 °C, unless otherwise specified
Symbol Parameter
Table 11. Off
Test conditions
V
CLAMP
V
V
V
I
I
CLTH
INTH
ISS
INCL
DSS
Drain-source clamp voltage
V
IN
= 0 V; I
D
= 1.5 A
Drain-source clamp threshold voltage
V
IN
= 0 V; I
D
= 2 mA
Input threshold voltage V
DS
= V
IN
; I
D
= 1 mA
Supply current from input pin
V
DS
= 0 V; V
IN
= 5 V
Input-source clamp voltage
Zero input voltage drain current
(V
IN
= 0V)
I
IN
= 1 mA
I
IN
= -1 mA
V
DS
= 13 V; V
IN
= 0 V; T j
= 25 °C
V
DS
= 25 V; V
IN
= 0 V
Min Typ Max Unit
40
36
0.5
6
-1.0
45
100 150
6.8
55
2.5
8
-0.3
30
75
V
V
V
µA
V
V
µA
µA
Table 12. On
Test conditions Symbol
R
DS(on)
Parameter
Static drain-source on resistance
V
IN
= 5 V; I
D
= 3 A; T j
= 25 °C
V
IN
= 5 V; I
D
= 3 A
Min Typ Max Unit
—
—
—
—
120
240 m Ω m
Ω
Symbol g fs
C
OSS
Table 13. Dynamic (T j
= 25°C, unless otherwise specified)
Parameter Test conditions Min Typ Max Unit
Forward transconductance
Output capacitance
V
DD
= 13 V; I
D
= 1.5 A —
V
DS
= 13 V; f = 1 MHz; V
IN
= 0 V —
2.5
150
—
—
S pF
Symbol t d(on) t r t d(off) t f t d(on) t r t d(off) t f
Table 14. Switching (T j
= 25 °C, unless otherwise specified)
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
V
DD
= 15 V; I
D
R gen
= R
= 3 A; V gen
IN MINn
= 220
Ω
= 5 V;
V
DD
= 15 V; I
D
V gen
= 5 V; R
= 3 A gen
= 2.2 K Ω
Min Typ Max Unit
—
—
—
—
—
—
—
—
200 400
1.2
2.5
ns
µs
600 1350 ns
400 1000 ns
0.80
2.5
3.7
7.5
µs
µs
2.6
2.3
7.5
7.0
µs
µs
DocID17772 Rev 7
VN5770AKP-E Electrical characteristics curves for dual high-side switch
Table 14. Switching (T j
= 25 °C, unless otherwise specified) (continued)
Symbol Parameter Test conditions Min Typ Max Unit
(dI/dt) on
Q i
Turn-on current slope
Total input charge
V
DD
= 15 V; I
D
R gen
= R
= 3 A; V gen
IN MINn
= 220 Ω
= 5 V;
V
DD
= 12 V; I
D
= 3 A; V
IN
= 5 V;
I gen
= 2.13 mA
—
—
3.0
9.0
A/µs nC
Table 15. Source drain diode
Symbol Parameter Test conditions
V
SD
(1) t rr
Forward on voltage
Reverse recovery time
I
SD
= 1.5 A; V
IN
= 0 V
Q rr
Reverse recovery charge
I
SD
= 1.5 A; dI/dt = 12 A/ms;
V
DD
= 30 V; L = 200 μ H
I
RRM
Reverse recovery current
1.
Pulsed: pulse duration = 300
μ s, duty cycle 1.5%
Min Typ Max Unit
—
—
0.8
400
—
—
V ns
— 200 — nC
— 1.0
— A
Table 16. Protection and diagnostics (-40 °C < T j
< 150 °C, unless otherwise specified)
Symbol Parameter Test conditions Min Typ Max Unit
6 8.5
12 A t
I lim dlim
Drain current limit V
IN
= 5 V; V
DS
= 13 V
Step response current limit
V
IN
= 5 V; V
DS
= 13 V
T jsh
Overtemperature shutdown
T jrs reset
I gf
Fault sink current
E as
Single pulse avalanche energy
V
IN
= 5 V; V
DS
= 13 V; T j
= T jsh
Starting T j
= 25 °C; V
DD
= 24 V;
V
IN
= 5 V; R gen
= R
IN MINn
= 220
Ω
;
L = 24 mH
10 µs
150 175 200 °C
135
10
100
15
°C
20 mA mJ
DocID17772 Rev 7
36
Electrical characteristics curves for dual high-side switch VN5770AKP-E
4.2 Electrical characteristics curves for low-side switches
Figure 18. Static drain source on resistance
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VN5770AKP-E Electrical characteristics curves for dual high-side switch
Figure 24. Output characteristics
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DocID17772 Rev 7
36
Electrical characteristics curves for dual high-side switch
Figure 30. Normalized input threshold voltage vs temperature
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Figure 31. Normalized on resistance vs
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DocID17772 Rev 7
VN5770AKP-E Application information
Figure 33. Typical application schematic
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Mostly motor bridge drivers use a reverse battery protection diode (D) inside supply rail.
This diode prevents a reverse current flow back to Vbatt in case the bridge gets disabled via the logic inputs while motor inductance still carries energy. In order to prevent a hazardous overvoltage at circuit supply terminal (Vcc), a blocking capacitor (C) is needed to limit the voltage overshoot. As basic orientation, 50 µF per 1 A load current in recommended. In alternative, also a Zener protection (Z) is suitable. Even if a reverse polarity diode is not present, it is recommended to use a capacitor or zener at Vcc because a similar problem appears in case supply terminal of the module has intermittent electrical contact to the battery or gets disconnected while motor is operating.
DocID17772 Rev 7
36
Application information
Figure 34. Recommended motor operation
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VN5770AKP-E Application information
Figure 35. Waveforms
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Application information
5.1 Maximum demagnetization energy (V
CC
= 13.5 V)
VN5770AKP-E
Figure 36. Maximum turn off current versus load inductance
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VN5770AKP-E
6 Package and thermal data
Figure 37. SO-28 PC board
Package and thermal data
Note: Layout condition of R th
and Z th
measurements (PCB FR4 area= 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 35 mm, Copper areas: from minimum pad layout to
16 cm
2
).
Figure 38. Chipset configuration
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Package and thermal data VN5770AKP-E
Figure 39. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition
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. For more detailed information see Table 17
and
Table 17. Thermal calculations in clockwise and anti-clockwise operation in steadystate mode
HS
1
HS
2
LS
3
LS
4
T jHS12
T jLS3
T jLS4
ON OFF OFF ON
OFF ON ON OFF
P dHS1 x R thHS
+ P dLS4 x
R thHSLS
+ T amb
P dHS1 x R thHSLS
+
P dLS4 x R thLSLS
+ T amb
P dHS1 x R thHSLS
+
P dLS4 x R thLS
+ T amb
P dHS2 x R thHS
+ P dLS3 x
R thHSLS
+ T amb
P dHS2 x R thHSLS
+
P dLS3 x R thLS
+ T amb
P dHS2
P dLS3 x R x R thHSLS
+ thLSLS
+ T amb
Parameter
Table 18. Thermal resistances definitions
Definition
R thHS
= R thHS1
= R thHS2
R thLS
= R thLS3
= R thLS4
R thHSLS
= R thHS1LS4
= R thHS2LS3
R thLSLS
= R thLS3LS4
High-side chip thermal resistance junction to ambient (HS
1 or HS
2
in ON-state)
Low-side chip thermal resistance junction to ambient
Mutual thermal resistance junction to ambient between highside and low-side chips
Mutual thermal resistance junction to ambient between lowside chips
Values dependent on PCB heatsink area.
DocID17772 Rev 7
VN5770AKP-E Package and thermal data
x
Table 19. Single pulse thermal impedance definitions
Parameter Definition
Z thHS
Z thLS
= Z thLS3
= Z thLS4
Z thHSLS
= Z thHS12LS3
= Z thHS12LS4
Z thLSLS
= Z thLS3LS4
High-side chip thermal impedance junction to ambient
Low-side chip thermal impedance junction to ambient
Mutual thermal impedance junction to ambient between high-side and low-side chips
Mutual thermal impedance junction to ambient between lowside chips
Note:
Note:
Values dependent on PCB heatsink area.
Parameter
T jHS12
T jLS3
T jLS4
Table 20. Thermal calculations in transient mode
Definition
Z thHS
x P dHS12
+ Z thHSLS
x (P dLS3
+ P dLS4
) + T amb
Z thHSLS
x P dHS12
+ Z thLS
x P dLS3
+ Z thLSLS
x P dLS4
+ T amb
Z thHSLS
x P dHS12
+ Z thLSLS
x P dLS3
+ Z thLS
x P dLS4
+ T amb
Calculation is valid in any dynamic operating condition. Pd values set by user.
Figure 40. SO-28 HSD thermal impedance junction ambient single pulse
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DocID17772 Rev 7
36
Package and thermal data VN5770AKP-E
Figure 41. SO-28 LSD thermal impedance junction ambient single pulse
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FP
/6'
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Equation 1: pulse calculation formula
Z
TH
δ
= R
TH
⋅ δ
+ Z where
δ
= t p
⁄
T
TH tp
(
1 –
δ )
Figure 42. Thermal fitting model of an H-bridge in SO-28
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DocID17772 Rev 7
VN5770AKP-E
Area/island (cm
2
)
R1 = R7 (°C/W)
R2 = R8 (°C/W)
R3 = R11 = R17 (°C/W)
R4 (°C/W)
R5 = R13 = R19 (°C/W)
R6 = R14 = R20 (°C/W)
R9 = R15 (°C/W)
R10 = R16 (°C/W)
R12 (°C/W)
R18 (°C/W)
R21 = R22 = R23 (°C/W)
R24 (°C/W)
C1 = C7 (W·s/°C)
C2 = C8 (W·s/°C)
C3 = C11 = C17 (W·s/°C)
C5 = C13 = C19 (W·s/°C)
C6 = C14 = C20 (W·s/°C)
C9 = C15 (W·s/°C)
C10 = C16 (W·s/°C)
Table 21. Thermal parameters
Footprint 1
62.28
0.24
1.2
15.2
15.5
150
1
1.8
3.5
13.5
10.5
150
0.0008
0.001
0.008
0.2
1.6
0.00015
0.0005
52.28
52.28
1.61
Package and thermal data
2
44.28
44.28
1.7
6
32.28
32.28
3.25
Note: A blank space means that the value is the same as the previous one.
DocID17772 Rev 7
36
Package information VN5770AKP-E
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
'
Figure 43. SO-28 package outline
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Ref.
A
A1
B
C
D
(1)
H
Table 22. SO-28 mechanical data
Dimensions
Millimeters
Typ.
Min.
2.35
0.10
0.33
0.23
17.70
DocID17772 Rev 7
Max.
2.65
0.30
0.51
0.32
18.10
VN5770AKP-E
Table 22. SO-28 mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
E e
H
7.40
1.27
h
L k
10.0
0.25
0.40
0° ddd
1.
Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.15mm per side.
Package information
Max.
7.60
10.65
0.75
1.27
8°
0.10
DocID17772 Rev 7
36
Package information VN5770AKP-E
&
Figure 44. SO-28 tube shipment (no suffix)
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Figure 45. Reel for SO-28
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Table 23. Reel dimensions
Description
Base quantity
Bulk quantity
A (max)
B (min)
C (+0.5, -0.2)
D (min)
N
W1 (+2/ -0)
W2 (max)
1.
All dimensions are in mm.
DocID17772 Rev 7
8
8
/
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Value
(1)
1000
1000
330
1.5
13
20.2
100
24.4
30.4
VN5770AKP-E
Figure 46. SO-28 carrier tape
Package information
Table 24. SO-28 carrier tape dimensions
Description Value
(1)
A
0
B
0
10.90 ± 0.1
18.55 ± 0.1
K
0
K
1
3.0 ± 0.1
2.6 ± 0.1
F
P
1
D1
W
11.5 ± 0.1
12.0 ± 0.1
1.5 ± 0.1
24.0 ± 0.3
1.
All dimensions are in mm.
("1($'5
DocID17772 Rev 7
36
Package information VN5770AKP-E
Figure 47. SO-28 schematic drawing of leader and trailer tape
DocID17772 Rev 7
VN5770AKP-E Order codes
Package
SO-28
Table 25. Device summary
Order codes
Tube
VN5770AKP-E
Tape and reel
VN5770AKPTR-E
DocID17772 Rev 7
36
Revision history VN5770AKP-E
Date
11-Nov-2010
04-Jan-2012
20-Feb-2012
02-Oct-2012
23-Sep-2013
25-Feb-2015
21-Jul-2015
Revision
Table 26. Document revision history
Changes
1
2
3
4
5
6
7
Initial release.
Table 9: Current sense (8V<VCC<16V) - K
0 values modified
Update Figure 2: Configuration diagram (top view) and
Table 9: Current sense (8V<VCC<16V) :
– K
0
: updated values
Updated Disclaimer
Fixed order code value on the cover page and Table 25: Device summary
Updated:
–
Section 7.1: SO-28 package information
;
– Tape dimensions in
Figure 8: Order codes on page 35 .
Updated Section 7.2: SO-28 packing information
DocID17772 Rev 7
VN5770AKP-E
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