STMicroelectronics VN5E016MH-E Datasheet
जाहिरात
जाहिरात
VN5E016MH-E
16 m Ω high-side driver with analog current sense for automotive applications
Datasheet
-
production data
HPak
– Self limiting of fast thermal transients
– Protection against loss of ground and loss of V
CC
– Overtemperature shutdown with auto restart (thermal shutdown)
– Reverse battery protected
– Electrostatic discharge protection
Features
Max supply voltage
Operating voltage range
V
CC
V
CC
Max on-state resistance (per ch.) R
ON
Current limitation (typ) I
LIMH
Off-state supply current I
S
41 V
4.5 to 28 V
16 m Ω
73 A
2 µA
(1)
1.
Typical value with all loads connected.
• General
– Inrush current active management by power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
European directive
• Diagnostic functions
– Proportional load current sense
– High current sense precision for wide current range
– Current sense disable
– Overload and short to ground (power limitation) indication
– Thermal shutdown indication
• Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
Applications
• All types of resistive, inductive and capacitive loads
• Suitable as LED driver
Description
The VN5E016MH-E is a single channel high-side driver manufactured in the ST proprietary
VIPower™ M0-5 technology and housed in the tiny HPak package. The VN5E016MH-E is designed to drive 12 V automotive grounded loads delivering protection, diagnostics and easy
3 V and 5 V CMOS compatible interface with any microcontroller.
The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with auto restart and overvoltage active clamp.
A dedicated analog current sense pin is associated with every output channel in order to provide enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication and overtemperature indication.
The current sensing and diagnostic feedback of the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external sense resistor with other similar devices.
May 2014
This is information on a product in full production.
DocID17114 Rev 6 1/34 www.st.com
Contents
Contents
VN5E016MH-E
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22
Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 23
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Maximum demagnetization energy (V
= 13.5 V) . . . . . . . . . . . . . . . . . 25
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
®
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
HPak packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2/34 DocID17114 Rev 5
VN5E016MH-E
List of tables
List of tables
CC
= 13 V, T j
= 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
< 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
DocID17114 Rev 5 3/34
3
List of figures
List of figures
VN5E016MH-E
/I
SENSE
vs I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
vs T case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4/34 DocID17114 Rev 5
VN5E016MH-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1. Block diagram
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Table 1. Pin functions
Function Name
V
CC
OUTPUT
GND
INPUT
Battery connection
Power output
(1)
Ground connection
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state
CURRENT
SENSE
CS_DIS
Analog current sense pin, delivers a current proportional to the load current
Active high CMOS compatible pin, to disable the current sense pin
1.
Pins 1 and 7 must be externally tied together.
DocID17114 Rev 5 5/34
33
Block diagram and pin description
Figure 2. Configuration diagram (top view) not in scale
VN5E016MH-E
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Table 2. Suggested connections for unused and not connected pins
Connection / pin Current sense Output Input CS_DIS
Floating
To ground
Not allowed
Through 1 k Ω resistor
X
Through 22 k Ω resistor
X
Through 10 k Ω resistor
X
Through 10 k Ω resistor
6/34 DocID17114 Rev 5
VN5E016MH-E Electrical specifications
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Figure 3. Current and voltage conventions
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Stressing the device above the rating listed in
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.
Symbol
V
CC
-V
CC
I
GND
I
OUT
-I
OUT
I
IN
I
CSD
Table 3. Absolute maximum ratings
Parameter
DC supply voltage
Reverse DC supply voltage
DC reverse ground pin current
DC output current
Reverse DC output current
DC input current
DC current sense disable input current
V
CSENSE
Current sense maximum voltage (V
CC
> 0)
Value
41
0.3
200
Internally limited
20
-1 to 10
-1 to 10
V
CC
-41
+V
CC
E
MAX
Maximum switching energy (single pulse)
(L = 1.55 mH; R
L
= 0
Ω
; V bat
= 13.5 V; T jstart
= 150 °C;
I
OUT
= I limL
(Typ.))
350 mJ
Unit
A mA mA
V
V
V
V mA
A
DocID17114 Rev 5 7/34
33
Electrical specifications VN5E016MH-E
Symbol
V
ESD
V
ESD
T j
T stg
Table 3. Absolute maximum ratings (continued)
Parameter Value
Electrostatic discharge (human body model: R = 1.5 K Ω;
C = 100 pF)
– Input
– Current sense
– CS_DIS
– Output
– V
CC
Charge device model (CDM-AEC-Q100-011)
Junction operating temperature
Storage temperature
4000
2000
4000
5000
5000
750
-40 to 150
-55 to 150
Unit
V
V
V
V
V
V
°C
°C
Symbol
Table 4. Thermal data
Parameter
R thj-case
R thj-amb
Thermal resistance junction-case
Thermal resistance junction-ambient
Max. value
0.63
69.3
Unit
°C/W
°C/W
8/34 DocID17114 Rev 5
VN5E016MH-E Electrical specifications
Values specified in this section are for 8 V < V
CC
< 28 V, -40 °C < T j
< 150 °C, unless otherwise specified.
Symbol Parameter
V
CC
V
USD
Operating supply voltage
Undervoltage shutdown
V
USDhyst
Undervoltage shutdown hysteresis
Table 5. Power section
Test conditions
R
ON
On-state resistance
I
OUT
= 5 A; T j
= 25 °C
I
OUT
= 5 A; T j
= 150 °C
I
OUT
= 5 A; V
CC
= 5 V; T j
= 25 °C
V
F
V clamp
Output - V
CC
diode voltage
Clamp voltage
-I
OUT
= 5 A; T j
= 150 °C
I
S
I
L(off1)
Supply current
Off-state output current
I
CC
= 20 mA; I
OUT
= 0 A
Off-state; V
CC
= 13 V; T j
= 25 °C;
V
IN
= V
OUT
= V
SENSE
= 0 V
On-state; V
CC
= 13 V; V
IN
= 5 V;
I
OUT
= 0 A
V
IN
= V
OUT
= 0 V; V
CC
= 13 V;
T j
= 25 °C
V
IN
= V
OUT
= 0 V; V
CC
= 13 V;
T j
= 125 °C
Min.
Typ.
Max.
Unit
4.5
13
3.5
28
4.5
V
V
41
0
0
0.5
46
2
1.5
0.01
16
32
20
0.7
52
5
3
3
5
V m
Ω m
Ω m Ω
V
V
µA mA
µA
µA
Table 6. Switching (V
CC
= 13 V, T j
= 25 °C)
Min.
Symbol t t d(on) d(off)
(dV
OUT
/dt) on
(dV
OUT
/dt) off
Turn-on delay time
Turn-off delay time
R
L
= 2.6 Ω
R
L
= 2.6
Ω
Turn-on voltage slope R
L
= 2.6 Ω
Turn-off voltage slope R
L
= 2.6
Ω
W
W
ON
OFF
Switching energy losses at turn-on (t won
)
Switching energy losses at turn-off (t won
)
R
R
L
L
= 2.6
= 2.6
Ω
Ω
(see
(see
)
)
—
—
—
—
—
—
Typ.
15
45
0.2
0.2
1.4
0.8
—
—
—
—
Max.
Unit
µs
µs
V / µs
V
/
µs
— mJ
— mJ
DocID17114 Rev 5 9/34
33
Electrical specifications VN5E016MH-E
Symbol Parameter
V
IL
I
IL
V
IH
I
IH
V
I(hyst)
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
Table 7. Logic inputs
Test conditions
V
IN
= 0.9 V
V
IN
= 2.1 V
V
ICL
Input clamp voltage
I
IN
= 1 mA
I
IN
= -1 mA
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hy st)
CS_DIS low level voltage
Low level CS_DIS current
CS_DIS high level voltage
High level CS_DIS current
CS_DIS hysteresis voltage
V
CSD
= 0.9 V
V
CSD
= 2.1 V
V
CSCL
CS_DIS clamp voltage
I
CSD
= 1 mA
I
CSD
= -1 mA
Min.
Typ.
Max.
Unit
0.9
1
2.1
0.25
5.5
1
2.1
-0.7
10
7
0.9
10
V
V
V
µA
V
µA
V
µA
V
µA
V
0.25
5.5
7
-0.7
V
V
V
Table 8. Protection and diagnostics
(1)
Parameter Test conditions Min.
Symbol Typ.
Max.
Unit
I
I limH limL
Short circuit current
Short circuit current during thermal cycling
V
CC
= 13 V
5 V < V
CC
< 28 V
V
CC
= 13 V;
T
R
< T j
< T
TSD
54 73
18
108
108
A
A
A
T
TSD
T
R
T
RS
Shutdown temperature
Reset temperature
Thermal reset of status
T
150
RS
+ 1 T
135
175
RS
+ 5
200 °C
°C
°C
V
T
HYST
DEMAG
V
ON
Thermal hysteresis
(T
TSD
- T
R
)
Turn-off output voltage clamp
Output voltage drop limitation
I
OUT
= 2 A; V
IN
= 0;
L = 6 mH
I
OUT
= 0.5 A;
T j
= -40 °C to 150 °C
V
CC
7
-41 V
CC
25
-46 V
CC
°C
-52 V
1.
To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
mV
10/34 DocID17114 Rev 5
VN5E016MH-E Electrical specifications
Symbol
Table 9. Current sense (8 V < V
CC
< 18 V)
Parameter Test conditions Min.
Typ.
Max.
Unit dK dK dK
I
SENSE0
V
1
/K
2
/K
3
/K
I
K
K
K
K
0
1
2
3
OL
1
(1)
2
(1)
3
(1)
SENSE
I
I
OUT
OUT
/I
/I
SENSE
SENSE
I
OUT
= 0.25 A; V
SENSE
= 0.5 V;
T j
= -40 °C to 150 °C
I
OUT
= 5 A; V
SENSE
= 0.5 V;
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
I
Current sense ratio drift
OUT
/I
SENSE
I
OUT
= 5 A; V
SENSE
= 0.5 V;
V
CSD
= 0 V; T j
= -40 °C to 150 °C
I
OUT
= 10 A; V
SENSE
= 4 V;
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
I
Current sense ratio drift
I
OUT
=10 A; V
SENSE
= 4 V;
V
CSD
= 0 V; T j
= -40 °C to 150 °C
OUT
/I
SENSE
I
OUT
= 25 A; V
SENSE
= 4 V;
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
Current sense ratio drift
Analog sense leakage current
I
OUT
= 25 A; V
SENSE
= 4 V;
V
CSD
= 0 V; T j
= -40 °C to 150 °C
I
OUT
= 0 A; V
SENSE
V
CSD
= 5 V; V
IN
= 0 V;
= 0 V;
T j
= -40 °C to 150 °C
V
CSD
= 0 V; V
IN
= 5 V;
T j
= -40 °C to 150 °C
I
OUT
= 2 A; V
SENSE
V
CSD
= 5 V; V
IN
= 0 V;
= 5 V;
T j
= -40 °C to 150 °C
Openload ON-state current detection threshold
V
IN
= 5 V; I
SENSE
= 5 µA
Max analog sense output voltage
I
OUT
=18 A; R
SENSE
= 3.9 K Ω
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4358
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4608
4501
- 8
4612
4566
- 4
0
0
5
5
5200
5200
5040
5040
4930
4930
7004
6106
+ 11
5926
5502
+ 8
5367
5168
+ 4
1
2
1
70
%
%
%
µA
µA
µA mA
V
V
SENSEH
(2)
Analog sense output voltage in fault condition
I
SENSEH
(2)
Analog sense output current in fault condition
V
V
CC
CC
= 13V; R
SENSE
= 13 V; V
SENSE
= 3.9 K Ω
= 5 V
8
9
V mA t t
DSENSE1H
DSENSE1L
Delay response time from falling edge of
CS_DIS pin
Delay response time from rising edge of
CS_DIS pin
V
SENSE
< 4 V;
1.5 A < I
OUT
< 25 A;
I
SENSE
= 90 % of I
SENSE max
(see
)
V
SENSE
< 4 V;
1.5 A < I
OUT
< 25 A;
I
SENSE
= 10 % of I
SENSE max
(see
)
50
5
100
20
µs
µs
DocID17114 Rev 5 11/34
33
Electrical specifications VN5E016MH-E
Symbol
Table 9. Current sense (8 V < V
CC
< 18 V) (continued)
Parameter Test conditions t
DSENSE2H
Delay response time from rising edge of
INPUT pin
V
SENSE
< 4 V;
1.5 A < I
OUT
< 25 A;
I
SENSE
= 90 % of I
SENSE max
(see
)
Δ t
DSENSE2H
Delay response time between rising edge of output current and rising edge of current sense
V
SENSE
< 4V;
I
I
SENSE
= 90 % of I
SENSEMAX
;
OUT
= 90 % of I
OUTMAX
;
I
OUTMAX
t
DSENSE2L
Delay response time from falling edge of
INPUT pin
V
SENSE
< 4 V;
1.5 A < I
OUT
< 25 A;
I
SENSE
= 10 % of I
SENSE max
(see
)
1.
Parameter guaranteed by design, it is not tested.
2.
Fault condition includes: power limitation and overtemperature.
Min.
Typ.
Max.
Unit
270 600 µs
280 µs
100 250 µs
Figure 4. Current sense delay characteristics
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Figure 5. Switching characteristics
W
:RQ
W
:RII
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287
GW
RQ
W
U
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GRQ W
GRII
W
I
G9
287
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RII
W
W
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12/34 DocID17114 Rev 5
VN5E016MH-E Electrical specifications
Figure 6. Output voltage drop limitation
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Figure 7. Delay response time between rising edge of output current and rising edge of current sense (CS enabled)
6
,1
' W
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DocID17114 Rev 5 13/34
33
Electrical specifications
Figure 8. I
OUT
/I
SENSE
vs I
OUT
VN5E016MH-E
Figure 9. Maximum current sense ratio drift vs load current
E,,
14/34
1.
Parameter guaranteed by design; it is not tested.
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DocID17114 Rev 5
("1($'5
VN5E016MH-E Electrical specifications
Overload limitation)
Conditions
Normal operation
Overtemperature
Undervoltage
Short circuit to GND (power
Table 10. Truth table
Input
L
H
L
H
L
H
H
H
L
H
L
Output
L
L
L
H
L
L
X
(no power limitation)
Cycling
(power limitation)
L
L
L
Sense (V
CSD
= 0 V)
(1)
0
Nominal
0
V
SENSEH
0
0
Nominal
V
SENSEH
0
V
SENSEH
0 Negative output voltage clamp
1.
If the V
CSD
is high, the SENSE output is at a high impedance, its potential depends on leakage currents and external circuit.
DocID17114 Rev 5 15/34
33
Electrical specifications VN5E016MH-E
ISO 7637-2:
2004(E)
Test pulse
1
2a
3a
3b
Table 11. Electrical transient requirements (part 1)
Test levels
III IV
Number of pulses or test times
Burst cycle / pulse repetition time
-75 V
+37 V
-100 V
+75 V
-100 V
+50 V
-150 V
+100 V
5000 pulses
5000 pulses
1h
1h
0.5 s
0.2 s
90 ms
90 ms
4 -6 V -7 V 1 pulse
5b
(1)
+65 V +87 V 1 pulse
1.
Valid in case of external load dump clamp: 40 V maximum referred to ground.
5 s
5 s
100 ms
100 ms
Delays and impedance
2 ms, 10 Ω
50 µs, 2 Ω
0.1 µs, 50 Ω
0.1µs, 50 Ω
100 ms,
0.01
Ω
400 ms, 2 Ω
Table 12. Electrical transient requirements (part 2)
Test level results
(1)
ISO 7637-2:
2004(E)
Test pulse
III IV
1
2a
3a
3b
4
5b
(2)
C
C
C
C
C
C
1.
The above test levels must be considered referred to V
CC
= 13.5 V except for pulse 5b
2.
Valid in case of external load dump clamp: 40 V maximum referred to ground.
C
C
C
C
C
C
Class
C
E
Table 13. Electrical transient requirements (part 3)
Contents
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
16/34 DocID17114 Rev 5
VN5E016MH-E
2.4 Waveforms
Electrical specifications
Figure 10. Normal operation
Normal operation
INPUT
I
OUT
V
SENSE
V
CS_DIS
Nominal load Nominal load
Figure 11. Overload or short to GND
Overload or Short to GND
INPUT
I
LimH
>
I
OUT
Power Limitation
I
LimL
>
Thermal cycling
V
SENSE
V
CS_DIS
DocID17114 Rev 5 17/34
33
Electrical specifications VN5E016MH-E
Figure 12. Intermittent overload
Intermittent Overload
INPUT
I
LimH
>
I
OUT
V
SENSEH
>
V
SENSE
V
CS_DIS
Overload
I
LimL
>
Nominal load
Figure 13. T
J
evolution in overload or short to GND
T
J
evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients T
TSD
T
R
T
J
I
LimH
>
T
J_START
Power Limitation
T
HYST
< I
LimL
I
OUT
18/34 DocID17114 Rev 5
VN5E016MH-E Electrical specifications
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Figure 14. Off-state output current
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Figure 15. High level input current
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Figure 17. Input low level
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Figure 18. Input high level
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Figure 19. Input hysteresis voltage
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DocID17114 Rev 5
7F>&@
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19/34
33
Electrical specifications VN5E016MH-E
Figure 20. On-state resistance vs T case
5RQ>P2KP@
Figure 21. On-state resistance vs V
CC
5RQ>P2KP@
,RXW $
9FF 9
7F &
7F &
7F &
7F &
9XVG>9@
7F>&@
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Figure 22. Undervoltage shutdown
G9RXWGW2Q>9PV@
9FF>9@
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Figure 23. Turn-on voltage slope
9FF 9
5O ȍ
,OLPK>$@
7F>&@
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Figure 24. I
LIMH
vs T case
7F>&@
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Figure 25. Turn-off voltage slope
G9RXWGW2II>9PV@
9FF 9
9FF 9
5O ȍ
20/34
7F>&@
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DocID17114 Rev 5
7F>&@
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VN5E016MH-E
Figure 26. CS_DIS high level voltage
9FVGK>9@
Electrical specifications
Figure 27. CS_DIS clamp voltage
9FVGFO>9@
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7F>&@
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Figure 28. CS_DIS low level voltage
9FVGO>9@
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7F>&@
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DocID17114 Rev 5 21/34
33
Application information VN5E016MH-E
Figure 29. Application schematic
9
6
&&
P &
5
SURW
5
SURW
5
SURW
5
&6B',6
,,1387
*1'
9
*1'
5
*1'
'
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OG
&
H[W
3.1
3.1.1
GND protection network against reverse battery
Solution 1: resistor in the ground line (R
GND
only)
This can be used with any type of load.
The following is an indication on how to set the dimension of R
GND resistor.
1) R
GND
≤ 600 mV / (I
S(on)max
).
2) R
GND
≥ (− V
CC
) / (-I
GND
) where -I
GND
is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet.
Power dissipation in R
GND
(when V
CC
< 0: during reverse battery situations) is:
Equation 1
P
D
= (-V
CC
)
2
/R
GND
This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
R
GND produces a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output values. This shift varies depending on how many devices are ON in the case of several high side drivers sharing the same R
GND
.
22/34 DocID17114 Rev 5
("1($'5
VN5E016MH-E
3.1.2
Application information
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below).
Solution 2: a diode (D
GND
) in the ground line
A resistor (R
GND
= 1 k
Ω) should be inserted in parallel to D
GND inductive load.
if the device drives an
This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network produces a shift (
≈
600 mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift not varies if more than one HSD shares the same diode/resistor network.
3.2 Load dump protection
D ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line that are greater than the ones shown in the ISO T/R 7637/1 table.
3.3 MCU I/Os protection
If a ground protection network is used and negative transients are present on the V
CC
line, the control pins are pulled negative. ST suggests to insert a resistor (R prot
) in line to prevent the MCU I/O pins from latching-up.
The value of these resistors is a compromise between the leakage current of MCU and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of MCU
I/Os.
Equation 2
-V
CCpeak
/I latchup
≤
R prot
≤
(V
OH
μ
C
-V
IH
-V
GND
) / I
IHmax
Calculation example:
For V
CCpeak
= - 100 V and I latchup
≥
20 mA; V
OH
μ
C
≥
4.5 V
5 k Ω ≤ R prot
≤ 65 k Ω .
Recommended values: R prot
=10 k Ω, C
EXT
=10 nF
.
DocID17114 Rev 5 23/34
33
Application information
3.4
VN5E016MH-E
Current sense and diagnostic
The current sense pin performs a double function (see
Figure 30: Current sense and diagnostic
):
• Current mirror of the load current in normal operation, delivering a current proportional to the load according to a known ratio K
X
.
The current I
SENSE
can be easily converted into a voltage V
SENSE
by means of an external resistor R
SENSE
. Linearity between I
OUT
and V
SENSE
is ensured up to 5V minimum (see parameter V
SENSE
in Table 9: Current sense (8 V < VCC < 18 V)
). The current sense accuracy depends on the output current (refer to current sense electrical characteristics
Table 9: Current sense (8 V < VCC < 18 V)
).
•
Diagnostic flag in fault conditions, delivering a fixed voltage V
SENSEH
up to a maximum current I
SENSEH
in case of the following fault conditions (refer to
– Power limitation activation
– Overtemperature
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and ADC line among different devices.
Figure 30. Current sense and diagnostic
9
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287
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;
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6(16(+
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5
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9
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/RDG
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24/34 DocID17114 Rev 5
VN5E016MH-E
3.5 Maximum demagnetization energy (V
CC
Application information
= 13.5 V)
Figure 31. Maximum turn-off current versus inductance
100
B
A
C
10
1
0,1 1 L (mH) 10 100
A: T jstart
= 150°C single pulse
B: T jstart
= 100°C repetitive pulse
C: T jstart
= 125°C repetitive pulse
V
IN
, I
L
Demagnetization Demagnetization Demagnetization
1.
Values are generated with R
L
= 0
Ω
. In case of repetitive pulses, T jstart
(at the beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
t
DocID17114 Rev 5 25/34
33
Package and PC board thermal data
4 Package and PC board thermal data
Figure 32. PC board
VN5E016MH-E
1.
Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,
PCB thickness = 1.8 mm, Cu thickness = 70 µm, Copper areas: from minimum pad lay-out to 8 cm
2
).
Figure 33. R thj-amb
vs PCB copper area in open box free air condition
RTHjamb
75
70
65
60
55
50
45
40
35
30
0 2 4 6
RTHjamb
8 10
26/34 DocID17114 Rev 5
VN5E016MH-E Package and PC board thermal data
Figure 34. HPak thermal impedance junction ambient single pulse
Equation 3: pulse calculation formula:
Z
T H δ where
= R
TH
⋅ δ
+ Z
T Htp
(
1 –
δ )
δ = t p
⁄ T
Figure 35. Thermal fitting model of a single channel HSD in HPak
1.
The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
DocID17114 Rev 5 27/34
33
Package and PC board thermal data
Area/island (cm
2
)
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
Table 14. Thermal parameter
Footprint
0.0001
0.002
0.05
0.4
0.8
3
0.1
0.2
2
8
28
31
4
-
-
1.4
6
-
-
-
-
-
-
22
25
VN5E016MH-E
8
-
-
3
9
-
-
-
-
-
-
12
16
28/34 DocID17114 Rev 5
VN5E016MH-E
5
Package and packing information
Package and packing information
5.1 ECOPACK
®
packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
Figure 36. KPak package dimension
DocID17114 Rev 5 29/34
33
Package and packing information
Ref. dim b b4 c c2
D
A
A1
A2
D1
E
E1 e e1 e2 e3
H
L
(L1)
L2
L4
R
V2
Table 15. HPak mechanical data
Data book mm
Nom.
Min.
2.20
0.90
0.03
0.45
5.20
0.45
0.48
6.00
5.10
6.40
5.20
0.85
1.60
3.30
5.00
9.35
1
2.80
0.80
0.60
0.20
0°
VN5E016MH-E
1.00
8°
Max.
2.40
1.10
0.23
0.60
5.40
0.60
0.60
6.20
6.60
1.80
3.50
5.20
10.10
30/34 DocID17114 Rev 5
VN5E016MH-E
5.3
Package and packing information
HPak packing information
The devices can be packed in tube or tape and reel shipments (see
).
Figure 37. HPak tube shipment (no suffix)
A
C
Base q.ty
Bulk q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
75
3000
532
6
21.3
0.6
All dimensions are in mm.
B
Figure 38. HPak tape and reel (suffix “TR”)
REEL DIMENSIONS
All dimensions are in mm.
Base q.ty
Bulk q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
16.4
60
22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape hole spacing
Component spacing
Hole diameter
Hole diameter
Hole position
Compartment depth
Hole spacing
W 16
P0 (± 0.1) 4
P 8
D (+ 0.1/-0) 1.5
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
1.5
7.5
2.75
2
All dimensions are in mm.
End
Top cover tape
No components
500mm min
Components No components
Empty components pockets saled with cover tape.
500mm min
User direction of feed
Start
DocID17114 Rev 5 31/34
33
Order codes VN5E016MH-E
Package
7 pins H-pack
Table 16. Device summary
Order codes
Tube
Root part number 1
Tape and reel
VN5E016MHTR-E
32/34 DocID17114 Rev 5
VN5E016MH-E Revision history
Date
29-Jun-2010
30-Jun-2010
29-Jul-2010
04-Aug-2010
19-Feb-2014
07-May-2014
Revision
Table 17. Document revision history
Changes
5
6
1
2
3
4
Initial release.
Changed status from target specification to preliminary data.
Table 9: Current sense (8 V < VCC < 18 V)
:
– Updated K1 maximun value for T j
= 25 °C...150 °C
Table 9: Current sense (8 V < VCC < 18 V)
:
– Updated K1, K2 and K3 typical values for T j
= -40 °C...150 °C
– Updated dK
1
/K
1 test conditions
Updated Figure 8: IOUT/ISENSE vs IOUT .
Changed document status from “Preliminary data” to “Production data”
Updated Figure 2: Configuration diagram (top view) not in scale
DocID17114 Rev 5 33/34
33
VN5E016MH-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
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DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
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Information in this document supersedes and replaces all information previously supplied.
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34/34 DocID17114 Rev 5
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