STMicroelectronics VN5772AK-E Datasheet
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VN5772AK-E
Features
Quad smart power solid-state relay for complete H-bridge configurations
Datasheet
-
production data
Applications
DC motor driving in full or half-bridge configuration
All types of resistive, inductive and capacitive loads
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Type R
DS(on)
VN5772AK-E 100 m Ω
(1)
I
OUT
18 A
(2)
V
CC
36 V
1. Total resistance of one side in bridge configuration.
2. Typical current limitation value.
General features
– Inrush current management by active power limitation on the high-side switches
– Very low standby current
– Very low electromagnetic susceptibility
– Compliant with European directive
2002/95/EC
Protections
– High-side drivers under voltage shutdown
– Overvoltage clamp
– Output current limitation
– High and low-side overtemperature shutdown
– Short-circuit protection
– ESD protection
Diagnostic functions
– Proportional load current sense
– Thermal shutdown indication on both the high and low-side switches
Description
The VN5772AK-E is a device formed by three monolithic chips housed in a standard SO-28 package: a double high-side and two low-side switches. The double high-side is made using
STMicroelectronics ® VIPower ® M0-5 technology, while the low-side switches are fully protected
VIPower M0-5 OMNIFET III. This device is suitable to drive a DC motor in a bridge configuration as well as to be used as a quad switch for any low-voltage application. The dual high-side switches integrate built-in non latching thermal shutdown with thermal hysteresis. An output current limiter protects the device in overload conditions. In the case of long overload duration, the device limits the dissipated power to a safe level-up to thermal shutdown intervention.
An analog current sense pin delivers a current proportional to the load current (according to a known ratio) and indicates overtemperature shutdown of the relevant high-side switch through a voltage flag.The low-side switches have built-in non latching thermal shutdown with thermal hysteresis, linear current limitation and overvoltage clamping. In case of long overload duration, the low-side switches limit the dissipated power to a safe level up to the thermal shutdown intervention. Fault feedback for overtemperature shutdown of the low-side switch is indicated by the relevant status pin.
Table 1. Device summary
Order codes
Package
SO-28
Tube Tape and reel
VN5772AK-E VN5772AKTR-E
March 2015
This is information on a product in full production.
DocID16084 Rev 7 1/34 www.st.com
Contents
Contents
VN5772AK-E
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics for dual high-side switches . . . . . . . . . . . . . . . . 9
Electrical characteristics curves for dual high-side switches . . . . . . . . . . 15
Electrical characteristics for low-side switch . . . . . . . . . . . . . . . . . . . . . . 17
Electrical characteristics curves for low-side switch . . . . . . . . . . . . . . . . . 19
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Maximum demagnetization energy (V
CC
= 13.5 V) . . . . . . . . . . . . . . . . . 24
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SO-28 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/34 DocID16084 Rev 7
VN5772AK-E
List of tables
List of tables
= 25° C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Protection and diagnostics (-40 °C < Tj < 150 °C, unless otherwise specified) . . . . . . . . . 18
Thermal calculations in clockwise and anti-clockwise operation in steady-state mode . . . 26
DocID16084 Rev 7 3/34
3
List of figures
List of figures
VN5772AK-E
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
vs T case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 26
4/34 DocID16084 Rev 7
VN5772AK-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1. Block diagram
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Block diagram and pin description VN5772AK-E
N o pin Name
Table 2. Pin description
Function
1, 3, 25, 28 DRAIN 3
2 INPUT 3
4
11
STATUS 3
STATUS 4
Drain of switch 3 (low-side switches)
Input of switch 3 (low-side switch)
Status of switch 3 (low-side switch)
Status of switch 4 (low-side switch)
5, 10, 19, 24
6
8
7
V
CC
GND
INPUT 1
INPUT 2
Drain of switches 1 and 2 (high-side switches) and power supply voltage
Ground of switches 1 and 2 (high-side switches)
Input of switch 1 (high-side switch)
9 C.SENSE
Input of switch 2 (high-side switch)
Analog current sense pin, delivers a current proportional to the load current
Drain of switch 4 (low-side switches) 12, 14, 15, 18 DRAIN 4
13
16, 17
INPUT 4 Input of switch 4 (low-side switch)
SOURCE 4 Source of switch 4 (low-side switches)
22, 23
20, 21
26, 27
SOURCE 2 Source of switch 2 (high-side switches)
SOURCE 1 Source of switch 1 (high-side switches)
SOURCE 3 Source of switch 3 (low-side switches)
Figure 2. Configuration diagram (top view)
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6/34 DocID16084 Rev 7
VN5772AK-E Electrical specification
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to the conditions in the tables below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality document.
Symbol
Table 3. Dual high-side switch
Parameter
V
CC
-V
CC
- I
GND
I
OUT
- I
OUT
I
IN
-I
CSENSE
DC supply voltage
Reverse DC supply voltage
DC reverse ground pin current
DC output current
Reverse DC output current
DC input current
DC reverse C.SENSE pin current
V
CSENSE
Current sense maximum voltage
E
V
V
MAX
ESD
ESD
T j
T stg
Maximum switching energy (single pulse)
I
3 mH; R
OUT
= I
L
= Ω ; V bat limL
(Typ.) ) jstart
Electrostatic discharge (human body model: R = 1.5 K Ω
C = 100 pF)
– Input
– Current sense
– SOURCE n
/DRAIN n
– V
CC
Charge device model (CDM-AEC-Q100-011)
Junction operating temperature
Storage temperature
Value Unit
41
0.3
200
V
V mA
Internally limited A
-12 A
-1 to 10
200
V
CC
- 41
+V
CC mA mA
V
V
104
4000
2000
5000
5000
750
-40 to 150
-55 to 150 mJ
V
V
V
V
V
°C
°C
DocID16084 Rev 7 7/34
33
Electrical specification VN5772AK-E
Symbol
V
DSn
I
INn
I
Dn
-I
Dn
I
STAT
V
ESD1
V
ESD2
T j
T stg
Table 4. Low side switch
Parameter
Drain-source voltage (V
INn
= 0 V)
Input current
Drain current
Reverse DC output current
DC status current
Electrostatic discharge (R = 1.5 K Ω , C = 100 pF):
– Drain
– Supply, status, input
Electrostatic discharge on output pins only
330 Ω , C
Operating junction-temperature
Storage temperature
Value
Internally clamped
-1 to 10
Internally limited
-4
-1 to 10
5000
4000
2000
-40 to 150
-55 to 150
V
°C
°C
Unit
V mA
A
A mA
V
Symbol
Table 5. Thermal data
Parameter
R thj-leadHS
R thj-leadLS
Thermal resistance junction-case (high-side switch)
Thermal resistance junction-case (low-side switch)
R thj-amb
Thermal resistance junction-ambient (high-side switch)
Thermal resistance junction-ambient (low-side switch)
Max. value Unit
22
21
47
57
°C/W
°C/W
°C/W
°C/W
8/34 DocID16084 Rev 7
VN5772AK-E Electrical specification
2.3.1 Electrical characteristics for dual high-side switches
Values specified in this section are for 8 otherwise specified (for each channel).
CC
°C < j
150 °C, unless
Symbol Parameter
Table 6. Power section
Test conditions
V
V
CC
USD
Operating supply voltage
Undervoltage shutdown
V
USDhyst
Undervoltage shutdown hysteresis
V
I
R clamp
I
L(off)
V
ON
S
F
On-state resistance
Voltage clamp
Supply current
Off-state output current
(2)
I
OUT
= 3 A; T j
= 25 °C
I
OUT
= 3 A; T j
= 150 °C
I
OUT
= 3 A; V
CC
= 5 V; T j
= 25 °C
I
S
= 20 mA
Off-state: V
CC
V
IN
V
OUT
= V
= 13 V; T j
SENSE
= 25 °C,
= 0 V
On-state: V
CC
I
OUT
V
IN
T j
V
IN
T j
OUT
OUT
CC
CC
IN
Output - V
CC
diode voltage
(2)
I
OUT
= 3A, T j
= 150 °C
1. PowerMOS leakage included.
2. For each channel.
Min.
Typ.
Max.
Unit
4.5
41
0
0
13
3.5
0.5
46
2
(1)
3
0.01
36
4.5
50
100
65
52
5
(1)
6
3
5
0.7
V
V
V m Ω
V
μ A mA
μ A
V
Symbol t d(on) t d(off)
Table 7. Switching (V
CC
= 13 V)
Parameter
Turn-on delay time
Turn-off delay time
Test conditions
(dV
OUT
/dt) on
Turn-on voltage slope R
L
= 6.5 Ω
Min.
R
L
= 6.5 Ω
) —
R
L
= 6.5 Ω
) —
—
(dV
OUT
/dt) off
Turn-off voltage slope R
L
= 6.5
Ω —
Typ.
25
20
See
See
Max. Unit
—
—
μ
μ s s
— V μ s
— V μ s
DocID16084 Rev 7 9/34
33
Electrical specification
Symbol
W
ON
W
OFF
Table 7. Switching (V
CC
= 13 V) (continued)
Parameter Test conditions Min.
Typ.
Switching energy losses during t won
Switching energy losses during t woff
R
L
= 6.5 Ω
) —
R
L
= 6.5 Ω
) —
0.24
0.2
VN5772AK-E
Max. Unit
— mJ
— mJ
Symbol
V
IL
I
IL
V
IH
I
IH
V
I(hyst)
V
ICL
Parameter
Table 8. Logic inputs
Test conditions
Low-level input voltage
Low-level input current V
IN
= 0.9 V
High-level input voltage
High-level input current V
IN
= 2.1 V
Input voltage hysteresis
Input voltage clamp
I
IN
= 1 mA
I
IN
= -1 mA
Min.
Typ.
Max.
Unit
1
2.1
0.25
5.5
0.9
10
7
V
μ A
V
μ A
V
V
-0.7
Symbol Parameter
Table 9. Protection and diagnostics
Test conditions
(1)
Min.
Typ.
Max.
Unit
I
T
I limH limL
TSD
DC short-circuit current
V
CC
= 13 V
CC
V
Short-circuit current during thermal cycling
V
CC
= 13 V; T
R
< T j
< T
TSD
Shutdown temperature
Reset temperature T
R
T
T
RS
HYST
V
DEMAG
Thermal reset of
STATUS
Thermal hysteresis
(T
TSD
- T
R
)
Turn-off output voltage clamp
I
OUT
= 2 A; V
IN
T
= 0; L = 6 mH V
12
150
RS
+ 1 T
135
CC
18
RS
7
175
7
- 41 V
CC
+ 5
24
24
200
A
A
A
°C
°C
°C
°C
- 46 V
CC
- 52 V
V
ON
Output voltage drop limitation
I
OUT
T j
= 0.1 A,
= -40 °C to 150 °C
25 mV
1. To ensure long-term reliability under heavy overload or short-circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
10/34 DocID16084 Rev 7
VN5772AK-E Electrical specification
Symbol
Table 10. Current sense (8 V < V
CC
< 16 V)
Parameter Test conditions Min.
Typ. Max. Unit
I
V
V
K
K
K
K
0
1
2
3
SENSE
SENSE0
SENSEH
I
I
I
I
OUT
OUT
OUT
OUT
/ I
/ I
/ I
/ I
SENSE
SENSE
SENSE
SENSE
I
OUT
= 0.35 A; V
SENSE
= 0.5 V;
T j
= -40 °C to 50 °C
I
OUT
= 1 A; V
SENSE
= 0.5 V;
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
I
OUT
= 2 A; V
SENSE
= 4 V;
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
I
OUT
= 6 A; V
SENSE
= 4 V;
T j
= -40 °C to 150 °C
T j
= 25 °C to 150 °C
1430 2140 2890
1470
1570
1740
1790
1890
1890
2020
2020
2020
2020
2010
2010
2610
2470
2320
2250
2140
2140
Max analog sense output voltage
I
OUT
= 4 A;
Analog sense leakage current
I
OUT
= 0 A,
V
SENSE
= 0 V,
V
IN
= 0 V,
T j
= -40 °C to 150 °C
I
OUT
= 0 A,
V
SENSE
= 0 V,
V
IN
= 5 V,
T j
= -40 °C to 150 °C
Analog sense output voltage in overtemperature condition
V
CC
= 13 V, R
SENSE
= 10 K Ω
5
0
0
9
1
2 t
DSENSE2H t
I
SENSEH
DSENSE2L
Analog sense output current in overtemperature condition
V
CC
= 13 V, V
SENSE
= 5 V
Delay response time from rising edge of INPUT pin
Delay response time from falling edge of INPUT pin
V
SENSE
< 4 V,
0.5 A < I
OUT
< 4 A,
I
SENSE
= 90% of I
SENSE max
)
V
SENSE
< 4 V,
0.5 A < I
OUT
< 4 A,
I
SENSE
= 10% of I
SENSE max
)
8
80
100
250
250
μ
V
A
V mA
μ
μ s s
DocID16084 Rev 7 11/34
33
Electrical specification
Figure 3. Current sense delay characteristics
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Figure 4. Switching time waveforms
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VN5772AK-E
Conditions
Normal operation
Overtemperature
Undervoltage
Short-circuit to GND
(R
SC
10 m Ω )
Short-circuit to V
CC
Negative output voltage clamp
Table 11. Truth table high-side driver
Input Output
L
H
H
L
H
L
H
L
H
L
H
L
L
L
H
H
L
L
L
L
L
H
L L
Electrical specification
Sense
0
Nominal
0
V
SENSEH
0
0
0
0 if T j
< T
TSD
V
SENSEH
if T j
> T
TSD
0
< Nominal
0
DocID16084 Rev 7 13/34
33
Electrical specification
Note:
VN5772AK-E
ISO 7637-2:
2004(E) test pulse
1
2a
3a
3b
4
5b
(2)
Table 12. Electrical transient requirements (part 1/3)
III
Test levels
(1)
-75V
+37V
-100V
+75V
-6V
+65V
IV
-100V
+50V
-150V
+100V
-7V
+87V
Number of pulses or test times
5000 pulses
5000 pulses
1h
1h
1 pulse
1 pulse
Burst cycle / pulse repetition time
0.5s
0.2s
90ms
90ms
5s
5s
100ms
100ms
1. The above test levels must be considered referred to V
CC
13.5
V except for pulse 5b.
2. Valid in case of external load dump clamp: 40 V maximum referred to ground.
Delays and
Impedance
2 ms, 10 Ω
50 μ s, 2 Ω
0.1
μ s, 50 Ω
0.1
μ s, 50 Ω
100ms, 0.01
Ω
400ms, 2 Ω
Valid for HSD and H-bridge configuration.
ISO 7637-2:
2004E test pulse
Table 13. Electrical transient requirements (part 2/3)
III
Test level results
(1)
VI
1
2a
3a
3b
4
5b
(2)
C
C
C
C
C
C
1. The above test levels must be considered referred to V
CC
13.5
V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
C
C
C
C
C
C
Class
C
E
Table 14. Electrical transient requirements (part 3/3)
Contents
All functions of the device performed as designed after exposure to disturbance.
One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
14/34 DocID16084 Rev 7
VN5772AK-E Electrical specification
2.4 Electrical characteristics curves for dual high-side switches
Figure 6. Off-state output current
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Figure 12. On-state resistance vs T case
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Figure 13. On-state resistance vs V
CC
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2.5
Electrical specification
Electrical characteristics for low-side switch
Values specified in this section are for -40 °C < T j
< 150 °C, unless otherwise specified
Symbol
V
CLAMP
V
CLTH
I
DSS
Parameter
Table 15. PowerMOS section - off
Test conditions
Drain-source voltage clamp
Drain-source threshold voltage clamp
V
IN
= 0 V; I
D
= 2 A
V
IN
= 0 V; I
D
= 2 mA
Zero input voltage
Drain current
(V
IN
V
DS
= 13 V; V
IN
= 0 V; T j
= 25°C
V
DS
= 13 V; V
IN
= 0 V; T j
= 125°C
Min.
Typ.
Max.
Unit
41
36
0
0
46 52
3
5
V
V
μ A
Symbol
R
DS(on)
Parameter
Static drain-source on-resistance
Table 16. PowerMOS section - on
Test conditions Min.
Typ.
Max.
Unit
V
IN
= 5 V; I
D
= 2 A; T j
= 25 °C
V
IN
= 5 V; I
D
= 2 A; T j
= 150 °C
—
—
—
—
50 m Ω
100 m Ω
Symbol t d(on) t d(off) t r t f
W
ON
W
OFF
Table 17. Switching (T j
= 25° C, unless otherwise specified)
Parameter Test conditions Min.
Typ.
Turn-on delay time
Turn-off delay time
Turn-on voltage slope
Turn-off voltage slope
Switching energy losses during t won
Switching energy losses during t woff
R
L
= 6.5 Ω V
CC
= 13 V
R
L
= 6.5 Ω V
CC
= 13 V
R
L
= 6.5 Ω V
CC
= 13 V
R
L
= 6.5 Ω V
CC
= 13 V
R
L
= 6.5 Ω V
CC
= 13 V
R
L
= 6.5 Ω V
CC
= 13 V
—
—
—
—
—
—
6
20
10
10
0.04
0.06
Max. Unit
—
—
—
—
μ s
μ s
μ s
μ s
—
— mJ mJ
Symbol Parameter
Table 18. Source drain diode
Test conditions
V
SD
(1)
Forward on voltage I
SD
= 2 A; V
1. Pulsed: Pulse duration = 300 s, duty cycle 1.5%
IN
= 0 V
Min.
Typ.
Max.
Unit
— 0.8
— V
Symbol
I
ISS
Parameter
Table 19. Input section
Test conditions
Supply current from input pin
On-state: V
IN
= 5 V;
V
DS
Min.
Typ. Max. Unit
30 110 μ A
DocID16084 Rev 7 17/34
33
Electrical specification VN5772AK-E
Symbol
V
ICL
V
INTH
Table 19. Input section (continued)
Parameter Test conditions
Input voltage clamp
Input voltage threshold
I
S
= 1 mA
I
S
= -1 mA
V
DS
= V
IN
; I
D
= 1 mA
Min.
Typ. Max. Unit
5.5
7
V
-0.7
1 3.5
V
Symbol
V
STAT
I
LSTAT
C
STAT
V
STCL
Parameter
Table 20. STATUS pin
Test conditions
Status low output voltage
I
STAT
= 1 mA
Status leakage current
STATUS pin input capacitance
Status voltage clamp
Normal operation,
V
STAT
= 5 V
Normal operation,
V
STAT
= 5 V
I
STAT
= 1 mA
I
STAT
= -1 mA
Min.
Typ.
Max.
Unit
0.5
V
10 μ A
5.5
-0.7
100
7 pF
V
Table 21. Protection and diagnostics (-40 °C < T j
< 150 °C, unless otherwise specified)
Symbol Parameter Test conditions Min.
Typ.
Max.
Unit
19 27 38 A I
I limH limL
DC short-circuit current
Short-circuit current during thermal cycling
V
V
DS
DS
= 13 V, V
= 13 V, T
IN
R
= 5 V
< T j
< T t dlim
Step response current limit V
IN
= 5 V, V
DS
= 13 V
T
TSD shutdown
T
R reset
TSD
11
20
150 175 200
135
A
μ s
°C
°C
Conditions
Normal operation
Overtemperature
Table 22. Truth table low-side driver
Input
L
H
L
H
Drain
H
H
H
L
Status
H
L
H
H
18/34 DocID16084 Rev 7
VN5772AK-E Electrical specification
2.6 Electrical characteristics curves for low-side switch
Figure 18. Source diode forward characteristics Figure 19. Static drain source on-resistance vs drain current (3 pin)
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Electrical specification
Figure 24. Normalized on-resistance vs temperature
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20/34 DocID16084 Rev 7
VN5772AK-E Application information
Figure 26. Typical application schematic
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Mostly motor bridge drivers use a reverse battery protection diode (D) inside supply rail.
This diode prevents a reverse current flow back to Vbatt in case the bridge gets disabled via the logic inputs while motor inductance still carries energy. In order to prevent a hazardous overvoltage at circuit supply terminal (V
CC
), a blocking capacitor (C) is needed to limit the voltage overshoot. As basic orientation, 50 μ F per 1 A load current is recommended. In alternative, also a Zener protection (Z) is suitable.
Even if a reverse polarity diode is not present, it is recommended to use a capacitor or zener at V
CC
because a similar problem appears in case supply terminal of the module has intermittent electrical contact to the battery or gets disconnected while motor is operating.
DocID16084 Rev 7 21/34
33
Application information
Figure 27. Recommended motor operation
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Figure 28. Waveforms (high-side switches)
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DocID16084 Rev 7 23/34
33
Application information
3.1 Maximum demagnetization energy (V
,$
CC
Figure 29. Maximum turn-off current vs load inductance
+6'
= 13.5 V)
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VN5772AK-E
4
Package and PC board thermal data
Package and PC board thermal data
4.1 SO-28 thermal data
Figure 30. SO-28 PC board
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DocID16084 Rev 7 25/34
33
Package and PC board thermal data VN5772AK-E
Figure 32. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition
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Figure 31 . For more detailed information see
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Table 23. Thermal calculations in clockwise and anti-clockwise operation in steadystate mode
HS
1
HS
2
LS
3
LS
4
On Off Off On
Off On On Off
T jHS12
P dHS1 x R thHS
+ P dLS4 x
R thHSLS
+ T amb
P dHS2 x R thHS
+ P dLS3 x
R thHSLS
+ T amb
T jLS3
P dHS1 x R thHSLS
P dLS4 x R thLSLS
+
+ T amb
P dHS2 x R thHSLS
P dLS3 x R thLS
+
+ T amb
T jLS4
P dHS1 x R thHSLS
+
P dLS4 x R thLS
+ T amb
P dHS2 x R thHSLS
+
P dLS3 x R thLSLS
+ T amb
Parameter
Table 24. Thermal resistances definitions
Definition
(1)
R
R
R
R thHS thLS
= R
= R thHSLS thLSLS thHS1 thLS3
= R
= R
= R
= R thHS2 thLS4 thHS1LS4 thLS3LS4
= R thHS2LS3
1. Values dependent on PCB heatsink area.
High-side chip thermal resistance junction-to-ambient (HS
1 or HS
2
in on-state)
Low-side chip thermal resistance junction-to-ambient
Mutual thermal resistance junction-to-ambient between highside and low-side chips
Mutual thermal resistance junction-to-ambient between lowside chips
Table 25. Single pulse thermal impedance definitions
Parameter Definition
(1)
Z thHS
Z
Z
Z thLS
= Z thHSLS thLSLS thLS3
= Z
= Z
= Z thLS4 thHS12LS3 thLS3LS4
= Z thHS12LS4
1. Values dependent on PCB heatsink area.
High-side chip thermal impedance junction-to-ambient
Low-side chip thermal impedance junction-to-ambient
Mutual thermal impedance junction-to-ambient between high-side and low-side chips
Mutual thermal impedance junction-to-ambient between lowside chips
DocID16084 Rev 7
VN5772AK-E Package and PC board thermal data
Parameter
Table 26. Thermal calculations in transient mode
Definition
(1)
T jHS12
T jLS3
T jLS4
Z thHS
Z
Z
x P thHSLS thHSLS dHS12
+ Z
x P dHS12
x P dHS12 thHSLS
+ Z thLS
+ Z
x (P dLS3
x P dLS3 thLSLS
+ P dLS4
+ Z thLSLS
x P dLS3
) + T
x P
+ Z thLS amb dLS4
+ T
x P dLS4
1. Calculation is valid in any dynamic operating condition. Pd values set by user.
amb
+ T amb
Figure 33. SO-28 HSD thermal impedance junction-ambient single pulse
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DocID16084 Rev 7 27/34
33
Package and PC board thermal data VN5772AK-E
Figure 34. SO-28 LSD thermal impedance junction-ambient single pulse
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Equation 1: Pulse Calculation Formula
ZTH
= RTH
+ where = t
P
/T
–
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28/34 DocID16084 Rev 7
VN5772AK-E Package and PC board thermal data
Figure 35. Thermal fitting model of an H-bridge in SO-28
Area/island (cm
2
)
Table 27. Thermal parameters
FP 4
(1)
R1 =
R2
C2 =
=
R14
R16
C6
C8
C9
=
=
=
R6
R3 (°C/W)
R4 (°C/W)
R8 =
R9 =
C1 =
=
=
=
R18 (°C/W)
C3 (W·s/°C)
C4 (W·s/°C)
40
54
120
200
1.5
5.5
36
50
400
0.00025
0.04
0.2
2.2
0.00075
0.15
1.6
34
43
38
52
350
1. A blank space means that the value is the same as the previous one
3
1.8
DocID16084 Rev 7
16
32
36
36
50
300
4
2
29/34
33
Package information VN5772AK-E
5.1
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
SO-28 package mechanical data
Figure 36. SO-28 package outline
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A
A1
B
C
D
(1)
H
Table 28. SO-28 mechanical data
Dimensions
Millimeters
Min.
2.35
0.10
0.33
0.23
17.70
Typ.
DocID16084 Rev 7
Max.
2.65
0.30
0.51
0.32
18.10
VN5772AK-E
Table 28. SO-28 mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
L k ddd
H h
E e
7.40
10.0
0.25
0.40
0°
1.27
1. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.15mm per side.
Package information
Max.
7.60
10.65
0.75
1.27
8°
0.10
DocID16084 Rev 7 31/34
33
Package information VN5772AK-E
&
Figure 37. SO-28 tube shipment (no suffix)
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32/34 DocID16084 Rev 7
VN5772AK-E Revision history
Date
30-Jul-2009
10-Sep-2009
14-Jan-2010
13-Jul-2011
02-Nov-2011
19-Sep-2013
02-Mar-2015
Revision
Table 29. Document revision history
Changes
1
2
3
4
5
6
7
Initial release.
Updated following figures:
–
Figure 29: Maximum turn-off current vs load inductance
–
Figure 32: Auto and mutual Rthj-amb vs PCB copper area in open box free air condition
–
33: SO-28 HSD thermal impedance junction-ambient single
–
Updated
.
Updated
Figure 26: Typical application schematic .
Updated Features list
Updated
Figure 35: Thermal fitting model of an H-bridge in SO-28
Updated
Table 17: Switching (Tj = 25° C, unless otherwise specified) :
– Changed (dV
OUT
/dt) on to t r
– Changed (dV
OUT
/dt) off to t f
Added following tables:
–
Table 12: Electrical transient requirements (part 1/3)
–
Table 13: Electrical transient requirements (part 2/3)
–
Table 14: Electrical transient requirements (part 3/3)
Updated Disclaimer.
Updated:
–
Section 5.1: SO-28 package mechanical data ;
– Tape dimensions in
.
38: SO-28 tape and reel shipment
DocID16084 Rev 7 33/34
33
VN5772AK-E
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