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RHFAHC00
RHFAHC00
Datasheet
Rad-Hard, quad high speed NAND gate
Features
• 1.8 V to 3.3 V nominal supply
• 3.6 V max. operating
• 4.8 V AMR
• Very high speed: propagation delay of 3 ns maximum guaranteed
• Pure CMOS process
• CMOS output
• Ultra low power
• 300 krad TID targeted
• 125 MeV.cm
2 /mg SEL free
• 62.5 MeV.cm
2 /mg SET free
Applications
• Oscillators in space applications
• FPGA
• Microcontrollers
Description
The RHFAHC00 device is a very high speed pure CMOS quad 2-input NAND gate, designed for radiation hardness and characterized in total ionization dose (TID) and single event effect (SEE).
It is available in die-form and in hermetic ceramic Flat 14-lead screened as per MIL-
PRF-38535 to comply with the needs of space applications. It can work from -55 °C to +125 °C ambient temperature.
DS12465 - Rev 2 - July 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
1
1.1
Note:
Pin description
Pin description
2B
2Y
GND
1A
1B
1Y
2A
1
2
3
4
5
6
7
Figure 1. Pin description
14 Vcc
13
12
11
10
4B
4A
4Y
3B
9 3A
8 3Y
Pin 7 (GND) is electrically connected to the metallic lid.
Figure 2. Schematic
RHFAHC00
Pin description
Note: mA
L
H
L
H
Inputs
Table 1. Truth table mB
L
L
H
H
Outputs mY
H
H
H
L
H = high voltage level; L= low voltage level. This truth table is functionally tested with a square signal of 150
MHz between 0 V (low input level) and Vcc (high input level), from 1.65 V to 3.6 V power supply, from -55 °C to
125 °C ambient temperature.
DS12465 - Rev 2 page 2/15
2
Note:
RHFAHC00
Absolute maximum ratings and operating conditions
Absolute maximum ratings and operating conditions
Table 2. Absolute maximum ratings
Symbol
V cc
T stg
T j
R thjc
R thja
V i
I i
I out
ESD
Maximum power supply between V cc
and GND
Maximum temperature storage
Maximum junction temperature
Junction-to-case thermal resistance
Junction-to-ambient thermal resistance
Max. voltage on any pin
Parameters
Max. input current at any pin
DC output diode current
HBM on all pins (human body model)
CDM on all pins (charged device model)
-0.3 to V cc
Value
-0.3 to 4.8
-65 to +150
+150
22
125
+0.3 (and 4.8 V max.)
±10
±50
4 k
1 k
1. All voltages refer to ground level.
2. Short-circuits can cause excessive heating. Destructive dissipation can result from short-circuits on outputs.
Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.
Units
V
°C
°C
°C/W
°C/W
V mA mA
V
V
Symbol
V cc
V
IN
Δt/Δv
T amb
Table 3. Operating conditions
Parameters
Supply voltage
Input voltage
Minimum input rise of fall rate
Ambient temperature range
Min.
1.65
0
10
-55
Max.
3.6
V cc
+125
Units
V
V ns/V
°C
DS12465 - Rev 2 page 3/15
3
RHFAHC00
Electrical characteristics
Electrical characteristics
T amb
= -55 °C to +125 °C, unless otherwise specified.
Symbol
V
IH
V
IL
I
IL
I
IH
I
CCH
I
CCL
C in
V
OH
V
OL
Parameters
Table 4. DC electrical characteristics
Test conditions
High level input voltage
Low level input voltage
Input leakage current low
Input leakage current high
V in
= 0 V
V in
= Vcc-0.3 V
V cc
(V) Min.
Typ.
Max.
Unit
1.65
1 V
2.3
3.0
1.7
2
V
V
1.65
2.3
3.0
1.8
2.5
3.3
1.8
2.5
3.3
0.5
0.7
0.8
-0.1
-0.1
-0.1
0.1
0.1
0.1
µA
µA
µA
µA
µA
µA
V
V
V
Quiescent current, output high
Quiescent current, output low
V in
=V cc
or GND
I out
= 0 A
V in
= V cc
or GND
I out
= 0 A f = 1 MHz, T amb
= 25 °C
3.3
3.3
50
50
2
µA
µA
High level output voltage
Low level output voltage
I
OH
= -2 mA
I
OH
= -100 uA
I
OL
= +2 mA
I
OL
= +100 uA
2.3
3.0
1.65
2.3
3.0
1.65
2.3
3.0
1.65
1.65
2.3
3.0
1.2
1.7
2.4
1.45
2.1
2.8
450
430
400
200
200
200 pF
V
V mV mV mV mV mV mV
V
V
V
V
1. Guaranteed by design and characterization.
DS12465 - Rev 2 page 4/15
DS12465 - Rev 2
RHFAHC00
Electrical characteristics
Table 5. AC electrical characteristics
Symbol
C
T
T
T
T pd phl plh r f
Parameters
Power dissipation capacitance
C pd
= I ccrms
/(V cc
Propagation delay mA or mB to mY
Propagation delay mA or mB to mY
Output rise time
Output fall time
Test conditions
F=1 MHz, Load=10 pF
Load=10 pF to GND
1.8
2.5
3.3
1.8
2.5
V cc
(V) Min.
Typ.
Max.
Unit
1.8
3.3
5
7 pF
1.5
1.2
1
5.5
3.5
3 ns
3.3
1.8
2.5
3.3
1.8
2.5
3.3
1.5
1.2
1
1.9
1.4
1.3
1.9
1.4
1.3
5.5
3.5
3 ns ns ns
1. Guaranteed by design and characterization.
2. Power dissipation capacitance (C pd
) determines both the power consumption (P
D
) and dynamic current consumption (I
S
Where: P
D
= (C pd input signal and C
+ C
Load
Load
) (V
CC
x V
CC
) x f + (I
CC
x V
CC
) I
S
= (C
is the external output load capacitance.
pd
+ C
Load
) V
CC
x f + I
CC
, where f is the frequency of the
).
page 5/15
4
RHFAHC00
Radiations
Radiations
•
•
Total dose (MIL-STD-883 TM 1019):
The products guaranteed in radiation within the RHA QML-V system fully comply with the MIL-STD-883 TM 1019 specifications.
The RHFAHC00 is RHA QML-V, tested and characterized in full compliance with the MIL-STD-883 specifications, between 50 and 300 rad/s only (full CMOS technology).
All parameters, provided in Table 4. DC electrical characteristics and
Table 5. AC electrical characteristics , apply
to both pre- and post-irradiation, as follows:
• All tests are performed in accordance with MIL-PRF-38535 and test method 1019 of MIL-STD-883 for total ionizing dose (TID)
The initial characterization is performed in qualification only on both biased and unbiased parts
Each wafer lot is tested at high dose rate only, in the worst bias case condition, based on the results obtained during the initial qualification
Heavy-ions
The behavior of the product when submitted to heavy-ions is not tested in production. Heavy-ion trials are performed on qualification lots only.
Table 6. Radiation
Type Characteristics
TID
High-dose rate (50 rad(Si)/s) and low-dose rate (0.086 rad(Si)/s)
SEL
immune up to: (with a particle angle of 60 ° at 125 °C) and a fluence of 1e+7 cm -2 )
Heavy-ions
SEL immune up to:
(with a particle angle of 0 ° at 125 °C) and a fluence of 1e+7 cm -2 )
SET
(at 25 °C, and a fluence of 1e6 cm -2 )
1. A total ionizing dose (TID) of 300 krad(Si) is equivalent to 3000 Gy(Si), (1 gray = 100 rad).
2. SEL: single event latch-up.
3. SET: single event transient
Value
300
125
Unit krad
62.5
MeV.cm²/mg
DS12465 - Rev 2 page 6/15
5
RHFAHC00
Test circuit for AC characteristics
Test circuit for AC characteristics
Figure 3. Test configuration
50Ω line
CL
10 pF
High impedance input of the instrumentation
Figure 4. Timings
Figure 5. Output timings
Note: 1.
C
L
= 10 pF or equivalent (includes probe and jig capacitance).
2.
Timing parameters are tested at a minimum input frequency of 1 MHz.
3.
The outputs are measured one at a time with one transition per measurement.
DS12465 - Rev 2 page 7/15
6
6.1
RHFAHC00
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
. ECOPACK ® is an ST trademark.
Flat-14 package information
Figure 6. Flat-14 package outline
DS12465 - Rev 2
Ref.
E3 e
L
Q
S1 c
D
A b
E
E2
Min.
2.31
0.38
0.10
9.27
6.19
0.76
6.86
0.66
0.13
Table 7. Flat-14 package mechanical data
Drawing mm
Typ.
Max.
2.72
0.48
0.18
9.73
6.50
Min.
.091
.015
.004
.365
.244
3.68
.030
1.27
7.62
1.14
.250
.026
.005
Drawing inch
Typ.
.145
.050
Max.
.107
.019
.007
.383
.256
.300
.045
page 8/15
RHFAHC00
Ordering information
7 Ordering information
Table 8. Order code
Order code SMD
Quality level
Temp.
range
Mass Package
Lead finish
RH-AHC00K1
RHFAHC00K01V
-
5962F18202
Engineering model
QML-V flight
-55 to
+125 °C
0.55 g Flat-14 Gold
1. Standard microcircuit drawing.
2. Specific marking only. Complete marking includes the following:
• ST logo
• Date code (date the package was sealed) in YYWWA (year, week, and lot index of week)
• Country of origin (FR = France)
Marking
RH-AHC00K1
5962F1820201VXC
Packing
Conductive strip pack
Note: Contact your ST sales office for information about the specific conditions for products in die form.
Other information
Date code:
The date code is structured as engineering model: EM xyywwz
Where: x = 3 (EM only), assembly location Rennes (France) yy = last two digits of the year ww = week digits z = lot index of the week
Product documentation
Each product shipment includes a set of associated documentation within the shipment box. This documentation depends on the quality level of the products, as detailed in the table below.
The certificate of conformance is provided on paper whatever the quality level. For QML parts, complete documentation, including the certificate of conformance, is provided on a CDROM.
Quality level
Engineering model
Table 9. Product documentation
Item
Certificate of conformance including :
Customer name
Customer purchase order number
ST sales order number and item
ST part number
Quantity delivered
Date code
Reference to ST datasheet
Reference to TN1181 on engineering models
ST Rennes assembly lot ID
DS12465 - Rev 2 page 9/15
Quality level
QML-V Flight
RHFAHC00
Ordering information
Item
Certificate of Conformance including:
Customer name
Customer purchase order number
ST sales order number and item
ST part number
Quantity delivered
Date code
Serial numbers
Group C reference
Group D reference
Reference to the applicable SMD
ST Rennes assembly lot ID
Quality control inspection (groups A, B, C, D, E)
Screening electrical data in/out summary
Precap report
PIND (particle impact noise detection) test
SEM (scanning electronic microscope) inspection report
X-ray plates
DS12465 - Rev 2 page 10/15
RHFAHC00
Revision history
Date
28-Feb-2018
16-Jul-2018 2
Table 10. Document revision history
Version
1
Changes
Initial release.
Updated Table 2. Absolute maximum ratings
,
,
Table 4. DC electrical characteristics
,
Table 5. AC electrical characteristics
,
Minor text changes throughout the document.
DS12465 - Rev 2 page 11/15
RHFAHC00
Contents
Contents
DS12465 - Rev 2 page 12/15
RHFAHC00
List of tables
List of tables
DS12465 - Rev 2 page 13/15
RHFAHC00
List of figures
List of figures
DS12465 - Rev 2 page 14/15
RHFAHC00
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Purchasers’ products.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS12465 - Rev 2 page 15/15
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