STMicroelectronics RHR801 Datasheet
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Features
•
Propagation time of 7 ns
•
Rise/fall time: 1.1 ns on 10 pF
•
Low consumption: 1.4 mA
•
Single supply: 3 V to 5 V
•
100 krad high-dose rate
•
SEL-free up to 120 MeV.cm²/mg
•
SET characterized
Applications
•
High-speed timing
•
High-speed sampling
•
Clock recovery
•
Clock distribution
•
Phase detectors
RHR801
Rad-hard very high-speed comparator
Datasheet - production data
Description
The RHR801 is a very high-speed single comparator. It is designed to allow very high rise and fall times while drawing a high noise supply rejection. It uses a high-speed complementary
BiCMOS process to achieve its very good speed/power ratio and its high tolerance to radiation. The RHR801 is mounted in a hermetic
Flat-8 package.
Parameter
Table 1: Device summary
RHR801K1 RHR801K01V
— 5962-10215
Quality level Engineering model QML-V flight
Package Mass
—
Flat-8 0.45 g
Temp. range -55 °C to 125 °C
•
Notes:
(1)
SMD: standard microcircuit drawing
(2)
EPPL = ESA preferred part list
Yes
June 2017 DocID026299 Rev 4
This is information on a product in full production.
1/32 www.st.com
Contents
Contents
RHR801
1 Absolute maximum ratings and operating conditions ................. 3
2 Electrical characteristics ................................................................ 4
3 Electrical characteristic curves ...................................................... 8
Total ionizing dose (TID) ................................................................. 14
Heavy ions ...................................................................................... 18
5 Parameters and implementation .................................................. 19
Static input features ........................................................................ 19
Dynamic characteristics .................................................................. 19
Characteristics of the output stage .................................................. 21
Impedance matching for dynamic measurements ........................... 21
Implementation on the board........................................................... 21
Application examples ...................................................................... 24
Inverting comparator with hysteresis ................................................ 24
Fast signal recovery ......................................................................... 24
10 MHz RC oscillator ........................................................................ 25
6 Package information ..................................................................... 27
Ceramic Flat-8 package information ............................................... 28
7 Ordering information ..................................................................... 29
8 Other information .......................................................................... 30
Documentation ................................................................................ 30
9 Revision history ............................................................................ 31
2/32 DocID026299 Rev 4
RHR801
1
Absolute maximum ratings and operating conditions
Absolute maximum ratings and operating conditions
Symbol
V
CC
V id
V
T stg
T j
R thja
R thjc
ESD
Table 2: Absolute maximum ratings
Parameter
Differential input voltage (2)
Input voltage
Value
6
±2
(V cc
) - 0.3 V to
(V cc
+ ) + 0.3 V
Storage temperature range
Maximum junction temperature
Thermal resistance junction-to-ambient (4)
Thermal resistance junction-to-case (4)
MM: machine model
-65 to 150
150
125
40
3.5
0.35
Unit
V
°C
°C/W kV
CDM: charged device model
0.9 tlead
Lead temperature (soldering, 10 s) 260 °C
Notes:
(1)
V
CC
is defined as the voltage between the Vcc+ and Vcc- pins. The comparator can be used in single supply
(for example, Vcc+ = 5 V, Vcc- = 0 V) or dual supply (for example, Vcc+ = 2.5 V, Vcc- = -2.5 V).
(2)
Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. Vid should not exceed ±2 V. Diodes should be placed externally between the inputs should this voltage be beyond this range
(3)
If the input voltage goes beyond the rails (above Vcc+ or below Vcc-), the ESD diodes may be activated. It is required in that case to limit the input current to 10 mA with a serial resistor connected on the input.
(4)
Short-circuits can cause excessive heating and destructive dissipation. Values are typical.
(5)
Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.
(6)
Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5
Ω). This is done for all couples of connected pin combinations while the other pins are floating.
(7)
Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to ground through only one pin. This is done for all pins.
Symbol
Table 3: Operating conditions
Parameter Value Unit
V
CC
V
ICM
T oper
Supply voltage
Common-mode input voltage range
Operating free-air temperature range
3 to 5
(V
CC-
) + 0.5 V to
(V
CC+
) - 1.2 V
-55 to 125
V
°C
DocID026299 Rev 4 3/32
Electrical characteristics RHR801
2
Symbol
Electrical characteristics
Table 4: VCC+ = 3.3 V, VCC- = 0 V (unless otherwise specified)
Parameter Test conditions Temp. Min. Typ. Max. Unit
Input characteristics (see Figure 35 )
V
IO
Input offset voltage
V
TRIP+
High input threshold
V
TRIP-
Low input threshold
V
HYST
Hysteresis
I
IB
Input bias current
V
ICM
= V
CC
/2
V
ICM
= V
CC
/2
V
ICM
= V
CC
/2
V
ICM
= V
CC
/2
V
ICM
= V
CC
/2
C
IN
Input capacitance
Dynamic performances (see Figure 36 ,
125°C -8.0 8.0
25°C -7.0 -0.2 7.0
-55°C -8.0
125°C -8.0
25°C -7.0 1.1
8.0
8.0
7.0
-55°C -8.0 8.0
125°C -8.0 8.0
25°C -7.0 -1.5 7.0
-55°C -8.0
25°C 1.5
125°C
25°C
-4
-5
-55°C
25°C
-7
2.5
-2.2
-2.5
-3.5
5
8.0
4.0
0.0
0.0
0.0 mV
µA pF
T
PLH
T
PHL
Logic "0" to logic "1" propagation time
Logic "1" to logic "0" propagation time
150 mV step, C
L
= 10 pF,
50 mV overdrive, V
ICM
=
V
CC
/2
200 mV step, C
L
= 10 pF,
100 mV overdrive, V
ICM
=
V
CC
/2
150 mV step, C
L
= 10 pF,
50 mV overdrive, V
ICM
=
V
CC
/2
200 mV step, C
L
= 10 pF,
100 mV overdrive, V
ICM
=
V
CC
/2
125°C 7.0
25°C 6.0
-55°C 6.0
125°C 6.5
25°C 5.5
-55°C 5.5
125°C 7.0
25°C 6.0
-55°C 6.0
125°C 6.5
25°C 5.5
-55°C 5.5
8.8 12.0
8.1
8.1
9.5
9.5
8.0 10.5
7.8 9.0
7.8 9.0
9.0 12.0
8.3
8.3
9.5
9.5
7.9 10.5
7.7 9.0
7.7 9.0 ns
T
R
T
F
F
MAX
0
Output rise time 20 % to 80
%
200 mV step, C
L
=10 pF
Output fall time 80 % to 20 % 200 mV step, C
L
= 10 pF
Maximum input frequency
V in
= 1 V
P-P
sine wave,
C
L
= 10 pF, output duty cycle between 45 % and
55 %
25°C
25°C
125°C 60
25°C
-55°C
55
50
1.4
1.4
74
72
68 ns
MHz
4/32 DocID026299 Rev 4
RHR801
Symbol Parameter
Output characteristics
Test conditions
Electrical characteristics
Temp. Min. Typ. Max. Unit
V
OH
V
OL
I sink
I source
Logic "1" voltage
Logic "0" voltage
Output sink current
Output source current
I source
= 3.3 mA
I sink
= -3.3 mA
V out
= V
CC+
V out
= V
CC-
125°C 3.00 3.10 3.30
25°C 3.05 3.14 3.30
-55°C 3.10 3.18 3.30
125°C 0 200 300
25°C
-55°C
0
0
170
150
250
200
125°C 14
25°C 18
-55°C 19
125°C 17
25°C 20
-55°C 22
17
20
22
20
22
25
20
22
26
23
25
29
V mV mA
Power supply
I
CC-H
I
CC-L
SVR
CMRR
High output supply current
Low output supply current
Supply voltage rejection ratio
(ΔV
CC
/ΔV io
)
Common-mode rejection ratio (ΔV ic
/ΔV io
)
No load, V
ID
= 0.1 V
No load, V
ID
= -0.1 V
V
CC
= 3 to 3.6 V, V
ICM
=
1.65 V
V
ICM
= 0.5 V to V
CC
-1.2 V
125°C 1.40 1.55 2.10
25°C 1.20 1.44 1.60
-55°C 0.95 1.13 1.30
125°C 1.60 1.75 2.3
25°C 1.30 1.63 1.80
-55°C 1.00 1.30 1.50
125°C 42
25°C 55
-55°C 45
125°C 50
25°C 70
-55°C 60
65
70
65
95
80
85 mA dB
Parameter
Table 5: VCC+ = 5 V, VCC- = 0 V (unless otherwise specified)
Symbol
Input characteristics (see Figure 35 )
Test conditions Temp. Min. Typ. Max. Unit
V
IO
Input offset voltage
V
TRIP+
High input threshold
V
TRIP-
Low input threshold
V
HYST
Hysteresis
V
ICM
= V
CC
/2
V
ICM
= V
CC
/2
V
ICM
= V
CC
/2
V
ICM
= V
CC
/2
125°C -8.0 8.0
25°C -7.0 -0.2 7.0
-55°C -8.0
125°C -8.0
25°C -7.0 1.1
8.0
8.0
7.0
-55°C -8.0 8.0
125°C -8.0 8.0
25°C -7.0 -1.5 7.0
-55°C -8.0 8.0
25°C 1.5 2.5 4.0 mV
DocID026299 Rev 4 5/32
Electrical characteristics
Symbol
I
IB
Parameter
Input bias current
Test conditions
V
ICM
= V
CC
/2
C
IN
Input capacitance
Dynamic performances (see Figure 36 ,
150 mV step, C
L
= 10 pF,
50 mV overdrive, V
ICM
=
V
CC
/2
T
PLH
Logic "0" to logic "1" propagation time
200 mV step, C
L
= 10 pF,
100 mV overdrive, V
ICM
=
V
CC
/2
150 mV step, C
L
= 10 pF,
50 mV overdrive, V
ICM
=
V
CC
/2
T
PHL
Logic "1" to logic "0", propagation time
200 mV step, C
L
= 10 pF,
100 mV overdrive, V
ICM
=
V
CC
/2
F
T
T
R
F
MAX
Output rise time 20 % to 80
%
200 mV step, C
L
= 10 pF
Output fall time 80 % to 20 % 200 mV step, C
L
= 10 pF
Maximum input frequency
V in
= 1 V
P-P
sine wave,
C
L
= 10 pF, output duty cycle between 45 % and
55 %
0
Output characteristics
RHR801
Temp. Min. Typ. Max. Unit
125°C
25°C
-55°C
25°C
-4
-5
-7
-2.2
-2.5
5
0.0
0.0
-3.5 0.0
µA pF
125°C 6.0
25°C 6.0
-55°C 6.0
125°C 6.5
25°C 5.5
-55°C 5.5
125°C 7.0
25°C 6.0
-55°C 6.0
125°C 6.5
25°C 5.5
-55°C 5.5
25°C
25°C
125°C 60
25°C 55
-55°C 50
1.4
74
72
68
7.9
8.1
10
9.5
8.1 9.5
8.0 10.5
7.8
7.8
9.0
9.0
9.0 12.0
8.3
8.3
9.5
9.5
7.9 10.5
7.7
7.7
9.0
9.0
1.4 ns
MHz
V
OH
V
OL
I sink
Logic "1" voltage
Logic "0" voltage
Output sink current
I source
= 5 mA
I sink
= -5 mA
V out
= V
CC+
125°C 4.60 4.70 5.00
25°C 4.70 4.83 5.00
-55°C 4.80 4.87 5.00
125°C 0 240 400
25°C 0 200 300
-55°C 0
125°C 25
25°C
-55°C
30
30
180 200
30 35
35
40
40
45
125°C 35 40 45
V mV mA
I source
Output source current V out
= V
CC-
25°C 40 45 50
-55°C 45 50 55
6/32 DocID026299 Rev 4
RHR801
Symbol
Power supply
Parameter Test conditions
Electrical characteristics
Temp. Min. Typ. Max. Unit
I
CC-H
I
CC-L
SVR
CMRR
High output supply current
Low output supply current
Supply voltage rejection ratio
(ΔV
CC
/ΔV io
)
Common-mode rejection ratio (ΔV ic
/ΔV io
)
No load, V
No load, V
V
CC
ID
ID
= 0.1 V
= -0.1 V
= 4.5 to 5 V, V
2.375 V
ICM
=
V
ICM
= 0.5 V to V
CC
-1.2 V
125°C 1.50 1.84 2.30
25°C 1.30 1.59 1.80
-55°C 1.00 1.25 1.50
125°C 1.80 2.10 2.50
25°C 1.50 1.81 2.00
-55°C 1.20 1.43 1.70
125°C 50
25°C 60
-55°C 50
125°C 60
25°C 70
-55°C 60
75
80
75
75
80
75 mA dB
DocID026299 Rev 4 7/32
Electrical characteristic curves RHR801
3 Electrical characteristic curves
Figure 1: ICC drift vs. radiation dose, high-dose rate Figure 2: ICC drift vs. radiation dose, low-dose rate
Figure 3: VIO histogram at VCC = 3.3 V Figure 4: VHYST histogram at VCC = 3.3 V
8/32 DocID026299 Rev 4
RHR801
Figure 5: VIO histogram at VCC = 5 V
Electrical characteristic curves
Figure 6: VHYST histogram at VCC = 5 V
Figure 7: VIO vs. temperature Figure 8: VHYST vs. temperature
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
3.0
Figure 9: VIO vs. VCC
-55 °C
3.5
25 °C
125 °C
4.5
4.0
V
CC
(V)
5.0
DocID026299 Rev 4
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
3.0
Figure 10: VHYST vs. VCC
-55 °C
3.5
25 °C
4.5
125 °C
4.0
V
CC
(V)
5.0
9/32
Electrical characteristic curves
Figure 11: ICCL vs. VCC
3.0
V
ID
= -0.1 V
No load
2.5
125 °C
2.0
1.5
25 °C
-55 °C
1.0
0.5
3.0
3.5
4.0
V
CC
(V)
4.5
Figure 13: ICC vs. temperature
5.0
1.5
1.0
0.5
3.0
Figure 12: ICCH vs. VCC
3.0
2.5
V
ID
= 0.1 V
No load
125 °C
2.0
3.5
-55 °C
25 °C
4.0
V
CC
(V)
4.5
RHR801
5.0
Figure 14: IIB vs. VID
Figure 15: IIB vs. temperature Figure 16: IOUT vs. temperature
10/32 DocID026299 Rev 4
RHR801
Figure 17: VOUT vs. ISINK at VCC = 3.3 V
Electrical characteristic curves
Figure 18: VDROP vs. ISOURCE at VCC = 3.3 V
Figure 19: VOUT vs. ISINK at VCC = 5 V Figure 20: VDROP vs. ISOURCE at VCC = 5 V
Figure 21: TPD vs. VOV at VCC = 3.3 V Figure 22: TPD vs. VOV at VCC = 5 V
DocID026299 Rev 4 11/32
Electrical characteristic curves
Figure 23: TPLH vs. VCC
14
13
12
V
OV
= 100 mV
V
ICM
= V
CC
/2
C
LOAD
= 10 pF
11
T = 125 °C
10
9
8
7
6
3.0
T = 25 °C
3.5
4.0
V
CC
(V)
T = -55 °C
4.5
5.0
Figure 25: TPD vs. temperature, VOV = 50 mV
14
13
12
11
10
9
8
7
6
3.0
RHR801
Figure 24: TPHL vs. VCC
V
OV
= 100 mV
V
ICM
= V
CC
/2
C
LOAD
= 10 pF
T = 125 °C
3.5
4.0
V
CC
(V)
T = 25 °C
T = -55 °C
4.5
5.0
Figure 26: TPD vs. temperature, VOV = 100 mV
12/32
Figure 27: TPLH vs. CL at VCC = 3.3 V Figure 28: TPHL vs. CL at VCC = 5 V
DocID026299 Rev 4
RHR801
Figure 29: Rise time vs. CL
Electrical characteristic curves
Figure 30: Fall time vs. CL
Figure 31: Eye diagram for data rate 100 Mbit/s, test pattern PRBS7, CL = 10 pF and VCC = 3.3 V
Figure 32: Eye diagram for data rate 100 Mbit/s, test pattern PRBS7, CL = 10 pF and VCC = 5 V
Figure 33: Eye diagram for data rate 200 Mbit/s, test pattern PRBS7, CL = 10 pF and VCC = 3.3 V
Figure 34: Eye diagram for data rate 200 Mbit/s, test pattern PRBS10, CL = 10 pF and VCC = 3.3 V
DocID026299 Rev 4 13/32
Radiations RHR801
4 Radiations
4.1
TID
Type
Heavy-ions
Introduction
Table 6 summarizes the radiation performance of the RHF310.
Table 6: Radiations
Characteristics Value
180 krad/h high-dose rate (50 rad/sec) up to:
36 rad/h low-dose rate (0.01 rad/sec) up to:
SEL immunity up to:
100
120
(at 125 °C, with a particle angle of 60 °)
SEL immunity up to:
(at 125 °C, with a particle angle of 0 °)
60
SET (at 25 °C)
Unit krad
MeV.cm²/mg
Characterized
Notes:
(1)
Using the comparator beyond the maximum operating voltage (5 V) may result in significant overconsumption following lowdose rate radiation at 5.5 V (30 krad at 36 rad/h) and could lead to functional interrupt above 30 krad at 36 rad/h
4.2 Total ionizing dose (TID)
The products guaranteed in radiation within the RHA QML-V system fully comply with the
MIL-STD-883 TM 1019 specification.
The RHR801 is RHA QML-V tested and characterized in full compliance with the MIL-STD-
883 specification, both below 10 mrad/s and between 50 and 300 rad/s.
These parameters are shown in Table 7
(high-dose rate) and Table 9 and
Table 10 (low-dose rate), as follows:
•
All test are performed in accordance with MIL-PRF-38535 and test method 1019 of
MIL-STD-883 for total ionizing dose (TID).
•
The initial characterization is performed in qualification only on both biased and unbiased parts, on a sample of ten units from two different wafer lots.
•
Each wafer lot is tested at both high and low dose rates, in the worst bias case condition, based on the results obtained during the initial qualification.
14/32 DocID026299 Rev 4
RHR801 Radiations
Table 7: Drift after 300 krad and after annealing, during 24 h @ 25 °C and 168 h at 100 °C, 180 krad/h high-dose rate, VCC+ = 3.3 V, VCC- = 0 V, T = 25 °C, (unless otherwise specified)
Symbol Min Typ Max Unit
Delta Vio
Delta Vtrip+
Delta Vtrip-
Delta Iib
Delta Tplh (150 mV step)
Delta Tplh (200 mV step)
Delta Tphl (150 mV step)
Delta Tphl (200 mV step)
Delta Tr
Delta Tf
Delta Fmax
Delta ICC-H
Delta ICC-L
Delta VOH
Delta VOL
Delta Isink
Delta Isource
Delta SVR
Delta CMRR
-0.03
-0.02
0.04
-0.20
-16.00
-0.01
0.00
-0.72
-0.72
-0.88
-0.51
0.06
-0.01
0.00
-4.68
-0.54
-0.39
-10.30
-3.67
0.40
0.36
0.21
0.12
4.00
0.02
0.03
0.43
0.52
0.61
0.15
0.49
0.53
0.00
4.68
0.28
-0.28
7.61
7.40
0.14
0.15
0.11
-0.07
-2.70
0.01
0.01
-0.03
0.01
-0.08
-0.11
0.28
0.22
0.00
-0.52
-0.03
-0.33
-1.86
-0.10 mV
µA ns
MHz mA mV mA dB
DocID026299 Rev 4 15/32
Radiations RHR801
Table 8: Drift after 300 krad and after annealing, during 24 h @ 25 °C and 168 h at 100 °C, 180 krad/h high-dose rate, VCC+ = 5 V, VCC- = 0 V, T = 25 °C, (unless otherwise specified)
Symbol Min Typ Max Unit
Delta Vio
Delta Vtrip+
Delta Vtrip-
Delta Iib
Delta Tplh (150 mV step)
Delta Tplh (200 mV step)
Delta Tphl (150 mV step)
Delta Tphl (200 mV step)
Delta Tr
Delta Tf
Delta Fmax
Delta ICC-H
Delta ICC-L
Delta VOH
Delta VOL
Delta Isink
Delta Isource
Delta SVR
Delta CMRR
0.28
0.33
0.06
0.09
3.00
0.02
0.02
0.68
0.68
0.68
0.25
0.27
0.51
0.00
3.32
0.36
-0.13
11.40
5.60
0.13
0.06
0.04
-0.01
-0.90
0.00
0.00
-0.01
-0.02
0.00
-0.24
0.08
0.15
0.00
-1.59
0.00
-0.18
0.74
2.79
0.01
-0.16
0.00
-0.11
-5.00
-0.02
-0.01
-0.89
-0.92
-0.86
-0.84
-0.16
-0.10
0.00
-6.11
-0.52
-0.26
-10.39
-0.68 mV
µA ns
MHz mA mV mA dB
16/32 DocID026299 Rev 4
RHR801 Radiations
Table 9: Drift after 30 krad, 36 rad/h low-dose rate, VCC+ = 3.3 V, VCC- = 0 V, T = 25 °C, (unless otherwise specified)
Symbol Min Typ Max Unit
Delta Vio
Delta Vtrip+
Delta Vtrip-
Delta Iib
Delta Tplh (150 mV step)
Delta Tplh (200 mV step)
Delta Tphl (150 mV step)
Delta Tphl (200 mV step)
Delta Tr
Delta Tf
Delta Fmax
Delta ICC-H
Delta ICC-L
Delta VOH
Delta VOL
Delta Isink
Delta Isource
Delta SVR
Delta CMRR
0.20
0.15
0.08
0.04
4.00
0.42
0.43
0.57
0.80
0.33
0.23
0.20
0.15
0.00
-1.45
0.32
0.15
6.02
7.80
0.04
0.02
0.02
-0.05
0.84
0.10
0.10
0.07
0.11
0.02
-0.02
-0.01
-0.01
0.00
-3.25
0.23
0.06
-0.35
1.13
-0.10
-0.10
-0.04
-0.14
-3.00
-0.01
-0.01
-0.36
-0.64
-0.50
-0.23
-0.20
-0.15
-0.01
-5.11
0.14
-0.03
-9.54
-7.96 mV
µA ns
MHz mA mV mA dB
DocID026299 Rev 4 17/32
Radiations RHR801
Table 10: Drift after 30 krad, 36 rad/h low-dose rate, VCC+ = 5 V, VCC- = 0 V, T = 25 °C, (unless otherwise specified)
Symbol Min Typ Max Unit
Delta Vio
Delta Vtrip+
Delta Vtrip-
Delta Iib
Delta Tplh (150 mV step)
Delta Tplh (200 mV step)
Delta Tphl (150 mV step)
Delta Tphl (200 mV step)
Delta Tr
Delta Tf
Delta Fmax
Delta ICC-H
Delta ICC-L
Delta VOH
Delta VOL
Delta Isink
Delta Isource
Delta SVR
Delta CMRR
0.35
0.20
0.04
0.00
4.00
1.86
1.86
0.49
0.80
0.49
0.43
0.20
0.20
0.01
-1.17
0.44
0.31
9.78
16.68
0.05
0.02
0.00
-0.04
0.40
0.44
0.44
0.09
0.13
0.06
-0.23
-0.04
-0.02
0.00
-3.58
0.28
0.14
1.97
2.43
-0.02
-5.91
0.06
0.00
-16.26
-8.63
-0.15
-0.10
-0.06
-0.08
-2.00
-0.01
-0.01
-0.48
-0.76
-0.40
-0.70
-0.30
-0.25 mV
µA ns
MHz mA mV mA dB
4.3 Heavy ions
The heavy ion trials are performed on qualification lots only. No additional test is performed.
18/32 DocID026299 Rev 4
RHR801
5
5.1
Parameters and implementation
Parameters and implementation
Static input features
Figure 35: Input threshold
Input signal
Vtrip+
V- reference
Vtrip-
Vio =
(Vtrip+) + (Vtrip-)
2
Time
Output signal
Time
5.2 Dynamic characteristics
Figure 36: Output rise and fall times
Output signal
80%
20%
Tr
Rise time
Tf
Fall time
Time
DocID026299 Rev 4 19/32
Parameters and implementation
Figure 37: Input step and overdrive
Overdrive
V reference
Step
RHR801
VIH
VIL
50%
Figure 38: Propagation time
Input signal
Output signal
Time
Time
Time
Tplh
Propagation time
Tphl
Propagation time
20/32 DocID026299 Rev 4
RHR801
5.3
Parameters and implementation
Characteristics of the output stage
The RHR801 uses a rail-to-rail MOS output. The output levels are guaranteed through
testing (see the output characteristics in Table 4
and Table 5 ). This stage is optimized for
driving a load of 1 kΩ, with no stability issues. The capacitive load affects both the rise and fall times.
5.4 Impedance matching for dynamic measurements
To correctly evaluate this high-speed comparator, both the input and output must be properly matched (50
Ω). This matching is mandatory to avoid reflections on the tracks and cables, particularly at such high-speed rise and fall times. The matching of the input is relatively easy to perform with a 50
Ω input resistance placed as close as possible to the comparator input. The input track is 50
Ω matched. For the output, the comparator cannot drive a 50
Ω line directly. So, to reduce the output current while keeping a good 50 Ω termination on both sides of the cable, it is mandatory to use a series resistor much greater than 50
Figure 39: Output impedance matching
Very short track
Vcc = +3V/+5 V
To reduce output current
50
Ω
Vin
Fin
50
Ω track
50
Ω termination
50
Ω
+
RHR801
_
1 k Ω
Capa-load
V-reference
50
Ω
10 nF
5.5 Implementation on the board
The RHR801 is a very high-speed product that features very sharp output rise and fall times. The very high current variations must be appropriately managed and proper board layout techniques should be used to ensure best performances.
It is important to minimize the resistance from the source to the input of the comparator.
High resistance values combined with the equivalent input capacitance can result in time constants below the capability of the comparator. This is the cause of a lagged response at the input, resulting in an output delay. Moreover, proper ground impedance and other layout techniques must be implemented to minimize the input stray capacitance, such as very short tracks on any high-impedance termination.
With high-speed applications, it is very important to provide bypass capacitors for the power supply. Good power supply decoupling is mandatory (pin 4 and pin 7), as well as good decoupling on the reference (pin 2). With dual supplies, a 10 µF bypass capacitor should be placed on each power supply pin. This capacitor reduces any potential voltage ripple from the power supply at lower frequencies. A 10 nF ceramic capacitor should be placed as close as possible to the power supply pins and be tracked to ground. This capacitor reduces higher frequency noise during high-frequency switching.
A proper ground plane is particularly recommended for high-speed performance. It can be created by implementing a continuous conductive plane all over the surface of the circuit board, with breaks for the necessary paths only. A proper ground plane minimizes the effects of stray capacitance on the circuit board and facilitates the layout of matched tracks.
DocID026299 Rev 4 21/32
Parameters and implementation
This ground plane also provides a low inductive ground, eliminating any potential differences at various ground points.
RHR801
Figure 40: Single supply layout
Vcc+ = +3 to +5 V
Very short track
10 µF
Vin
Fin
Low impedance source
+
10 nF Very short track
CL
RL
V-reference
_
100 µF 10 nF
Equivalent load
Vcc- = 0 V ground floor
Low frequency bypass
High frequency bypass – as close as possible to the IC
Figure 41: Dual supply layout
Vcc+ = +1.5 to +2.5 V
Very short track
10 µF
Vin
Fin
Low impedance source
+ 10 nF Very short track
CL RL
_
V-reference = 0 V ground floor
Equivalent load
10 nF
10 µF
Vcc+ = -1.5 to -2.5 V
Figure 42: Input impedance matching
Very short track: minimization of stray input capacitance (Csi)
Vin
Fin
Low impedance source (R)
+
_
22/32 DocID026299 Rev 4
RHR801 Parameters and implementation
Time constant t = R x Csi should be as low as possible and t << Tr, Tf, Tplh, and Tphl.
Figure 43
: 50 Ω matching
Very short track: minimization of stray input capacitance (Csi)
5
0 Ω track
5
0 Ω
+
_
Time constant t = 50 Ω x Csi should be as low as possible and t << Tr, Tf, Tplh, and Tphl.
DocID026299 Rev 4 23/32
Parameters and implementation
5.6 Application examples
5.6.1
RHR801
Inverting comparator with hysteresis
The RHR801 comparator has a typical 2.5 mV implemented input voltage hysteresis which improves device stability and ensures a clean output response when the input signal amplude is relative small or moving slowly. However, in certain situations, like in noisy environments, it is desirable to increase the hysteresis value. This can easily be done by an external positive feedback network connected to the device.
Figure 44: External hysteresis circuit
3 V to 5 V
100n
V
OUT
R1
9.1k
V
OH
-
RHR801
IN
+
R2
2.7k
OUT
V
OL
V
TH+
V
TH-
V
IN
R3
Figure 44 shows the circuit with positive feedback between the output and non-inverting
input. Threshold voltages are given by the R1, R2, and R3 ratio and the V
CC power supply voltage. Neglecting input bias current and output voltage drop, V
TH+
, and V
TH- can be
Equation 1
5.6.2
The symbol “|” represents a resistors parallel combination. The threshold voltages of Figure
TH+
= 1.1 V and V
TH-
= 1.3 V.
Fast signal recovery
The circuit in Figure 45 represents an example of a simple translator input signal from a 50
Ω transmission line to a CMOS compatible output.
24/32 DocID026299 Rev 4
RHR801
5.6.3
IN
50
Ω
+ 3 .3 V
Parameters and implementation
Figure 45: Signal recovery circuit
3 V to 5 V
10u
50
Ω track C1
100n
100n
R1
50
RHR801 OUT
R2
15k
10u
R3
15k
The reference voltage is set by the resistors R
2
and R
3
to 1.65 V. Capacitor (C) in parallel with R
1
ensure stable low impedance of the reference input during a transition period. A
100-nF capacitor, with low ESR, must be placed close to the device pin. C
1
removes the
DC component from the input signal while R
1 terminates the 50 Ω input and avoids signal reflection. The minimum operating frequency is given by C
1
and it is about 100 kHz.
10 MHz RC oscillator
The circuit in Figure 46 provides a square signal with a frequency of about 10 MHz. This
circuit utilizes both positive and negative feedback. Positive feedback produces the R
2
, R
3
, and R
4
resistor network which implements input voltage hysteresis described in Section
2
= R
3
= R
4
, the threshold voltages are 1/3 of the V
CC
and 2/3 of the V
CC
.
Consequently, output duty cycle is 50 % and output frequency is independent of V
CC
.
Figure 46: RC oscillator
+ 3 V to + 5 V
R 3
10 k
R 4
1 k
100 n
+
-
R 2
10 k
RHR801
10 k
R 1
C 1
68 p
The R1 feedback resistor periodically charges and discharges the C
1
capacitor. The output
signal period can be calculated using Equation 2 . Note that this equation is valid only when
R
2
= R
3
= R
4
.
DocID026299 Rev 4 25/32
Parameters and implementation
Equation 2
RHR801
In a real application, output frequency is slightly lower than calculated due to PCB parasitic capacitances.
26/32 DocID026299 Rev 4
RHR801
6
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
DocID026299 Rev 4 27/32
Package information
6.1 Ceramic Flat-8 package information
Figure 47: Ceramic Flat-8 package outline
RHR801
28/32
L
Q
S1
N
E
E2
E3 e
A b c
D
Ref.
Min.
2.24
0.38
0.10
6.35
6.35
4.32
0.88
6.51
0.66
0.92
The upper metallic lid is not electrically connected to any pins, nor to the IC die inside the package. Connecting unused pins or metal lid to ground or to the power supply will not affect the electrical characteristics.
Table 11: Ceramic Flat-8 mechanical data
Dimensions
Millimeters
Typ. Max. Min.
Inches
Typ.
2.44
0.43
0.13
6.48
6.48
4.45
1.01
1.27
2.64
0.48
0.16
6.61
6.61
4.58
1.14
0.088
0.015
0.004
0.250
0.250
0.170
0.035
0.096
0.017
0.005
0.255
0.255
0.175
0.040
0.050
0.79
1.12
08
7.38
0.92
1.32
0.256
0.026
0.036
0.031
0.044
08
Max.
0.104
0.019
0.006
0.260
0.260
0.180
0.045
0.291
0.036
0.052
DocID026299 Rev 4
RHR801 Ordering information
7 Ordering information
Order code Description
Table 12: Order codes
Temp. range Package
RHR801K1
RHR801K01V
Engineering model
QML-V flight
-55 °C to 125 °C Flat-8
RHR801K1
5962R102150
1VXC
Packing
Strip pack
Notes:
(1)
Specific marking only. Complete marking includes the following: SMD pin (on QML-V flight only) ST logo Date code (date the package was sealed) in YYWWA (year, week, and lot index of week) QML logo (Q or V) Country of origin (FR = France)
Contact your ST sales office for information regarding the specific conditions for products in die form and QML-Q versions.
DocID026299 Rev 4 29/32
Other information
8
8.1
8.2
Other information
Date code
The date code is structured as shown below:
•
EM xyywwz
•
QML-V yywwz where:
− x (EM only) = 3 and the assembly location is Rennes, France
− yy = last two digits of the year
− ww = week digits
− z = lot index in the week
Documentation
Table 13: Documentation provided for each type of product
Quality level Documentation
Engineering model
QML-V flight
—
Certificate of conformance
Screening electrical data
Precap report
X-ray report
Notes:
(1)
QCI = quality conformance inspection
(2)
PIND = particle impact noise detection
(3)
SEM = scanning electron microscope
(4)
List of components that failed during screening
RHR801
30/32 DocID026299 Rev 4
RHR801
9
Revision history
Revision history
Date
Table 14: Document revision history
Revision Changes
10-Jun-2014
23-Mar-2015
16-Mar-2016
29-Jun-2017
1
2
3
4
Initial release
Replaced package silhouette
Updated Device summary table
Added electrical characteristic curves into the
Electrical characteristics section.
Reworked Radiations section
Figure 47: replaced Flat-8S package with Flat-8 package.
Modified "L" values of Table 11: "Ceramic Flat-8 package mechanical data"
Made small text changes to Section 7: "Other information"
Updated document layout
Device summary table: updated EPPL information and footnote 1 (SMD = standard microcircuit drawing).
Replaced order code name RHR801K-01V with
RHR801K01V.
DocID026299 Rev 4 31/32
RHR801
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© 2017 STMicroelectronics – All rights reserved
32/32 DocID026299 Rev 4
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