STMicroelectronics M40Z111 Datasheet
광고
광고
M40Z111
M40Z111W
5 V or 3 V NVRAM supervisor for up to two LPSRAMs
Not recommended for new design
Features
■
■
■
■
■
■
■
■
Convert low power SRAMs into NVRAMs
Precision power monitoring and power switching circuitry
Automatic write-protection when V
CC
is out-oftolerance
Choice of supply voltages and power-fail deselect voltages:
– M40Z111: V
CC
= 4.5 to 5.5 V
THS = V
THS = V
SS
; 4.5 ≤ V
OUT
PFD
≤ 4.75 V
; 4.2 ≤ V
PFD
≤ 4.5 V
– M40Z111W: V
CC
THS = V
= 3.0 to 3.6 V
SS
; 2.8 ≤ V
PFD
≤ 3.0 V
V
CC
= 2.7 to 3.3 V
THS = V
OUT
; 2.5 ≤ V
PFD
≤ 2.7 V
Less than 15 ns chip enable access propagation delay (for 5.0 V device)
Packaging includes a 28-lead SOIC and
SNAPHAT
®
top (to be ordered separately)
SOIC package provides direct connection for a
SNAPHAT top which contains the battery
RoHS compliant
– Lead-free second level interconnect
2 8
SNAPHAT (SH) battery
1
SOH28 (MH)
Obsolete Product(s) - Obsolete Product(s)
December 2010 Doc ID 5676 Rev 5
This is information on a product still in production but not recommended for new designs.
1/20 www.st.com
1
Contents
Contents
M40Z111, M40Z111W
Data retention lifetime calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
noise and negative going transients . . . . . . . . . . . . . . . . . . . . . . . . . 10
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Obsolete Product(s) - Obsolete Product(s)
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M40Z111, M40Z111W
List of tables
List of tables
SOH28 – 28-lead plastic small outline, battery SNAPHAT, pack. mech. data . . . . . . . . . . 15
4-pin SNAPHAT housing for 48 mAh battery, package mechanical data . . . . . . . . . . . . . . 16
4-pin SNAPHAT housing for 120 mAh battery, package mechanical data . . . . . . . . . . . . . 17
Obsolete Product(s) - Obsolete Product(s)
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List of figures
List of figures
M40Z111, M40Z111W
SOH28 – 28-lead plastic small outline, 4-socket battery SNAPHAT, package outline . . . . 15
Obsolete Product(s) - Obsolete Product(s)
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M40Z111, M40Z111W
1 Description
Description
The M40Z111/W NVRAM supervisor is a self-contained device which converts a standard low-power SRAM into a non-volatile memory.
A precision voltage reference and comparator monitors the V
CC
input for an out-of-tolerance condition.
When an invalid V
CC
condition occurs, the conditioned chip enable (E
CON
) output is forced inactive to write-protect the stored data in the SRAM.
During a power failure, the SRAM is switched from the V
CC
pin to the lithium cell within the
SNAPHAT
®
to provide the energy required for data retention. On a subsequent power-up, the SRAM remains write protected until a valid power condition returns.
The 28-pin, 330 mil SOIC provides sockets with gold plated contacts at both ends for direct connection to a separate SNAPHAT housing containing the battery. The unique design allows the SNAPHAT battery package to be mounted on top of the SOIC package after the completion of the surface mount process.
Insertion of the SNAPHAT housing after reflow prevents potential battery damage due to the high temperatures required for device surface-mounting. The SNAPHAT housing is keyed to prevent reverse insertion.
The SOIC and battery packages are shipped separately in plastic anti-static tubes or in tape
& reel form. For the 28-lead SOIC, the battery package (e.g., SNAPHAT) part number is
“M4Z28-BR00SH1” (SNAPHAT housing for 48 mAh battery) or “M4Z32-BR00SH1”
(SNAPHAT housing for 120 mAh battery).
Figure 1.
Logic diagram
VCC
TH S VOUT
M40Z111
M40Z111W
E ECON
Obsolete Product(s) - Obsolete Product(s)
V
SS
AI022 38 B
Doc ID 5676 Rev 5 5/20
Description
Table 1.
THS
Signal names
Threshold select input
E
E
CON
V
OUT
V
CC
V
SS
NC
Chip enable input
Conditioned chip enable output
Supply voltage output
Supply voltage
Ground
Not connected internally
Figure 2.
SOIC28 connections
VOUT
NC
NC
NC
NC
VCC
NC
VCC
NC
NC
NC
NC
TH S
V
SS
1
6
7
8
9
4
5
2
3
10
11
12
1 3
14
2 8
2 3
M40Z111 22
M40Z111W
21
20
27
26
25
24
19
1 8
17
16
15
NC
NC
NC
NC
NC
VCC
E
NC
NC
NC
NC
NC
ECON
NC
M40Z111, M40Z111W
AI022 3 9B
Obsolete Product(s) - Obsolete Product(s)
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M40Z111, M40Z111W
Figure 3.
Hardware hookup
3.0, 3.3, or 5V
Description
1N5817 or
MBR5120T3
0.1µF
Threshold
VCC VOUT
E
THS
VSS
M40Z111/W
ECON
0.1µF
VCC
E2
CMOS
SRAM
E x8 or x16
AI02394
Obsolete Product(s) - Obsolete Product(s)
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Operation
2 Operation
Note:
M40Z111, M40Z111W
The M40Z111/W, as shown in
, can control up to two standard low-power
SRAMs. These SRAMs must be configured to have the chip enable input disable all other input signals. Most slow, low-power SRAMs are configured like this, however many fast
SRAMs are not. During normal operating conditions, the conditioned chip enable (E
CON
) output pin follows the chip enable (E) input pin with timing shown in
internal switch connects V
CC
to V
OUT
. This switch has a voltage drop of less than 0.3 V
(I
OUT1
).
When V
CC
degrades during a power failure, E
CON
is forced inactive independent of E. In this situation, the SRAM is unconditionally write protected as V
CC
falls below an out-of-tolerance threshold (V
PFD
). The power fail detection value associated with V
PFD
is selected by the
THS pin and is shown in
The THS pin must be connected to either V
SS
or V
OUT
.
If chip enable access is in progress during a power fail detection, that memory cycle continues to completion before the memory is write protected. If the memory cycle is not terminated within time t
WP
, E
CON
is unconditionally driven high, write protecting the SRAM.
A power failure during a write cycle may corrupt data at the currently addressed location, but does not jeopardize the rest of the SRAM's contents. At voltages below V
PFD
(min), the user can be assured the memory will be write protected provided the V
CC
fall time exceeds t
F
.
As V
CC
continues to degrade, the internal switch disconnects V
CC
and connects the internal battery to V
OUT
. This occurs at the switchover voltage (V
SO
). Below the V
SO
, the battery provides a voltage V
OHB
to the SRAM and can supply current I
OUT2
(see
). When V
CC
rises above V
SO
, V
OUT
is switched back to the supply voltage. Output
E
CON
is held inactive for t
ER
(200 ms maximum) after the power supply has reached V
PFD
,
independent of the E input, to allow for processor stabilization (see Figure 5 on page 9 ).
2.1 Data retention lifetime calculation
Most low power SRAMs on the market today can be used with the M40Z111/W NVRAM
SUPERVISOR. There are, however some criteria which should be used in making the final choice of which SRAM to use. The SRAM must be designed in a way where the chip enable input disables all other inputs to the SRAM. This allows inputs to the M40Z111/W and
SRAMs to be “Don't Care” once V
CC
falls below V guarantee data retention down to V
CC
PFD
(min). The SRAM should also
= 2.0 V. The chip enable access time must be sufficient to meet the system needs with the chip enable propagation delays included. If the
SRAM includes a second chip enable pin (E2), this pin should be tied to V
OUT
. If data Obsolete Product(s) - Obsolete Product(s) retention current specifications for the particular SRAMs being evaluated. Most SRAMs specify a data retention current at 3.0 V.
Manufacturers generally specify a typical condition for room temperature along with a worst case condition (generally at elevated temperatures). The system level requirements will determine the choice of which value to use. The data retention current value of the SRAMs can then be added to the I
CCDR
value of the M40Z111/W to determine the total current requirements for data retention.
8/20 Doc ID 5676 Rev 5
M40Z111, M40Z111W Operation
The available battery capacity for the SNAPHAT
®
of your choice can then be divided by this
current to determine the amount of data retention available (see Table 11 on page 18
). For more information on battery storage life refer to the application note AN1012.
Figure 4.
Power-down timing
VCC
VPFD (max)
VPFD
VPFD (min)
VSO tF tFB
E
ECON tWPT
VOHB
AI02396
Figure 5.
Power-up timing
VCC
VPFD (max)
VPFD
VPFD (min)
VSO tRB
E
VOHB tR tER tEDH tEDL
AI02397
Doc ID 5676 Rev 5 9/20
Operation M40Z111, M40Z111W
Table 2.
Symbol t
F
(2) t
FB
(3) t
R t
RB
V
V
V
V
Power down/up AC characteristics
PFD
PFD
PFD
SS
(max) to V
(min) to V
(min) to V
to V
PFD
PFD
SS
V
PFD
Parameter
(1)
(min) V
CC
fall time
(max) V
(min) V
CC
CC
CC
fall time
rise time
rise time
Min
300
10
10
1
Max Unit t t t t
EDL
EDH
ER
(4)
WPT
Chip enable propagation delay
Chip enable propagation delay
Chip enable recovery
Write protect time
M40Z111
M40Z111W
M40Z111
M40Z111W
M40Z111
M40Z111W
40
40
40
15
20
10
20
200
150
250
1.
Valid for ambient operating temperature: T where noted).
A
= –40 to 85 °C; V
CC
= 4.5 to 5.5 V or 2.7 to 3.6 V (except
2.
V
PFD
(max) to V
PFD until 200 µs after V
(min) fall time of less than t
F
CC
passes V
PFD
(min).
may result in deselection/write protection not occurring
3.
V
PFD
(min) to V
SS
fall time of less than t
FB
may cause corruption of RAM data.
4.
t
ER
(min) = 20 ms for industrial temperature range - grade 6 device.
ns ns ns ns
µs
µs
µs
µs ms
µs
µs
2.2 V
CC
noise and negative going transients
I
CC
transients, including those produced by output switching, can produce voltage fluctuations, resulting in spikes on the V
CC
bus. These transients can be reduced if capacitors are used to store energy which stabilizes the V
CC
bus. The energy stored in the bypass capacitors will be released as low going spikes are generated or energy will be absorbed when overshoots occur. A ceramic bypass capacitor value of 0.1 µF (as shown in
Figure 6 ) is recommended in order to provide the needed filtering.
In addition to transients that are caused by normal SRAM operation, power cycling can generate negative voltage spikes on V
CC
that drive it to values below V
SS
by as much as one volt. These negative spikes can cause data corruption in the SRAM while in battery backup mode. To protect from these voltage spikes, STMicroelectronics recommends connecting a Schottky diode from V
CC
to V
SS
(cathode connected to V
CC
, anode to V
SS
).
Schottky diode 1N5817 is recommended for through hole and MBRS120T3 is recommended for surface mount.
VCC
0.1
µ F
VCC
DEVICE
V
SS
AI00622
10/20 Doc ID 5676 Rev 5
M40Z111, M40Z111W Maximum ratings
Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Table 3.
Symbol
Absolute maximum ratings
Parameter Value Unit
T
T
STG
T
SLD
(1)
V
A
IO
V
CC
I
O
P
D
Ambient operating temperature
Storage temperature (V
CC
off)
Lead solder temperature for 10 seconds
Input or output voltages
Supply voltage
Output current
Power dissipation
Grade 6
SNAPHAT
SOIC
M40Z111
®
M40Z111W
–40 to 85
–40 to 85
–55 to 125
260
–0.3 to V
CC
+0.3
–0.3 to 7.0
–0.3 to 4.6
20
1
1.
For SO package, lead-free (Pb-free) lead finish: reflow at peak temperature of 260 °C (the time above
255 °C must not exceed 30 seconds).
°C
°C
°C
°C
V
V
V mA
W
Caution: Negative undershoots below –0.3 V are not allowed on any pin while in the battery backup mode.
Caution: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.
Obsolete Product(s) - Obsolete Product(s)
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DC and AC parameters
4 DC and AC parameters
Note:
M40Z111, M40Z111W
This section summarizes the operating and measurement conditions, as well as the DC and
AC characteristics of the device. The parameters in the following DC and AC characteristic
tables are derived from tests performed under the measurement conditions listed in Table 4:
DC and AC measurement conditions . Designers should check that the operating conditions
in their projects match the measurement conditions when using the quoted parameters.
Table 4.
DC and AC measurement conditions
Parameter
V
CC
supply voltage
Ambient operating temperature
Load capacitance (C
L
)
Input rise and fall times
Input pulse voltages
Input and output timing ref. voltages
M40Z111
4.5 to 5.5 V
–40 to 85 °C
100 pF
≤ 5 ns
0 to 3 V
1.5 V
M40Z111W
2.7 to 3.6 V
–40 to 85 °C
50 pF
≤ 5 ns
0 to 3 V
1.5 V
Note that Output Hi-Z is defined as the point where data is no longer driven.
Figure 7.
AC testing load circuit
645
Ω
DEVICE
UNDER
TEST
CL = 100pF
(1)
or 5pF
1.75V
CL includes JIG capacitance
AI02326
1.
50 pF for M40Z111W.
Table 5.
Capacitance
C
IN
C
OUT
(3)
Parameter
(1)(2)
Symbol
Input capacitance
Min
-
Max
8
Unit pF
Output capacitance 10 pF
1.
Effective capacitance measured with power supply at 5 V (M40Z111) or 3.3 V (M40Z111W); sampled only, not 100% tested.
2.
At 25 °C, f = 1 MHz.
3.
Outputs deselected
12/20 Doc ID 5676 Rev 5
M40Z111, M40Z111W DC and AC parameters
Table 6.
Sym
I
CC
I
CCDR
I
LI
I
LO
(2)
I
OUT1
I
OUT2
V
BAT
DC characteristics
M40Z111
Parameter Test condition
(1)
Supply current Outputs open
Data retention mode current
Input leakage current 0 V ≤ V
IN
≤ V
CC
Output leakage current 0 V ≤ V
OUT
≤ V
CC
V
OUT
> V
CC
–0.3
V
OUT
current (active)
V
OUT
> V
CC
–0.2
V
OUT
current (battery backup)
V
OUT
> V
BAT
–0.3
Battery voltage
Min Typ
3
2.0
100
3.0
Max
6
150
±1
±1
160
100
3.5
Min
M40Z111W
Typ
2
100
Max
4
150
±1
±1
100
65
V
IL
V
OH
V
OHB
V
OL
Input low voltage
Output high voltage
V
OH
battery backup
Output low voltage
THS Threshold select voltage
V
V
V
IH
PFD
SO
Input high voltage
Power-fail deselect voltage (THS = V
SS
)
Power-fail deselect voltage (THS = V
OUT
)
Battery back-up switchover voltage
2.2
–0.3
I
OH
= –2.0 mA 2.4
I
OUT2
= –1.0 µA 2.0
2.9
I
OL
= 4.0 mA
V
SS
4.50 4.60
4.20 4.35
3.0
V
CC
+ 0.3
0.8
3.6
0.4
V
OUT
4.75
4.50
2.0
2.0
–0.3
2.4
2.0
V
SS
2.80
2.50
3.0
2.9
2.90
2.60
V
PFD
–
100 mV
3.5
V
CC
+
0.3
0.8
V
3.6
0.4
OUT
3.00
2.70
1.
Valid for ambient operating temperature: T
A
= –40 to 85 °C; V
CC
= 4.5 to 5.5 V or 2.7 to 3.6 V (except where noted).
2.
Outputs deselected.
Unit mA nA
µA
V
V
V
V
V
µA
µA mA mA
V
V
V
V
V
Obsolete Product(s) - Obsolete Product(s)
Doc ID 5676 Rev 5 13/20
Package mechanical data
5 Package mechanical data
M40Z111, M40Z111W
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
Obsolete Product(s) - Obsolete Product(s)
14/20 Doc ID 5676 Rev 5
M40Z111, M40Z111W Package mechanical data
Figure 8.
SOH28 – 28-lead plastic small outline, 4-socket battery SNAPHAT, package outline
A2 A
C
B e
CP eB
N
D
E H
A1 L
α
1
S OH-A
Note: Drawing is not to scale.
Table 7.
SOH28 – 28-lead plastic small outline, battery SNAPHAT, pack. mech. data mm inches
Symbol
Typ Min Max Typ Min Max
D
E
B
C
A
A1
A2 e eB
H
L
1.27
0.05
2.34
0.36
0.15
17.71
8.23
–
3.20
11.51
0.41
3.05
0.36
2.69
0.51
0.32
18.49
8.89
–
3.61
12.70
1.27
0.050
0.002
0.092
0.014
0.006
0.697
0.324
–
0.126
0.453
0.016
a 0° 8° 0° 8°
N
CP
28
0.10
28
0.004
0.120
0.014
0.106
0.020
0.012
0.728
0.350
–
0.142
0.500
0.050
Doc ID 5676 Rev 5 15/20
Package mechanical data M40Z111, M40Z111W
Figure 9.
4-pin SNAPHAT housing for 48 mAh battery, package outline eA
D
A1
A
B eB
A3
A2
L
E
Note:
SHZP-A
Drawing is not to scale.
A
A1
A2
A3
B
D
E eA eB
L
Table 8.
Symbol
4-pin SNAPHAT housing for 48 mAh battery, package mechanical data mm inches
Typ Min Typ Min
6.73
6.48
0.46
21.21
14.22
15.55
3.20
2.03
Max
9.78
7.24
6.99
0.38
0.56
21.84
14.99
15.95
3.61
2.29
0.265
0.255
0.018
0.835
0.560
0.612
0.126
0.080
Max
0.385
0.285
0.275
0.015
0.022
0.860
0.590
0.628
0.142
0.090
Obsolete Product(s) - Obsolete Product(s)
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M40Z111, M40Z111W Package mechanical data
Figure 10.
4-pin SNAPHAT housing for 120 mAh battery, package outline eA
D
A1
A
B eB
A3
A2
L
E
Note:
SHZP-A
Drawing is not to scale.
A
A1
A2
A3
B
D
E eA eB
L
Table 9.
Symbol
4-pin SNAPHAT housing for 120 mAh battery, package mechanical data mm inches
Typ Min Typ Min
8.00
7.24
0.46
21.21
17.27
15.55
3.20
2.03
Max
10.54
8.51
8.00
0.38
0.56
21.84
18.03
15.95
3.61
2.29
0.315
0.285
0.018
0.835
0.680
0.612
0.126
0.080
Max
0.415
0.335
0.315
0.015
0.022
0.860
0.710
0.628
0.142
0.090
Obsolete Product(s) - Obsolete Product(s)
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Part numbering M40Z111, M40Z111W
Table 10.
Ordering information scheme
Example: M40Z 111W
Device type
M40Z
Supply voltage and write protect voltage
111
(1)
= V
CC
= 4.5 to 5.5 V; V
PFD
= 4.3 to 4.5 V
THS = V
SS
= 4.5 ≤ V
PFD
≤ 4.75 V
THS = V
OUT
= 4.2 ≤ V
PFD
≤ 4.5 V
= V
CC
= 2.7 to 3.6V; V
PFD
= 2.6 to 2.7 V
THS = V
SS
= 2.8 ≤ V
PFD
≤ 3.0 V
V
CC
= 2.7 to 3.3 V
THS = V
OUT
= 2.5 ≤ V
PFD
≤ 2.7 V
Package
MH
(2)
= SOH28
MH 6 E
Temperature range
6 = –40 to 85 °C
Shipping method for SOIC
E = Lead-free ECOPACK
® package, tubes
F = Lead-free ECOPACK
®
package, tape & reel
1.
Not recommended for new design. Contact local ST sales office for availability.
2.
The SOIC package (SOH28) requires the battery package (SNAPHAT
®
) which is ordered separately under the part number “M4ZXX-BR00SHX” in plastic tubes or “M4ZXX-BR00SHXTR” in tape & reel form.
Caution: Do not place the SNAPHAT battery package “M4ZXX-BR00SH” in conductive foam as this
Obsolete Product(s) - Obsolete Product(s)
For a list of available options (e.g., speed, package) or for further information on any aspect of this device, please contact the ST sales office nearest to you.
Table 11.
Battery table
Part number Description
M4Z28-BR00SH1 SNAPHAT housing for 48 mAh battery
M4Z32-BR00SH1 SNAPHAT housing for 120 mAh battery
Package
SH
SH
18/20 Doc ID 5676 Rev 5
M40Z111, M40Z111W Revision history
Table 12.
Document revision history
Date
Sep-2000
14-Sep-2001
13-May-2002
12-Nov-2007
15-Dec-2010
Revision
1
2
3
4
5
Changes
First Draft Issue
Reformatted, TOC added, changed DC Characteristics ( Table 6
); changed battery, ind. temperature information (
,
,
); added E2 to Hookup
Modify reflow time and temperature footnote (
)
Reformatted document; added lead-free second level interconnect
information to cover page and Section 5: Package mechanical data
;
,
.
Devices are not recommended for new design, updated document status and
; updated footnote in
®
text in Section 5: Package mechanical data
; reformatted document.
Obsolete Product(s) - Obsolete Product(s)
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M40Z111, M40Z111W
Please Read Carefully:
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GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
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20/20 Doc ID 5676 Rev 5
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